📄 7820_f2.lst
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C51 COMPILER V7.50 7820_F2 03/10/2006 16:35:24 PAGE 1
C51 COMPILER V7.50, COMPILATION OF MODULE 7820_F2
OBJECT MODULE PLACED IN 7820_f2.OBJ
COMPILER INVOKED BY: e:\Keil\C51\BIN\C51.EXE 7820_f2.c LARGE OPTIMIZE(9,SIZE) BROWSE NOAREGS DEBUG OBJECTEXTEND
line level source
1 #include <reg54.h>
2 #include <stdio.h>
3 #include "f2rc7820.h"
4
5 extern void delay(void);
6
7 #define ADDRH XBYTE[0xAC00] //define reset address
8
9 void f2rc7820_wr(unsigned char f2addr,unsigned char value) large reentrant{
10 1 P1 = 0x10;
11 1 ADDR = f2addr;
12 1 RC7820_REG = value;
13 1
14 1 ADDR = 0xff;
15 1 P1 = 0;
16 1 }
17
18 unsigned char f2rc7820_rd(unsigned char f2addr) large reentrant{
19 1 unsigned char xdata value;
20 1 P1 = 0x10;
21 1 ADDR = f2addr;
22 1 value = RC7820_REG;
23 1
24 1 ADDR = 0xff;
25 1 P1 = 0;
26 1 return(value);
27 1 }
28
29
30 //void reset_f2rc7820(void){
31
32 // P1 = 0x10;
33 //ADDRH = 0; //reset f2rc7820
34 //delay();
35 // ADDRH = 0x80;
36 // delay();
37 // ADDRH = 0;
38 // P1 = 0;
39 //}
40
41 void f2_rc7820(void){
42 1 // reset_f2rc7820();
43 1
44 1 f2rc7820_wr(F2Encrypt_reg,0xAA); //open 7820 write reg
45 1
46 1 f2rc7820_wr(F2T1s_reg,0x00);
47 1 f2rc7820_wr(F2T1freps_reg1,0xAA);
48 1 f2rc7820_wr(F2T1freps_reg2,0xAA);
49 1 f2rc7820_wr(F2T2t3t4_reg,0x00);
50 1 f2rc7820_wr(F2T4_reg,0x0A);
51 1 f2rc7820_wr(F2S_reg,0x81);
52 1 f2rc7820_wr(F2Bands_reg,0x05);
53 1
54 1 f2rc7820_wr(F2T11ql_reg,0x0F);
55 1 f2rc7820_wr(F2T12ql_reg,0x0F);
C51 COMPILER V7.50 7820_F2 03/10/2006 16:35:24 PAGE 2
56 1 f2rc7820_wr(F2T13ql_reg,0x0F);
57 1 f2rc7820_wr(F2T14ql_reg,0x0F);
58 1 f2rc7820_wr(F2T15ql_reg,0x0F);
59 1 f2rc7820_wr(F2T16ql_reg,0x0F);
60 1 f2rc7820_wr(F2T17ql_reg,0x0F);
61 1 f2rc7820_wr(F2T18ql_reg,0x0F);
62 1
63 1 f2rc7820_wr(F2Qlos_reg1,0x00);
64 1 f2rc7820_wr(F2Qlos_reg2,0x00);
65 1
66 1 f2rc7820_wr(F2Ft11revql_reg,0x00);
67 1 f2rc7820_wr(F2Ft12revql_reg,0x00);
68 1 f2rc7820_wr(F2Ft13revql_reg,0x00);
69 1 f2rc7820_wr(F2Ft14revql_reg,0x00);
70 1 f2rc7820_wr(F2Ft15revql_reg,0x00);
71 1 f2rc7820_wr(F2Ft16revql_reg,0x00);
72 1 f2rc7820_wr(F2Ft17revql_reg,0x00);
73 1 f2rc7820_wr(F2Ft18revql_reg,0x00);
74 1
75 1 f2rc7820_wr(F2Ft41ql_reg,0x00);
76 1 f2rc7820_wr(F2Ft42ql_reg,0x00);
77 1
78 1 f2rc7820_wr(F2Loopback_reg,0x00);
79 1 f2rc7820_wr(F2Station_reg,0x00);
80 1 f2rc7820_wr(F2Frep_reg,0x60);
81 1
82 1 f2rc7820_wr(F2T11ts_reg,0x00);
83 1 f2rc7820_wr(F2T12ts_reg,0x01);
84 1 f2rc7820_wr(F2T13ts_reg,0x02);
85 1 f2rc7820_wr(F2T14ts_reg,0x03);
86 1 f2rc7820_wr(F2T15ts_reg,0x04);
87 1 f2rc7820_wr(F2T16ts_reg,0x05);
88 1 f2rc7820_wr(F2T17ts_reg,0x06);
89 1 f2rc7820_wr(F2T18ts_reg,0x07);
90 1
91 1 f2rc7820_wr(F2T11revts_reg,0x00);
92 1 f2rc7820_wr(F2T12revts_reg,0x01);
93 1 f2rc7820_wr(F2T13revts_reg,0x02);
94 1 f2rc7820_wr(F2T14revts_reg,0x03);
95 1 f2rc7820_wr(F2T15revts_reg,0x04);
96 1 f2rc7820_wr(F2T16revts_reg,0x05);
97 1 f2rc7820_wr(F2T17revts_reg,0x06);
98 1 f2rc7820_wr(F2T18revts_reg,0x07);
99 1
100 1 // f2rc7820_wr(F2Encrypt_reg,0x55); //close 7820 write reg
101 1
102 1 }
MODULE INFORMATION: STATIC OVERLAYABLE
CODE SIZE = 428 ----
CONSTANT SIZE = ---- ----
XDATA SIZE = ---- ----
PDATA SIZE = ---- ----
DATA SIZE = ---- ----
IDATA SIZE = ---- ----
BIT SIZE = ---- ----
END OF MODULE INFORMATION.
C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
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