📄 timeslot_handle.lst
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135 4 case 4: inporth=0;
136 4 inportl=0xDD;
137 4 break;
138 4 case 5: inporth=0x08;
139 4 inportl=0x4D;
140 4 break;
141 4 case 6: inporth=0x08;
142 4 inportl=0x7D;
143 4 break;
144 4 case 7: inporth=0x08;
145 4 inportl=0xAD;
146 4 break;
147 4 case 8: inporth=0x08;
148 4 inportl=0xDD;
149 4 break;
150 4 case 9: inporth=0x10;
151 4 inportl=0x4D;
152 4 break;
153 4 case 10: inporth=0x10;
154 4 inportl=0x7D;
155 4 break;
156 4 case 11: inporth=0x10;
157 4 inportl=0xAD;
158 4 break;
159 4 case 12: inporth=0x10;
160 4 inportl=0xDD;
161 4 break;
162 4 case 13: inporth=0x18;
163 4 inportl=0x4D;
164 4 break;
165 4 case 14: inporth=0x18;
166 4 inportl=0x7D;
167 4 break;
168 4 case 15: inporth=0x18;
169 4 inportl=0xAD;
170 4 break;
171 4 case 16: inporth=0x18;
172 4 inportl=0xDD;
173 4 break;
174 4 case 17: inporth=0x20;
175 4 inportl=0x4D;
176 4 break;
177 4 case 18: inporth=0x20;
178 4 inportl=0x7D;
C51 COMPILER V7.50 TIMESLOT_HANDLE 03/10/2006 16:35:26 PAGE 4
179 4 break;
180 4 case 19: inporth=0x20;
181 4 inportl=0xAD;
182 4 break;
183 4 case 20: inporth=0x20;
184 4 inportl=0xDD;
185 4 break;
186 4 case 21: inporth=0x28;
187 4 inportl=0x4D;
188 4 break;
189 4 default: break;
190 4 }
191 3 switch (tsset_Dport){ //得出EOS中的下行支路号
192 4 case 1: outport = 0x07;
193 4 break;
194 4 case 2: outport = 0x08;
195 4 break;
196 4 case 3: outport = 0x09;
197 4 break;
198 4 case 4: outport = 0x0A;
199 4 break;
200 4 case 5: outport = 0x0B;
201 4 break;
202 4 default:break;
203 4 }
204 3 switch (tsset_Sport){ //得出EOS中的上行支路号
205 4 case 1: inport = 0x01;
206 4 break;
207 4 case 2: inport = 0x02;
208 4 break;
209 4 case 3: inport = 0x03;
210 4 break;
211 4 case 4: inport = 0x04;
212 4 break;
213 4 case 5: inport = 0x05;
214 4 break;
215 4 default:break;
216 4 }
217 3 switch (tsset_Sboard){
218 4 case 5: switch (tsset_Dboard){ //源盘为MCB盘
219 5 case 5: if (tsset_Sport == 1){ //目的盘为MCB盘input 光口 0
220 6 if (tsset_Dport == 1)
221 6 PTUN(0,tsset_Dslot-1)=0; //output 光口 0
222 6 else
223 6 PTUN(1,tsset_Dslot-1)=0; //output 光口 1
224 6 }
225 5 else { //input 光口 1
226 6 if (tsset_Dport == 1)
227 6 PTUN(0,tsset_Dslot-1)=1; //output 光口 0
228 6 else
229 6 PTUN(1,tsset_Dslot-1)=1; //output 光口 1
230 6 }
231 5 return_value=0; //返回值0成功
232 5 break;
233 5 case 4: if(start_flg[0] == 0){
234 6 if (tsset_Sport==1){ //目的盘为OTB盘input 光口 0
235 7 if (tsset_Dport == 1)
236 7 PTUN(2,tsset_Dslot-1)=0;//output 光口 2
237 7 else
238 7 PTUN(3,tsset_Dslot-1)=0;//output 光口 3
239 7 }
240 6 else { //input 光口 1
C51 COMPILER V7.50 TIMESLOT_HANDLE 03/10/2006 16:35:26 PAGE 5
241 7 if (tsset_Dport == 1)
242 7 PTUN(2,tsset_Dslot-1)=1;//output 光口 2
243 7 else
244 7 PTUN(3,tsset_Dslot-1)=1;
245 7 }
246 6 return_value = 0;
247 6 }
248 5 else return_value = 2;
249 5 break;
250 5 case 3: if (tsset_Dboard == 3){
251 6 if (tsset_Sport==1)
252 6 {
253 7 PTUN(4,tsset_Sslot-1)=0;
254 7 }
255 6 else {
256 7 PTUN(4,tsset_Sslot-1)=1;
257 7 }
258 6 }
259 5 case 2: if (tsset_Dboard == 2){
260 6 if (tsset_Sport==1){
261 7 PTUN(6,tsset_Sslot-1)=0;
262 7 }
263 6 else {
264 7 PTUN(6,tsset_Sslot-1)=1;
265 7 }
266 6 }
267 5 case 1: if (tsset_Dboard == 1){
268 6 if (tsset_Sport==1){
269 7 PTUN(5,tsset_Sslot-1)=0;
270 7 }
271 6 else {
272 7 PTUN(5,tsset_Sslot-1)=1;
273 7 }
274 6 }
275 5 if ((start_flg[tsset_Dboard] == 0) & (tsset_Dtype == 2))
276 5 {
277 6 se0111_reg_wr(outporth,outportl,tsset_Dslot,tsset_Dboard); //配置Mapper下行支路寄存器
278 6 timeslot_2M[tsset_Dboard-1][tsset_Dport - 1] = 1; //标记下行时隙配置，作为2M盘的告警、性能标志⌨️ 快捷键说明
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