📄 timeslot_handle.c
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PTUN(2,tsset_Dslot-1)=3;//output 光口 2
else
PTUN(3,tsset_Dslot-1)=3;
}
return_value=0;
}
else return_value = 2;
break;
case 3: if (tsset_Dboard == 3){
if (tsset_Sport==1)
{
PTUN(4,tsset_Sslot-1)=2;
}
else {
PTUN(4,tsset_Sslot-1)=3;
}
}
case 2: if (tsset_Dboard == 2){
if (tsset_Sport==1){
PTUN(6,tsset_Sslot-1)=2;
}
else {
PTUN(6,tsset_Sslot-1)=3;
}
}
case 1: if (tsset_Dboard == 1){
if (tsset_Sport==1){
PTUN(5,tsset_Sslot-1)=2;
}
else {
PTUN(5,tsset_Sslot-1)=3;
}
}
if (start_flg[tsset_Dboard]==0 & (tsset_Dtype==2))
{
se0111_reg_wr(outporth,outportl,tsset_Sslot,tsset_Dboard);
timeslot_2M[tsset_Dboard-1][tsset_Dport - 1] = 1; //标记下行时隙配置，作为2M盘的告警、性能标志位
return_value = 0;
}
else if (start_flg_EOS[tsset_Dboard]==0 & (tsset_Dtype==3))
{
se0121_reg_wr(outport,tsset_Dslot,tsset_Dboard);
return_value = 0;
}
else return_value = 2;
break;
default:return_value=2;
break;
}
break;
case 3: switch (tsset_Dboard){
case 5: if (tsset_Dport == 1)
PTUN(0,tsset_Dslot-1)=4; //配置上行时隙，并发
else
PTUN(1,tsset_Dslot-1)=4;
if (start_flg[3] == 0){
se0111_reg_wr(inporth,inportl,tsset_Sslot,3);//？？A路B路问题 //配置Mapper上行支路号
timeslot_2M[2][tsset_Sport - 1] = 1;
return_value=0;
}
else if (start_flg_EOS[3] == 0){
se0121_reg_wr(inport,tsset_Dslot,3);
return_value = 0;
}
else return_value = 2;
break;
case 4: if (tsset_Dport == 1)
PTUN(2,tsset_Dslot-1)=4;
else
PTUN(3,tsset_Dslot-1)=4;
if (start_flg[0] == 0 & start_flg[3] == 0){
se0111_reg_wr(inporth,inportl,tsset_Sslot,3)//A路B路;
timeslot_2M[2][tsset_Sport - 1] = 1;
return_value=0;
}
else if (start_flg[0] == 0 & start_flg_EOS[3] == 0){
se0121_reg_wr(inport,tsset_Dslot,3);
return_value = 0;
}
else return_value = 2;
break;
case 3: if (tsset_Dboard == 3){
PTUN(4,tsset_Sslot-1)=4;
}
case 2: if (tsset_Dboard == 2){
PTUN(6,tsset_Sslot-1)=4;
}
case 1: if (tsset_Dboard == 1){
PTUN(5,tsset_Sslot-1)=4;
}
if (start_flg[tsset_Dboard]==0 & start_flg[3]==0 & (tsset_Dtype==2))
{
se0111_reg_wr(inporth,inportl,tsset_Sslot,3);
se0111_reg_wr(outporth,outportl,tsset_Sslot,tsset_Dboard);
timeslot_2M[tsset_Dboard-1][tsset_Dport - 1] = 1; //标记下行时隙配置，作为2M盘的告警、性能标志位
return_value = 0;
}
else if (start_flg_EOS[tsset_Dboard]==0 & start_flg_EOS[3]==0 & (tsset_Dtype==3))
{
se0121_reg_wr(inport,tsset_Dslot,3);
se0121_reg_wr(outport,tsset_Dslot,tsset_Dboard);
return_value = 0;
}
else return_value = 2;
break;
default:return_value=2;
break;
}
break;
case 2: switch (tsset_Dboard){
case 5: if (tsset_Dport == 1)
PTUN(0,tsset_Dslot-1)=6;
else
PTUN(1,tsset_Dslot-1)=6;
if (start_flg[2] == 0){
se0111_reg_wr(inporth,inportl,tsset_Sslot,2);
timeslot_2M[1][tsset_Sport - 1] = 1;
return_value=0;
}
else if (start_flg_EOS[2] == 0){
se0121_reg_wr(inport,tsset_Dslot,2);
return_value = 0;
}
else return_value = 2;
break;
case 4: if (tsset_Dport == 1)
PTUN(2,tsset_Dslot-1)=6;
else
PTUN(3,tsset_Dslot-1)=6;
if (start_flg[0] == 0 & start_flg[2] == 0){
se0111_reg_wr(inporth,inportl,tsset_Sslot,2);
timeslot_2M[1][tsset_Sport - 1] = 1;
return_value=0;
}
else if (start_flg[0] == 0 & start_flg_EOS[2] == 0){
se0121_reg_wr(inport,tsset_Dslot,2);
return_value = 0;
}
else return_value = 2;
break;
case 3: if (tsset_Dboard == 3){
PTUN(4,tsset_Sslot-1)=6;
}
case 2: if (tsset_Dboard == 2){
PTUN(6,tsset_Sslot-1)=6;
}
case 1: if (tsset_Dboard == 1){
PTUN(5,tsset_Sslot-1)=6;
}
if (start_flg[tsset_Dboard]==0 & start_flg[2]==0 & (tsset_Dtype==2))
{
se0111_reg_wr(inporth,inportl,tsset_Sslot,2);
se0111_reg_wr(outporth,outportl,tsset_Sslot,tsset_Dboard);
timeslot_2M[tsset_Dboard-1][tsset_Dport - 1] = 1; //标记下行时隙配置，作为2M盘的告警、性能标志位
return_value = 0;
}
else if (start_flg_EOS[tsset_Dboard]==0 & start_flg_EOS[2]==0 & (tsset_Dtype==3))
{
se0121_reg_wr(inport,tsset_Dslot,2);
se0121_reg_wr(outport,tsset_Dslot,tsset_Dboard);
return_value = 0;
}
else return_value = 2;
break;
default:return_value=2;
break;
}
break;
case 1: switch (tsset_Dboard){
case 5: if (tsset_Dport == 1)
PTUN(0,tsset_Dslot-1)=5;
else
PTUN(1,tsset_Dslot-1)=5;
if (start_flg[1] == 0){
se0111_reg_wr(inporth,inportl,tsset_Dslot,1);
timeslot_2M[0][tsset_Sport - 1] = 1;
return_value=0;
}
else if (start_flg_EOS[1] == 0){
se0121_reg_wr(inport,tsset_Dslot,1);
return_value = 0;
}
else return_value = 2;
break;
case 4: if (tsset_Dport == 1)
PTUN(2,tsset_Dslot-1)=5;
else
PTUN(3,tsset_Dslot-1)=5;
if (start_flg[1] == 0){
se0111_reg_wr(inporth,inportl,tsset_Sslot,1);
timeslot_2M[0][tsset_Sport - 1] = 1;
return_value=0;
}
else if (start_flg[0] == 0 & start_flg_EOS[1] == 0){
se0121_reg_wr(inport,tsset_Dslot,1);
return_value = 0;
}
else return_value = 2;
break;
case 3: if (tsset_Dboard == 3){
PTUN(4,tsset_Sslot-1)=5;
}
case 2: if (tsset_Dboard == 2){
PTUN(6,tsset_Sslot-1)=5;
}
case 1: if (tsset_Dboard == 1){
PTUN(5,tsset_Sslot-1)=5;
}
if (start_flg[tsset_Dboard]==0 & start_flg[1]==0 & (tsset_Dtype==2))
{
se0111_reg_wr(inporth,inportl,tsset_Sslot,1);
se0111_reg_wr(outporth,outportl,tsset_Sslot,tsset_Dboard);
timeslot_2M[tsset_Dboard-1][tsset_Dport - 1] = 1; //标记下行时隙配置，作为2M盘的告警、性能标志位
return_value = 0;
}
else if (start_flg_EOS[tsset_Dboard]==0 & start_flg_EOS[1]==0 & (tsset_Dtype==3))
{
se0121_reg_wr(inport,tsset_Dslot,1);
se0121_reg_wr(outport,tsset_Dslot,tsset_Dboard);
return_value = 0;
}
else return_value = 2;
break;
default:return_value=2;
break;
}
break;
default:return_value=2;
break;
}
}
else return_value = 2;
}
else return_value = 2;
if (!GetResRdyTbl(1))
SetResRdyTbl(1); //置响应事件列表相应位为1
return (return_value); //返回函数执行结果
}
unsigned char timeslot_del(struct cmd_para_save *timeslot_dl){
//C01删除时隙函数
unsigned char xdata tsset_Sboard;
unsigned char xdata tsset_Stype;
unsigned char xdata tsset_Sslot;
unsigned char xdata tsset_Sport;
unsigned char xdata tsset_Dboard;
unsigned char xdata tsset_Dtype;
unsigned char xdata tsset_Dslot;
unsigned char xdata tsset_Dport;
unsigned char xdata outporth;
unsigned char xdata outportl;
unsigned char xdata inporth;
unsigned char xdata inportl;
unsigned char xdata outport;
unsigned char xdata inport;
unsigned char xdata temp;
unsigned char xdata return_value;
commandid=0x00433031; //删除时隙命令代码
tsset_Sboard=timeslot_dl->tsdel_Sboard; //源盘盘号
tsset_Stype=timeslot_dl->tsdel_Stype;
tsset_Sslot=timeslot_dl->tsdel_Sslot; //源盘时隙号
tsset_Sport=timeslot_dl->tsdel_Sport; //源盘端口号
tsset_Dboard=timeslot_dl->tsdel_Dboard; //目的盘盘号
tsset_Dtype=timeslot_dl->tsdel_Dtype;
tsset_Dslot=timeslot_dl->tsdel_Dslot; //目的盘时隙号
tsset_Dport=timeslot_dl->tsdel_Dport; //目的盘端口号
if ((tsset_Sslot > 0) & (tsset_Sslot < 64)){
switch (tsset_Dport){ //得出Mapper中下行支路号
case 1: outporth=0x04;
outportl=0x20;
break;
case 2: outporth=0x04;
outportl=0x40;
break;
case 3: outporth=0x04;
outportl=0x60;
break;
case 4: outporth=0x04;
outportl=0x80;
break;
case 5: outporth=0x04;
outportl=0xA0;
break;
case 6: outporth=0x04;
outportl=0xC0;
break;
case 7: outporth=0x04;
outportl=0xE0;
break;
case 8: outporth=0x05;
outportl=0x20;
break;
case 9: outporth=0x05;
outportl=0x40;
break;
case 10: outporth=0x05;
outportl=0x60;
break;
case 11: outporth=0x05;
outportl=0x80;
break;
case 12: outporth=0x05;
outportl=0xA0;
break;
case 13: outporth=0x05;
outportl=0xC0;
break;
case 14: outporth=0x05;
outportl=0xE0;
break;
case 15: outporth=0x06;
outportl=0x20;
break;
case 16: outporth=0x06;
outportl=0x40;
break;
case 17: outporth=0x06;
outportl=0x60;
break;
case 18: outporth=0x06;
outportl=0x80;
break;
case 19: outporth=0x06;
outportl=0xA0;
break;
case 20: outporth=0x06;
outportl=0xC0;
break;
case 21: outporth=0x06;
outportl=0xE0;
break;
default: break;
}
/*
switch (tsset_Dport){ //得出Mapper中下行支路号
case 1: outporth=0;
outportl=0x4C;
break;
case 2: outporth=0;
outportl=0x7C;
break;
case 3: outporth=0;
outportl=0xAC;
break;
case 4: outporth=0;
outportl=0xDC;
break;
case 5: outporth=0x08;
outportl=0x4C;
break;
case 6: outporth=0x08;
outportl=0x7C;
break;
case 7: outporth=0x08;
outportl=0xAC;
break;
case 8: outporth=0x08;
outportl=0xDC;
break;
case 9: outporth=0x10;
outportl=0x4C;
break;
case 10: outporth=0x10;
outportl=0x7C;
break;
case 11: outporth=0x10;
outportl=0xAC;
break;
case 12: outporth=0x10;
outportl=0xDC;
break;
case 13: outporth=0x18;
outportl=0x4C;
break;
case 14: outporth=0x18;
outportl=0x7C;
break;
case 15: outporth=0x18;
outportl=0xAC;
break;
case 16: outporth=0x18;
outportl=0xDC;
break;
case 17: outporth=0x20;
outportl=0x4C;
break;
case 18: outporth=0x20;
outportl=0x7C;
break;
case 19: outporth=0x20;
outportl=0xAC;
break;
case 20: outporth=0x20;
outportl=0xDC;
break;
case 21: outporth=0x28;
outportl=0x4C;
break;
default: break;
}
*/
switch (tsset_Sport){ //得出Mapper中的上行支路号
case 1: inporth=0x04;
inportl=0x21;
break;
case 2: inporth=0x04;
inportl=0x41;
break;
case 3: inporth=0x04;
inportl=0x61;
break;
case 4: inporth=0x04;
inportl=0x81;
break;
case 5: inporth=0x04;
inportl=0xA1;
break;
case 6: inporth=0x04;
inportl=0xC1;
break;
case 7: inporth=0x04;
inportl=0xE1;
break;
case 8: inporth=0x05;
inportl=0x21;
break;
case 9: inporth=0x05;
inportl=0x41;
break;
case 10: inporth=0x05;
inportl=0x61;
break;
case 11: inporth=0x05;
inportl=0x81;
break;
case 12: inporth=0x05;
inportl=0xA1;
break;
case 13: inporth=0x05;
inportl=0xC1;
break;
case 14: inporth=0x05;
inportl=0xE1;
break;
case 15: inporth=0x06;
inportl=0x21;
break;
case 16: inporth=0x06;
inportl=0x41;
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