📄 timeslot_handle.c.bak
字号:
break;
case 3: switch (tsset_Dboard){
case 5: if (start_flg[3] == 0){
if (tsset_Dport == 1)
PTUN(0,tsset_Dslot-1)=4; //配置上行时隙，并发
else
PTUN(1,tsset_Dslot-1)=4;
se0111_reg_wr(inporth,inportl,tsset_Sslot,3); //配置Mapper上行支路号
timeslot_2M[2][tsset_Sport - 1] = 1;
return_value=0;
}
else return_value = 2;
break;
case 4: if (start_flg[0] == 0 & start_flg[3] == 0){
if (tsset_Dport == 1)
PTUN(2,tsset_Dslot-1)=4;
else
PTUN(3,tsset_Dslot-1)=4;
se0111_reg_wr(inporth,inportl,tsset_Sslot,3);
timeslot_2M[2][tsset_Sport - 1] = 1;
return_value=0;
}
else return_value = 2;
break;
case 3: if (start_flg[3] == 0){
PTUN(4,tsset_Sslot-1)=4;
se0111_reg_wr(inporth,inportl,tsset_Sslot,3);
se0111_reg_wr(outporth,outportl,tsset_Sslot,3);
timeslot_2M[2][tsset_Sport - 1] = 1; //标记下行时隙配置，作为2M盘的告警、性能标志位
return_value=0;
}
else return_value = 2;
break;
case 2: if (start_flg[2] == 0 & start_flg[3] == 0){
PTUN(6,tsset_Sslot-1)=4;
se0111_reg_wr(inporth,inportl,tsset_Sslot,3);
se0111_reg_wr(outporth,outportl,tsset_Sslot,2);
timeslot_2M[1][tsset_Sport - 1] = 1; //标记下行时隙配置，作为2M盘的告警、性能标志位
return_value=0;
}
else return_value = 2;
break;
case 1: if (start_flg[1] == 0 & start_flg[3] == 0){
PTUN(5,tsset_Sslot-1)=4;
se0111_reg_wr(inporth,inportl,tsset_Sslot,3);
se0111_reg_wr(outporth,outportl,tsset_Sslot,1);
timeslot_2M[0][tsset_Sport - 1] = 1; //标记下行时隙配置，作为2M盘的告警、性能标志位
return_value=0;
}
else return_value = 2;
break;
default:return_value=2;
break;
}
break;
case 2: switch (tsset_Dboard){
case 5: if (start_flg[2] == 0){
if (tsset_Dport == 1)
PTUN(0,tsset_Dslot-1)=6;
else
PTUN(1,tsset_Dslot-1)=6;
se0111_reg_wr(inporth,inportl,tsset_Sslot,2);
timeslot_2M[1][tsset_Sport - 1] = 1;
return_value=0;
}
else return_value = 2;
break;
case 4: if (start_flg[0] == 0 & start_flg[2] == 0){
if (tsset_Dport == 1)
PTUN(2,tsset_Dslot-1)=6;
else
PTUN(3,tsset_Dslot-1)=6;
se0111_reg_wr(inporth,inportl,tsset_Sslot,2);
timeslot_2M[1][tsset_Sport - 1] = 1;
return_value=0;
}
else return_value = 2;
break;
case 3: if (start_flg[3] == 0 & start_flg[2] == 0){
PTUN(4,tsset_Sslot-1)=6;
se0111_reg_wr(inporth,inportl,tsset_Sslot,2);
se0111_reg_wr(outporth,outportl,tsset_Sslot,3);
timeslot_2M[2][tsset_Sport - 1] = 1; //标记下行时隙配置，作为2M盘的告警、性能标志位
return_value=0;
}
else return_value = 2;
break;
case 2: if (start_flg[2] == 0){
PTUN(6,tsset_Sslot-1)=6;
se0111_reg_wr(inporth,inportl,tsset_Sslot,2);
se0111_reg_wr(outporth,outportl,tsset_Sslot,2);
timeslot_2M[1][tsset_Sport - 1] = 1; //标记下行时隙配置，作为2M盘的告警、性能标志位
return_value=0;
}
else return_value = 2;
break;
case 1: if (start_flg[1] == 0 & start_flg[2] == 0){
PTUN(5,tsset_Sslot-1)=6;
se0111_reg_wr(inporth,inportl,tsset_Sslot,2);
se0111_reg_wr(outporth,outportl,tsset_Sslot,1);
timeslot_2M[0][tsset_Sport - 1] = 1; //标记下行时隙配置，作为2M盘的告警、性能标志位
return_value=0;
}
else return_value = 2;
break;
default:return_value=2;
break;
}
break;
case 1: switch (tsset_Dboard){
case 5: if (start_flg[1] == 0){
if (tsset_Dport == 1)
PTUN(0,tsset_Dslot-1)=5;
else
PTUN(1,tsset_Dslot-1)=5;
se0111_reg_wr(inporth,inportl,tsset_Dslot,1);
timeslot_2M[0][tsset_Sport - 1] = 1;
return_value=0;
}
else return_value = 2;
break;
case 4: if (start_flg[0] == 0 & start_flg[1] == 0){
if (tsset_Dport == 1)
PTUN(2,tsset_Dslot-1)=5;
else
PTUN(3,tsset_Dslot-1)=5;
se0111_reg_wr(inporth,inportl,tsset_Sslot,1);
timeslot_2M[0][tsset_Sport - 1] = 1;
return_value=0;
}
else return_value = 2;
break;
case 3: if (start_flg[3] == 0 & start_flg[1] == 0){
PTUN(4,tsset_Sslot-1)=5;
se0111_reg_wr(inporth,inportl,tsset_Sslot,1);
se0111_reg_wr(outporth,outportl,tsset_Sslot,3);
timeslot_2M[2][tsset_Sport - 1] = 1; //标记下行时隙配置，作为2M盘的告警、性能标志位
return_value = 0;
}
else return_value = 2;
break;
case 2: if (start_flg[2] == 0 & start_flg[1] == 0){
PTUN(6,tsset_Sslot-1)=5;
se0111_reg_wr(inporth,inportl,tsset_Sslot,1);
se0111_reg_wr(outporth,outportl,tsset_Sslot,2);
timeslot_2M[1][tsset_Sport - 1] = 1; //标记下行时隙配置，作为2M盘的告警、性能标志位
return_value=0;
}
else return_value = 2;
break;
case 1: if (start_flg[1] == 0){
PTUN(5,tsset_Sslot-1)=5;
se0111_reg_wr(inporth,inportl,tsset_Sslot,1);
se0111_reg_wr(outporth,outportl,tsset_Sslot,1);
timeslot_2M[0][tsset_Sport - 1] = 1; //标记下行时隙配置，作为2M盘的告警、性能标志位
return_value=0;
}
else return_value = 2;
break;
default:return_value=2;
break;
}
break;
default:return_value=2;
break;
}
}
else return_value = 2;
}
else return_value = 2;
if (!GetResRdyTbl(1))
SetResRdyTbl(1); //置响应事件列表相应位为1
return (return_value); //返回函数执行结果
}
/************************************************************************************
unsigned char timeslot_setup(struct cmd_para_save *timeslot_set){
//C00建立时隙函数
unsigned char xdata tsset_Sboard;
unsigned char xdata tsset_Sslot;
unsigned char xdata tsset_Sport;
unsigned char xdata tsset_Dboard;
unsigned char xdata tsset_Dslot;
unsigned char xdata tsset_Dport;
unsigned char xdata outporth;
unsigned char xdata outportl;
unsigned char xdata inporth;
unsigned char xdata inportl;
// unsigned char xdata boardstate;
unsigned char xdata return_value;
commandid=0x00433030; //建立时隙命令代码
tsset_Sboard=timeslot_set->tsset_Sboard; //源盘盘号
tsset_Sslot=timeslot_set->tsset_Sslot; //源盘时隙号
tsset_Sport=timeslot_set->tsset_Sport; //源盘端口号
tsset_Dboard=timeslot_set->tsset_Dboard; //目的盘盘号
tsset_Dslot=timeslot_set->tsset_Dslot; //目的盘时隙号
tsset_Dport=timeslot_set->tsset_Dport; //目的盘端口号
// boardstate = 0x51;
if ((tsset_Sslot > 0) & (tsset_Sslot < 64)){
if ((tsset_Sport < 22) & (tsset_Dport < 22)){
switch (tsset_Dport){ //得出Mapper中的下行支路号
case 1: outporth=0;
outportl=0x4C;
break;
case 2: outporth=0;
outportl=0x7C;
break;
case 3: outporth=0;
outportl=0xAC;
break;
case 4: outporth=0;
outportl=0xDC;
break;
case 5: outporth=0x08;
outportl=0x4C;
break;
case 6: outporth=0x08;
outportl=0x7C;
break;
case 7: outporth=0x08;
outportl=0xAC;
break;
case 8: outporth=0x08;
outportl=0xDC;
break;
case 9: outporth=0x10;
outportl=0x4C;
break;
case 10: outporth=0x10;
outportl=0x7C;
break;
case 11: outporth=0x10;
outportl=0xAC;
break;
case 12: outporth=0x10;
outportl=0xDC;
break;
case 13: outporth=0x18;
outportl=0x4C;
break;
case 14: outporth=0x18;
outportl=0x7C;
break;
case 15: outporth=0x18;
outportl=0xAC;
break;
case 16: outporth=0x18;
outportl=0xDC;
break;
case 17: outporth=0x20;
outportl=0x4C;
break;
case 18: outporth=0x20;
outportl=0x7C;
break;
case 19: outporth=0x20;
outportl=0xAC;
break;
case 20: outporth=0x20;
outportl=0xDC;
break;
case 21: outporth=0x28;
outportl=0x4C;
break;
default: break;
}
switch (tsset_Sport){ //得出Mapper中的上行支路号
case 1: inporth=0;
inportl=0x4D;
break;
case 2: inporth=0;
inportl=0x7D;
break;
case 3: inporth=0;
inportl=0xAD;
break;
case 4: inporth=0;
inportl=0xDD;
break;
case 5: inporth=0x08;
inportl=0x4D;
break;
case 6: inporth=0x08;
inportl=0x7D;
break;
case 7: inporth=0x08;
inportl=0xAD;
break;
case 8: inporth=0x08;
inportl=0xDD;
break;
case 9: inporth=0x10;
inportl=0x4D;
break;
case 10: inporth=0x10;
inportl=0x7D;
break;
case 11: inporth=0x10;
inportl=0xAD;
break;
case 12: inporth=0x10;
inportl=0xDD;
break;
case 13: inporth=0x18;
inportl=0x4D;
break;
case 14: inporth=0x18;
inportl=0x7D;
break;
case 15: inporth=0x18;
inportl=0xAD;
break;
case 16: inporth=0x18;
inportl=0xDD;
break;
case 17: inporth=0x20;
inportl=0x4D;
break;
case 18: inporth=0x20;
inportl=0x7D;
break;
case 19: inporth=0x20;
inportl=0xAD;
break;
case 20: inporth=0x20;
inportl=0xDD;
break;
case 21: inporth=0x28;
inportl=0x4D;
break;
default: break;
}
switch (tsset_Sboard){
case 5: switch (tsset_Dboard){ //源盘为MCB盘
case 5: if (tsset_Sport == 1){ //目的盘为MCB盘input 光口 0
if (tsset_Dport == 1)
PTUN(0,tsset_Dslot-1)=0; //output 光口 0
else
PTUN(1,tsset_Dslot-1)=0; //output 光口 1
}
else { //input 光口 1
if (tsset_Dport == 1)
PTUN(0,tsset_Dslot-1)=1; //output 光口 0
else
PTUN(1,tsset_Dslot-1)=1; //output 光口 1
}
return_value=0; //返回值0成功
break;
case 4: if(start_flg[0] == 0){
if (tsset_Sport==1){ //目的盘为OTB盘input 光口 0
if (tsset_Dport == 1)
PTUN(2,tsset_Dslot-1)=0; //output 光口 2
else
PTUN(3,tsset_Dslot-1)=0; //output 光口 3
}
else { //input 光口 1
if (tsset_Dport == 1)
PTUN(2,tsset_Dslot-1)=1; //output 光口 2
else
PTUN(3,tsset_Dslot-1)=1;
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