📄 init_se0111.src

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			; SOURCE LINE # 46
?C0018:
	RET  	
; END OF _se0111_reg_wr

; 
; 
; unsigned char se0111_reg_rd(unsigned char Haddr,unsigned char Laddr,unsigned char slot){

	RSEG  ?PR?_se0111_reg_rd?INIT_SE0111
_se0111_reg_rd:
	USING	0
			; SOURCE LINE # 49
	MOV  	Haddr?247,R7
	MOV  	Laddr?248,R5
	MOV  	slot?249,R3
; 	unsigned char value;
; 	switch(slot){
			; SOURCE LINE # 51
	MOV  	A,slot?249
	LCALL	?C?CCASE
	DW   	?C0020
	DB   	01H
	DW   	?C0021
	DB   	02H
	DW   	?C0022
	DB   	03H
	DW   	00H
	DW   	?C0019
; 		case 1	:
			; SOURCE LINE # 52
?C0020:
; 				P1 = 0x40; break;
			; SOURCE LINE # 53
	MOV  	P1,#040H
	SJMP 	?C0019
; 		case 2	:
			; SOURCE LINE # 54
?C0021:
; 				P1 = 0x20; break;
			; SOURCE LINE # 55
	MOV  	P1,#020H
	SJMP 	?C0019
; 		case 3	:
			; SOURCE LINE # 56
?C0022:
; 				P1 = 0x60; break;
			; SOURCE LINE # 57
	MOV  	P1,#060H
; 	}
			; SOURCE LINE # 58
?C0019:
; 	ADDRH = Haddr | 0x80;
			; SOURCE LINE # 59
	MOV  	A,Haddr?247
	ORL  	A,#080H
	MOV  	R7,A
	MOV  	DPTR,#0A400H
	MOV  	A,R7
	MOVX 	@DPTR,A
; 	ADDRL = Laddr;
			; SOURCE LINE # 60
	MOV  	DPTR,#0A000H
	MOV  	A,Laddr?248
	MOVX 	@DPTR,A
; 	value = SE0111_reg;
			; SOURCE LINE # 61
	MOV  	DPTR,#09C00H
	MOVX 	A,@DPTR
	MOV  	R7,A
	MOV  	value?250,R7
; 
; 	ADDRH = 0xFF;
			; SOURCE LINE # 63
	MOV  	DPTR,#0A400H
	MOV  	A,#0FFH
	MOVX 	@DPTR,A
; 	ADDRL = 0xFF;
			; SOURCE LINE # 64
	MOV  	DPTR,#0A000H
	MOV  	A,#0FFH
	MOVX 	@DPTR,A
; 	P1 = 0;
			; SOURCE LINE # 65
	MOV  	P1,#00H
; 	return(value);
			; SOURCE LINE # 66
	MOV  	R7,value?250
; }
			; SOURCE LINE # 67
?C0023:
	RET  	
; END OF _se0111_reg_rd

; 
; 
; void reset_se0111(unsigned char slot){

	RSEG  ?PR?_reset_se0111?INIT_SE0111
_reset_se0111:
	USING	0
			; SOURCE LINE # 70
	MOV  	slot?351,R7
; 	switch(slot){
			; SOURCE LINE # 71
	MOV  	A,slot?351
	LCALL	?C?CCASE
	DW   	?C0025
	DB   	01H
	DW   	?C0026
	DB   	02H
	DW   	?C0027
	DB   	03H
	DW   	00H
	DW   	?C0024
; 		case 1	:
			; SOURCE LINE # 72
?C0025:
; 				P1 = 0x40; break;
			; SOURCE LINE # 73
	MOV  	P1,#040H
	SJMP 	?C0024
; 		case 2	:
			; SOURCE LINE # 74
?C0026:
; 				P1 = 0x20; break;
			; SOURCE LINE # 75
	MOV  	P1,#020H
	SJMP 	?C0024
; 		case 3	:
			; SOURCE LINE # 76
?C0027:
; 				P1 = 0x60; break;
			; SOURCE LINE # 77
	MOV  	P1,#060H
; 	}
			; SOURCE LINE # 78
?C0024:
; 	ADDRH = 0;
			; SOURCE LINE # 79
	MOV  	DPTR,#0A400H
	CLR  	A
	MOVX 	@DPTR,A
; 	delay();
			; SOURCE LINE # 80
	LCALL	delay
; 	ADDRH = 0x80;		//reset se0111
			; SOURCE LINE # 81
	MOV  	DPTR,#0A400H
	MOV  	A,#080H
	MOVX 	@DPTR,A
; 
; 	P1 = 0;
			; SOURCE LINE # 83
	MOV  	P1,#00H
; }
			; SOURCE LINE # 84
?C0028:
	RET  	
; END OF _reset_se0111

; 
; void init_se0111(unsigned char slot){

	RSEG  ?PR?_init_se0111?INIT_SE0111
_init_se0111:
	USING	0
			; SOURCE LINE # 86
	MOV  	slot?452,R7
; 	
; //	unsigned int i;
; 	
; 	reset_se0111(slot);
			; SOURCE LINE # 90
	MOV  	R7,slot?452
	LCALL	_reset_se0111
; 	
; 	se0111_reg_wr(TEST_H,TEST_L,0x00,slot);
			; SOURCE LINE # 92
	MOV  	?_se0111_reg_wr?BYTE+03H,slot?452
	MOV  	R3,#00H
	MOV  	R5,#03H
	MOV  	R7,#00H
	LCALL	_se0111_reg_wr
; 	se0111_reg_wr(Genctrl_reg1_H,Genctrl_reg1_L,0x50,slot);
			; SOURCE LINE # 93
	MOV  	?_se0111_reg_wr?BYTE+03H,slot?452
	MOV  	R3,#050H
	MOV  	R5,#010H
	MOV  	R7,#00H
	LCALL	_se0111_reg_wr
; 	se0111_reg_wr(Genctrl_reg2_H,Genctrl_reg2_L,0x20,slot);
			; SOURCE LINE # 94
	MOV  	?_se0111_reg_wr?BYTE+03H,slot?452
	MOV  	R3,#020H
	MOV  	R5,#011H
	MOV  	R7,#00H
	LCALL	_se0111_reg_wr
; 	se0111_reg_wr(Genctrl_reg3_H,Genctrl_reg3_L,0x11,slot);
			; SOURCE LINE # 95
	MOV  	?_se0111_reg_wr?BYTE+03H,slot?452
	MOV  	R3,#011H
	MOV  	R5,#013H
	MOV  	R7,#00H
	LCALL	_se0111_reg_wr
; 	se0111_reg_wr(SE0111_RESET_H,SE0111_RESET_L,0x00,slot);
			; SOURCE LINE # 96
	MOV  	?_se0111_reg_wr?BYTE+03H,slot?452
	MOV  	R3,#00H
	MOV  	R5,#015H
	MOV  	R7,#00H
	LCALL	_se0111_reg_wr
; 	hextochar(se0111_reg_rd(TEST_H,TEST_L,slot));
			; SOURCE LINE # 97
	MOV  	R3,slot?452
	MOV  	R5,#03H
	MOV  	R7,#00H
	LCALL	_se0111_reg_rd
	LCALL	_hextochar
; 	hextochar(se0111_reg_rd(Genctrl_reg1_H,Genctrl_reg1_L,slot));
			; SOURCE LINE # 98
	MOV  	R3,slot?452
	MOV  	R5,#010H
	MOV  	R7,#00H
	LCALL	_se0111_reg_rd
	LCALL	_hextochar
; 	hextochar(se0111_reg_rd(Genctrl_reg2_H,Genctrl_reg2_L,slot));
			; SOURCE LINE # 99
	MOV  	R3,slot?452
	MOV  	R5,#011H
	MOV  	R7,#00H
	LCALL	_se0111_reg_rd
	LCALL	_hextochar
; 	hextochar(se0111_reg_rd(Genctrl_reg3_H,Genctrl_reg3_L,slot));
			; SOURCE LINE # 100
	MOV  	R3,slot?452
	MOV  	R5,#013H
	MOV  	R7,#00H
	LCALL	_se0111_reg_rd
	LCALL	_hextochar
; 	hextochar(se0111_reg_rd(SE0111_RESET_H,SE0111_RESET_L,slot));
			; SOURCE LINE # 101
	MOV  	R3,slot?452
	MOV  	R5,#015H
	MOV  	R7,#00H
	LCALL	_se0111_reg_rd
	LCALL	_hextochar
; 
; /*
; //init No.0  timeslot
; 	se0111_reg_wr(Ctrl_tx1_0H,Ctrl_tx1_0L,0x04,slot);
; 	se0111_reg_wr(LeakRate_0H,LeakRate_0L,0x04,slot);
; 	se0111_reg_wr(Ctrl_tx2_0H,Ctrl_tx2_0L,0x46,slot);
; 	se0111_reg_wr(Ctrl_tx3_0H,Ctrl_tx3_0L,0xA0,slot);
; 	se0111_reg_wr(Tu12sele_rx_0H,Tu12sele_rx_0L,0x01,slot);
; 	se0111_reg_wr(Tu12sele_tx_0H,Tu12sele_tx_0L,0x01,slot);
; 	se0111_reg_wr(Ctrl_tx4_0H,Ctrl_tx4_0L,0x40,slot);
; 	se0111_reg_wr(Ctrl_tx5_0H,Ctrl_tx5_0L,0x00,slot);
; 	se0111_reg_wr(Ctrl_tx6_0H,Ctrl_tx6_0L,0x00,slot);
; 	se0111_reg_wr(V5_tx_0H,V5_tx_0L,0x02,slot);
; 	se0111_reg_wr(K4_tx_0H,K4_tx_0L,0x00,slot);
; 	se0111_reg_wr(Obit_tx_0H,Obit_tx_0L,0x00,slot);
; 	se0111_reg_wr(V4_tx_0H,V4_tx_0L,0x00,slot);
; 	hextochar(se0111_reg_rd(Ctrl_tx1_0H,Ctrl_tx1_0L,slot));
; 	hextochar(se0111_reg_rd(LeakRate_0H,LeakRate_0L,slot));
; 	hextochar(se0111_reg_rd(Ctrl_tx2_0H,Ctrl_tx2_0L,slot));
; 	hextochar(se0111_reg_rd(Ctrl_tx3_0H,Ctrl_tx3_0L,slot));
; 	hextochar(se0111_reg_rd(Tu12sele_rx_0H,Tu12sele_rx_0L,slot));
; 	hextochar(se0111_reg_rd(Tu12sele_tx_0H,Tu12sele_tx_0L,slot));
; 	hextochar(se0111_reg_rd(Ctrl_tx4_0H,Ctrl_tx4_0L,slot));
; 	hextochar(se0111_reg_rd(Ctrl_tx5_0H,Ctrl_tx5_0L,slot));
; 	hextochar(se0111_reg_rd(Ctrl_tx6_0H,Ctrl_tx6_0L,slot));
; 	hextochar(se0111_reg_rd(V5_tx_0H,V5_tx_0L,slot));
; 	hextochar(se0111_reg_rd(K4_tx_0H,K4_tx_0L,slot));
; 	hextochar(se0111_reg_rd(Obit_tx_0H,Obit_tx_0L,slot));
; 	hextochar(se0111_reg_rd(V4_tx_0H,V4_tx_0L,slot));
; 
; 	se0111_reg_wr(LeakRate_0H,LeakRate_0L,0x10,slot);
; //	for(i=0x0540;i<=0x057F;i++)
; //		se0111_reg_wr(i,0x00,slot);
; 
; //init No.1 timeslot
; 	se0111_reg_wr(Ctrl_tx1_1H,Ctrl_tx1_1L,0x04,slot);
; 	se0111_reg_wr(LeakRate_1H,LeakRate_1L,0x04,slot);
; 	se0111_reg_wr(Ctrl_tx2_1H,Ctrl_tx2_1L,0x46,slot);
; 	se0111_reg_wr(Ctrl_tx3_1H,Ctrl_tx3_1L,0xA0,slot);
; 	se0111_reg_wr(Tu12sele_rx_1H,Tu12sele_rx_1L,0x02,slot);
; 	se0111_reg_wr(Tu12sele_tx_1H,Tu12sele_tx_1L,0x02,slot);
; 	se0111_reg_wr(Ctrl_tx4_1H,Ctrl_tx4_1L,0x40,slot);
; 	se0111_reg_wr(Ctrl_tx5_1H,Ctrl_tx5_1L,0x00,slot);
; 	se0111_reg_wr(Ctrl_tx6_1H,Ctrl_tx6_1L,0x00,slot);
; 	se0111_reg_wr(V5_tx_1H,V5_tx_1L,0x02,slot);
; 	se0111_reg_wr(K4_tx_1H,K4_tx_1L,0x00,slot);
; 	se0111_reg_wr(Obit_tx_1H,Obit_tx_1L,0x00,slot);
; 	se0111_reg_wr(V4_tx_1H,V4_tx_1L,0x00,slot);
; 
; 	se0111_reg_wr(LeakRate_1H,LeakRate_1L,0x10,slot);
; 
; //init No.2 timeslot
; 	se0111_reg_wr(Ctrl_tx1_2H,Ctrl_tx1_2L,0x04,slot);
; 	se0111_reg_wr(LeakRate_2H,LeakRate_2L,0x04,slot);
; 	se0111_reg_wr(Ctrl_tx2_2H,Ctrl_tx2_2L,0x46,slot);
; 	se0111_reg_wr(Ctrl_tx3_2H,Ctrl_tx3_2L,0xA0,slot);
; 	se0111_reg_wr(Tu12sele_rx_2H,Tu12sele_rx_2L,0x03,slot);
; 	se0111_reg_wr(Tu12sele_tx_2H,Tu12sele_tx_2L,0x03,slot);
; 	se0111_reg_wr(Ctrl_tx4_2H,Ctrl_tx4_2L,0x40,slot);
; 	se0111_reg_wr(Ctrl_tx5_2H,Ctrl_tx5_2L,0x00,slot);
; 	se0111_reg_wr(Ctrl_tx6_2H,Ctrl_tx6_2L,0x00,slot);
; 	se0111_reg_wr(V5_tx_2H,V5_tx_2L,0x02,slot);
; 	se0111_reg_wr(K4_tx_2H,K4_tx_2L,0x00,slot);
; 	se0111_reg_wr(Obit_tx_2H,Obit_tx_2L,0x00,slot);
; 	se0111_reg_wr(V4_tx_2H,V4_tx_2L,0x00,slot);
; 
; 	se0111_reg_wr(LeakRate_2H,LeakRate_2L,0x10,slot);
; 
; //init No.3 timeslot
; 	se0111_reg_wr(Ctrl_tx1_3H,Ctrl_tx1_3L,0x04,slot);
; 	se0111_reg_wr(LeakRate_3H,LeakRate_3L,0x04,slot);
; 	se0111_reg_wr(Ctrl_tx2_3H,Ctrl_tx2_3L,0x46,slot);
; 	se0111_reg_wr(Ctrl_tx3_3H,Ctrl_tx3_3L,0xA0,slot);
; 	se0111_reg_wr(Tu12sele_rx_3H,Tu12sele_rx_3L,0x04,slot);
; 	se0111_reg_wr(Tu12sele_tx_3H,Tu12sele_tx_3L,0x04,slot);
; 	se0111_reg_wr(Ctrl_tx4_3H,Ctrl_tx4_3L,0x40,slot);
; 	se0111_reg_wr(Ctrl_tx5_3H,Ctrl_tx5_3L,0x00,slot);
; 	se0111_reg_wr(Ctrl_tx6_3H,Ctrl_tx6_3L,0x00,slot);
; 	se0111_reg_wr(V5_tx_3H,V5_tx_3L,0x02,slot);
; 	se0111_reg_wr(K4_tx_3H,K4_tx_3L,0x00,slot);
; 	se0111_reg_wr(Obit_tx_3H,Obit_tx_3L,0x00,slot);
; 	se0111_reg_wr(V4_tx_3H,V4_tx_3L,0x00,slot);
; 
; 	se0111_reg_wr(LeakRate_3H,LeakRate_3L,0x10,slot);
; 
; //init No.4 timeslot
; 	se0111_reg_wr(Ctrl_tx1_4H,Ctrl_tx1_4L,0x04,slot);
; 	se0111_reg_wr(LeakRate_4H,LeakRate_4L,0x04,slot);
; 	se0111_reg_wr(Ctrl_tx2_4H,Ctrl_tx2_4L,0x46,slot);
; 	se0111_reg_wr(Ctrl_tx3_4H,Ctrl_tx3_4L,0xA0,slot);
; 	se0111_reg_wr(Tu12sele_rx_4H,Tu12sele_rx_4L,0x05,slot);
; 	se0111_reg_wr(Tu12sele_tx_4H,Tu12sele_tx_4L,0x05,slot);
; 	se0111_reg_wr(Ctrl_tx4_4H,Ctrl_tx4_4L,0x40,slot);
; 	se0111_reg_wr(Ctrl_tx5_4H,Ctrl_tx5_4L,0x00,slot);
; 	se0111_reg_wr(Ctrl_tx6_4H,Ctrl_tx6_4L,0x00,slot);
; 	se0111_reg_wr(V5_tx_4H,V5_tx_4L,0x02,slot);
; 	se0111_reg_wr(K4_tx_4H,K4_tx_4L,0x00,slot);
; 	se0111_reg_wr(Obit_tx_4H,Obit_tx_4L,0x00,slot);
; 	se0111_reg_wr(V4_tx_4H,V4_tx_4L,0x00,slot);
; 
; 	se0111_reg_wr(LeakRate_4H,LeakRate_4L,0x10,slot);
; 
; //init No.5 timeslot
; 	se0111_reg_wr(Ctrl_tx1_5H,Ctrl_tx1_5L,0x04,slot);
; 	se0111_reg_wr(LeakRate_5H,LeakRate_5L,0x04,slot);
; 	se0111_reg_wr(Ctrl_tx2_5H,Ctrl_tx2_5L,0x46,slot);
; 	se0111_reg_wr(Ctrl_tx3_5H,Ctrl_tx3_5L,0xA0,slot);
; 	se0111_reg_wr(Tu12sele_rx_5H,Tu12sele_rx_5L,0x06,slot);
; 	se0111_reg_wr(Tu12sele_tx_5H,Tu12sele_tx_5L,0x06,slot);
; 	se0111_reg_wr(Ctrl_tx4_5H,Ctrl_tx4_5L,0x40,slot);
💿 文件大小 1006 K
👤 上传用户 Erlin
📂 所属分类其他嵌入式/单片机内容
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