📄 test.src
字号:
; .\Test.SRC generated from: Test.c
; COMPILER INVOKED BY:
; C:\KEIL\C51\BIN\C51.EXE Test.c OPTIMIZE(0,SPEED) BROWSE DEBUG OBJECTEXTEND SRC(.\Test.SRC)
$NOMOD51
NAME TEST
P0 DATA 080H
P1 DATA 090H
P2 DATA 0A0H
XICON DATA 0C0H
P3 DATA 0B0H
T0 BIT 0B0H.4
AC BIT 0D0H.6
P4 DATA 0D8H
T1 BIT 0B0H.5
T2 BIT 090H.0
EA BIT 0A8H.7
IE DATA 0A8H
EXF2 BIT 0C8H.6
RD BIT 0B0H.7
P3_4 BIT 0B0H.4
ES BIT 0A8H.4
IP DATA 0B8H
RI BIT 098H.0
INT0 BIT 0B0H.2
CY BIT 0D0H.7
TI BIT 098H.1
INT1 BIT 0B0H.3
INT2 BIT 0D8H.3
INT3 BIT 0D8H.2
RCAP2H DATA 0CBH
PS BIT 0B8H.4
SP DATA 081H
T2EX BIT 090H.1
OV BIT 0D0H.2
RCAP2L DATA 0CAH
C_T2 BIT 0C8H.1
WR BIT 0B0H.6
RCLK BIT 0C8H.5
TCLK BIT 0C8H.4
SBUF DATA 099H
PCON DATA 087H
SCON DATA 098H
TMOD DATA 089H
TCON DATA 088H
IE0 BIT 088H.1
IE1 BIT 088H.3
IE2 BIT 0C0H.1
IE3 BIT 0C0H.5
AUXR DATA 08EH
B DATA 0F0H
CP_RL2 BIT 0C8H.0
ACC DATA 0E0H
ET0 BIT 0A8H.1
ET1 BIT 0A8H.3
TF0 BIT 088H.5
ET2 BIT 0A8H.5
TF1 BIT 088H.7
TF2 BIT 0C8H.7
RB8 BIT 098H.2
TH0 DATA 08CH
EX0 BIT 0A8H.0
IT0 BIT 088H.0
TH1 DATA 08DH
TB8 BIT 098H.3
EX1 BIT 0A8H.2
IT1 BIT 088H.2
TH2 DATA 0CDH
csx BIT 090H.4
IT2 BIT 0C0H.0
EX2 BIT 0C0H.2
P BIT 0D0H.0
csy BIT 090H.5
IT3 BIT 0C0H.4
EX3 BIT 0C0H.6
SM0 BIT 098H.7
TL0 DATA 08AH
csz BIT 090H.6
SM1 BIT 098H.6
TL1 DATA 08BH
SM2 BIT 098H.5
TL2 DATA 0CCH
PT0 BIT 0B8H.1
PT1 BIT 0B8H.3
RS0 BIT 0D0H.3
PT2 BIT 0B8H.5
TR0 BIT 088H.4
RS1 BIT 0D0H.4
TR1 BIT 088H.6
TR2 BIT 0C8H.2
PX0 BIT 0B8H.0
PX1 BIT 0B8H.2
PX2 BIT 0C0H.3
PX3 BIT 0C0H.7
DPH DATA 083H
DPL DATA 082H
EXEN2 BIT 0C8H.3
REN BIT 098H.4
T2CON DATA 0C8H
RXD BIT 0B0H.0
TXD BIT 0B0H.1
F0 BIT 0D0H.5
PSW DATA 0D0H
?PR?delay?TEST SEGMENT CODE
?DT?delay?TEST SEGMENT DATA
?PR?main?TEST SEGMENT CODE
?DT?main?TEST SEGMENT DATA
?CO?TEST SEGMENT CODE
?DT?TEST SEGMENT DATA
EXTRN CODE (_init_se0111)
EXTRN CODE (__isd_init)
EXTRN CODE (init_1k50)
EXTRN CODE (_se0111_reg_rd)
EXTRN CODE (init_7820)
EXTRN CODE (init_7860)
EXTRN CODE (?C?SLCMP)
EXTRN CODE (?C_STARTUP)
PUBLIC j
PUBLIC testarray
PUBLIC main
PUBLIC delay
RSEG ?DT?delay?TEST
?delay?BYTE:
i?040: DS 4
RSEG ?DT?main?TEST
?main?BYTE:
test?141: DS 1
i?142: DS 2
RSEG ?DT?TEST
j: DS 1
RSEG ?CO?TEST
testarray:
DB 'S' ,'o' ,'m' ,'e' ,' ' ,'T' ,'e' ,'x' ,'t' ,000H
; /*------------------------------------------------------------------------------
; TEST.C: ISD51 Demo for classic 8051 devices like Philips 89C51RD2/89C66x
;
; Copyright 2002 Keil Software, Inc.
; ------------------------------------------------------------------------------*/
;
; //#include <REG51F.H>
; #include <REG54.H>
; #include <intrins.h>
; #include <absacc.h>
; #include <stdio.h>
; #include "ISD51.h"
;
; #include "rc7820.h"
; #include "rc7860.h"
;
; extern void init_7820(void);
; extern void init_7860(void);
; extern void se0111_reg_wr(unsigned char Haddr,unsigned char Laddr,unsigned char value,unsigned char slot);
; extern unsigned char se0111_reg_rd(unsigned char Haddr,unsigned char Laddr,unsigned char slot);
; extern void init_se0111(unsigned char slot);
; extern void init_1k50(void);
; unsigned char j;
;
; #define Port_D XBYTE [0xFFA0] // bit 0: switch S1
; // bit 1: switch S2
; // bit 4: LED D1
; // bit 5: LED D2
;
; unsigned char code testarray[] = "Some Text";
;
;
; #if 0 // uncomment this function to verify serial communication
;
; /*
; * Test Function: verify serial communication with HyperTerminal
; */
; void TestSerial (void) {
; char c = 'A';
;
; TI = 1;
; while (1) {
; if (RI) {
; c = SBUF;
; RI = 0;
; }
; while (!TI);
; TI = 0;
; SBUF = c;
; }
; }
;
; #endif
;
; //void delay(void) {
; // long i;
;
; // i = 0x800;
; // while(i--);
; //}
;
; void delay(void){
RSEG ?PR?delay?TEST
delay:
USING 0
; SOURCE LINE # 62
; long i;
; for(i=0;i<0x8000;i++);
; SOURCE LINE # 64
MOV i?040+03H,#00H
MOV i?040+02H,#00H
MOV i?040+01H,#00H
MOV i?040,#00H
?C0001:
MOV R7,#00H
MOV R6,#080H
MOV R5,#00H
MOV R4,#00H
MOV R3,i?040+03H
MOV R2,i?040+02H
MOV R1,i?040+01H
MOV R0,i?040
CLR C
LCALL ?C?SLCMP
JNC ?C0004
?C0003:
MOV R7,i?040+03H
MOV R6,i?040+02H
MOV R5,i?040+01H
MOV R4,i?040
MOV R3,#01H
MOV R2,#00H
MOV R1,#00H
MOV R0,#00H
MOV A,R7
ADD A,R3
MOV i?040+03H,A
MOV A,R6
ADDC A,R2
MOV i?040+02H,A
MOV A,R5
ADDC A,R1
MOV i?040+01H,A
MOV A,R4
ADDC A,R0
MOV i?040,A
SJMP ?C0001
?C0002:
; }
; SOURCE LINE # 65
?C0004:
RET
; END OF delay
;
; sbit P3_4 = P3^4;
; sbit csx = P1^4;
; sbit csy = P1^5;
; sbit csz = P1^6;
;
;
; void main (void) {
RSEG ?PR?main?TEST
main:
USING 0
; SOURCE LINE # 73
;
; // unsigned char xdata *address;
; unsigned char test;
; // unsigned char adh,adl;
; unsigned int i;
;
; // delay();
; P3_4 = 0;
; SOURCE LINE # 81
CLR P3_4
; delay();
; SOURCE LINE # 82
LCALL delay
;
; /*Setup the serial port for 1200 baud at 16MHz.
; ------------------------------------------------*/
; #ifndef MONITOR51
; SCON = 0x50; /* SCON: mode 1, 8-bit UART, enable rcvr */
; SOURCE LINE # 87
MOV SCON,#050H
; TMOD |= 0x20; /* TMOD: timer 1, mode 2, 8-bit reload */
; SOURCE LINE # 88
ORL TMOD,#020H
; TH1 = 0xFD; /* TH1: reload value for 9600 baud @ 11.0592MHz */
; SOURCE LINE # 89
MOV TH1,#0FDH
; TL1 = 0xFD;
; SOURCE LINE # 90
MOV TL1,#0FDH
; TR1 = 1; /* TR1: timer 1 run */
; SOURCE LINE # 91
SETB TR1
; TI = 1; /* TI: set TI to send first char of UART */
; SOURCE LINE # 92
SETB TI
; #endif
;
; EA = 1; /* Enable global interrupt flag */
; SOURCE LINE # 95
SETB EA
;
; // TestSerial(); // uncomment this function to verify serial communication
;
; #if 0 // init ISD51 and start user program until the uVision2 Debugger connects
; ISDinit (); // initialize uVision2 Debugger and continue program run
; #endif
;
; #if 0 // init ISD51 and wait until the uVision2 Debugger connects
; ISDwait (); // wait for connection to uVision2 Debugger
; #endif
;
; for (i = 0; i < sizeof (testarray); i++) {
; SOURCE LINE # 107
MOV i?142,#00H
MOV i?142+01H,#00H
?C0005:
CLR C
MOV A,i?142+01H
SUBB A,#0AH
MOV A,i?142
SUBB A,#00H
JNC ?C0006
; j = testarray[i];
; SOURCE LINE # 108
MOV R7,i?142+01H
MOV A,R7
MOV DPTR,#testarray
MOVC A,@A+DPTR
MOV R7,A
MOV j,R7
; }
; SOURCE LINE # 109
?C0007:
INC i?142+01H
MOV A,i?142+01H
JNZ ?C0015
INC i?142
?C0015:
SJMP ?C0005
?C0006:
;
; ///////////////////
; P1 = 0x50;
; SOURCE LINE # 112
MOV P1,#050H
; XBYTE[0xC400] = 0x01;
; SOURCE LINE # 113
MOV DPTR,#0C400H
MOV A,#01H
MOVX @DPTR,A
; delay();
; SOURCE LINE # 114
LCALL delay
; XBYTE[0xC400] = 0x00;
; SOURCE LINE # 115
MOV DPTR,#0C400H
CLR A
MOVX @DPTR,A
; P1 = 0;
; SOURCE LINE # 116
MOV P1,#00H
; init_7820();
; SOURCE LINE # 117
LCALL init_7820
; // Loopback_reg = 0x80;
; S_reg = 0xC1; //set 7820 free run
; SOURCE LINE # 119
MOV DPTR,#08415H
MOV A,#0C1H
MOVX @DPTR,A
;
;
; //init 7860
; P1 = 0x30;
; SOURCE LINE # 123
MOV P1,#030H
; XBYTE[0xC400] = 0x01;
; SOURCE LINE # 124
MOV DPTR,#0C400H
MOV A,#01H
MOVX @DPTR,A
; delay();
; SOURCE LINE # 125
LCALL delay
; XBYTE[0xC400] = 0x00;
; SOURCE LINE # 126
MOV DPTR,#0C400H
CLR A
MOVX @DPTR,A
; P1 = 0;
; SOURCE LINE # 127
MOV P1,#00H
; init_7860();
; SOURCE LINE # 128
LCALL init_7860
; Dxc_cntr = 0xA0;
; SOURCE LINE # 129
MOV DPTR,#08803H
MOV A,#0A0H
MOVX @DPTR,A
; // Config_ts0 = 0x31;
;
;
; //init se0111
; init_se0111(1);
; SOURCE LINE # 134
MOV R7,#01H
LCALL _init_se0111
; init_se0111(2);
; SOURCE LINE # 135
MOV R7,#02H
LCALL _init_se0111
; init_se0111(3);
; SOURCE LINE # 136
MOV R7,#03H
LCALL _init_se0111
; // se0111_reg_wr(0x0050,0x40,2);
;
; // init ep1k50
; init_1k50();
; SOURCE LINE # 140
LCALL init_1k50
;
; // reset_se0111(2);
; /*
; //set mapper NRZ decoder and facility loopback
; P1 = 0x20;
; address = 0xA400;
; *address = 0;
; *address = 0x80; //reset
; address = 0xA000;
; *address = 0x4A;
; address = 0xA400;
; *address = 0x80;
; address = 0x9c00;
; *address = 0x46; //write NRZ mode
; */
; // se0111_reg_wr(0x004A,0x46,2);
;
; /*
; address = 0xA000;
; *address = 0x50;
; address = 0xA400;
; *address = 0x80;
; address = 0x9c00;
; *address = 0x80; //write facility loopback
; */
;
; // se0111_reg_wr(0x0050,0x80,2);
;
; /*
; address = 0xA000;
; *address = 0x00;
; address = 0xA400;
; *address = 0x80; //no effect reg
;
; P1 = 0;
; */
; P3_4 = 1;
; SOURCE LINE # 177
SETB P3_4
?C0008:
;
; while (1) {
; SOURCE LINE # 179
; #if 1 // init ISD51 only when the uVision2 Debugger tries to connect
; ISDcheck(); // initialize uVision2 Debugger and continue program run
; SOURCE LINE # 181
JB ES,?C0010
JNB RI,?C0010
MOV A,SBUF
XRL A,#0A5H
JZ ?C0012
CLR RI
SJMP ?C0010
?C0012:
LCALL __isd_init
?C0013:
?C0011:
?C0010:
; #endif
; // P1=0x40;
; P1=0x20;
; SOURCE LINE # 184
MOV P1,#020H
; test=se0111_reg_rd(0x08,0xd8,2);
; SOURCE LINE # 185
MOV R3,#02H
MOV R5,#0D8H
MOV R7,#08H
LCALL _se0111_reg_rd
MOV test?141,R7
; //#pragma asm
; // mov acc,test?141
; //#pragma endasm
; test=se0111_reg_rd(0x08,0xd9,2);
; SOURCE LINE # 189
MOV R3,#02H
MOV R5,#0D9H
MOV R7,#08H
LCALL _se0111_reg_rd
MOV test?141,R7
; //#pragma asm
; // mov acc,test?141
; //#pragma endasm
; test=se0111_reg_rd(0x08,0xda,2);
; SOURCE LINE # 193
MOV R3,#02H
MOV R5,#0DAH
MOV R7,#08H
LCALL _se0111_reg_rd
MOV test?141,R7
; //#pragma asm
; // mov acc,test?141
; //#pragma endasm
; test=se0111_reg_rd(0x08,0xdb,2);
; SOURCE LINE # 197
MOV R3,#02H
MOV R5,#0DBH
MOV R7,#08H
LCALL _se0111_reg_rd
MOV test?141,R7
; //#pragma asm
; // mov acc,test?141
; //#pragma endasm
; test=se0111_reg_rd(0x08,0xdc,2);
; SOURCE LINE # 201
MOV R3,#02H
MOV R5,#0DCH
MOV R7,#08H
LCALL _se0111_reg_rd
MOV test?141,R7
; //#pragma asm
; // mov acc,test?141
; //#pragma endasm
; test=se0111_reg_rd(0x08,0xdd,2);
; SOURCE LINE # 205
MOV R3,#02H
MOV R5,#0DDH
MOV R7,#08H
LCALL _se0111_reg_rd
MOV test?141,R7
; //#pragma asm
; // mov acc,test?141
; //#pragma endasm
; test=se0111_reg_rd(0x08,0xe0,2);
; SOURCE LINE # 209
MOV R3,#02H
MOV R5,#0E0H
MOV R7,#08H
LCALL _se0111_reg_rd
MOV test?141,R7
; //#pragma asm
; // mov acc,test?141
; //#pragma endasm
;
;
; P1=0;
; SOURCE LINE # 215
MOV P1,#00H
; // P1=0x60;
; // P1=0;
; /* _nop_();
; _nop_();
; _nop_();
; _nop_();
; _nop_();
; _nop_();
; _nop_();
; _nop_();
; Port_D = (Port_D) ^ 0x30;
; P1 ^= 0x10;
; _nop_();
; _nop_();
; _nop_();
; #if 0 // you may use ISDbreak when ISD51 is started with ISDcheck or ISDwait
; ISDbreak (); // hard coded stop (breakpoint)
; #endif
; delay();
; _nop_();
; _nop_();
; _nop_(); */
;
; /* test = 0;
; csx = 0;
; csy = 0;
; csz = 0;
; //test microchip
; P3_4 = 0;
; P3_4 = 1;
; //test ram
; P3_4 = 0;
;
;
; for(address=0x0000;address<=0x7fff;address++){ //clear ram
; *address = 0x00;
; }
; for(address=0x0000;address<=0x7fff;address++){
; *address = 0x55;
; test = *address;
; if (test != 0x55)
; P3_4 = 1;
; }
;
; //test cs7820 and r/w register
; test = 0;
; P3_4 = 0;
; P1 = 0x50;
; P1 = 0;
; address = Mode_reg; //read
; while(1){
; test = *address;
; if (test != 0x03)
; P3_4 = 1;
; }
; P3_4 = 0;
; address = T1s_reg; //write
; *address = 0x02;
; test = *address; //read
; if (test != 0x02)
; P3_4 = 1;
;
; //test cs7860 and r/w register
; test = 0;
; P3_4 = 0;
; address = Dxc_cntr; //read
; test = *address;
; if (test !=0x80)
; P3_4 = 1;
; P3_4 = 0;
; address = Int_mask; //write
; *address = 0xff;
; test = *address; //read
; if (test != 0xff)
; P3_4 = 1;
;
; //test cs7851 and r/w register
; test = 0;
; P3_4 = 0;
; address = 0x9000; //write
; *address = 0x55;
; test = *address; //read
; if (test != 0x55)
; P3_4 = 1;
;
; //test r/w register in mapper
; test = 0;
; P3_4 = 0;
; csx = 0;
; csy = 0;
; csz = 1;
; address = 0xA000;
; *address = 0x10;
; address = 0xA400;
; *address = 0x80;
; address = 0x9c00;
; *address = 0x40; //write
; test = *address; //read
; if (test != 0x40)
; P3_4 = 1;
; */
;
; // se0111_reg_wr(0x004A,0x46,2);
; // se0111_reg_wr(0x0050,0x80,2);
; // se0111_reg_rd(0x0050,2);
; }
; SOURCE LINE # 321
SJMP ?C0008
?C0009:
; }
; SOURCE LINE # 322
?C0014:
RET
; END OF main
END
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