reg2812.h

f2812头文件

#define SCIFFCT_A 	*((volatile unsigned int *)0x705C) 	// SCI-A FIFO Control Register
#define SCIPRI_A 	*((volatile unsigned int *)0x705F) 	// SCI-A Priority Control Register
//SCI-B Registers
#define SCICCR_B 	*((volatile unsigned int *)0x7750) 	// SCI-B Communications Control Register
#define SCICTL1_B 	*((volatile unsigned int *)0x7751) 	// SCI-B Control Register 1
#define SCIHBAUD_B 	*((volatile unsigned int *)0x7752) 	// SCI-B Baud Register, High Bits
#define SCILBAUD_B 	*((volatile unsigned int *)0x7753) 	// SCI-B Baud Register, Low Bits
#define SCICTL2_B 	*((volatile unsigned int *)0x7754) 	// SCI-B Control Register 2
#define SCIRXST_B 	*((volatile unsigned int *)0x7755) 	// SCI-B Receive Status Register
#define SCIRXEMU_B 	*((volatile unsigned int *)0x7756) 	// SCI-B Receive Emulation Data Buffer Register
#define SCIRXBUF_B 	*((volatile unsigned int *)0x7757) 	// SCI-B Receive Data Buffer Register
#define SCITXBUF_B 	*((volatile unsigned int *)0x7759) 	// SCI-B Transmit Data Buffer Register
#define SCIFFTX_B 	*((volatile unsigned int *)0x775A) 	// SCI-B FIFO Transmit Register
#define SCIFFRX_B 	*((volatile unsigned int *)0x775B) 	// SCI-B FIFO Receive Register
#define SCIFFCT_B 	*((volatile unsigned int *)0x775C) 	// SCI-B FIFO Control Register
#define SCIPRI_B 	*((volatile unsigned int *)0x775F) 	// SCI-B Priority Control Register
	 
//-----External Interrupt Control Registers------------------------------------------------------------
#define XINT1CR 	*((volatile unsigned int *)0x7070) 	// External Interrupt 1 Control Register
#define XINT2CR 	*((volatile unsigned int *)0x7071) 	// External Interrupt 2 Control Register
#define XMNICR 		*((volatile unsigned int *)0x7077) 	// NMI Interrupt Control Register
#define XINT1CTR 	*((volatile unsigned int *)0x7078) 	// External Interrupt 1 Counter Register
#define XINT2CTR 	*((volatile unsigned int *)0x7079) 	// External Interrupt 2 Counter Register
#define XNMICTR 	*((volatile unsigned int *)0x707f) 	// External NMI Interrupt Counter Register

/*-----GPIO Mux Registers------------------------------------------------------------------------------
eallow	edis*/
#define GPAMUX 		*((volatile unsigned int *)0x70C0) 	// GPIO A MUX Control Register
#define GPADIR 		*((volatile unsigned int *)0x70C1) 	// GPIO A Direction Control Register
#define GPAQUAL 	*((volatile unsigned int *)0x70C2) 	// GPIO A Input Qualification Control Register
#define GPBMUX 		*((volatile unsigned int *)0x70C4) 	// GPIO B MUX Control Register
#define GPBDIR 		*((volatile unsigned int *)0x70C5) 	// GPIO B Direction Control Register
#define GPBQUAL 	*((volatile unsigned int *)0x70C6) 	// GPIO B Input Qualification Control Register
#define GPDMUX 		*((volatile unsigned int *)0x70CC) 	// GPIO D MUX Control Register
#define GPDDIR 		*((volatile unsigned int *)0x70CD) 	// GPIO D Direction Control Register
#define GPDQUAL 	*((volatile unsigned int *)0x70CE) 	// GPIO D Input Qualification Control Register
#define GPEMUX 		*((volatile unsigned int *)0x70D0) 	// GPIO E MUX Control Register
#define GPEDIR 		*((volatile unsigned int *)0x70D1) 	// GPIO E Direction Control Register
#define GPEQUAL 	*((volatile unsigned int *)0x70D2) 	// GPIO E Input Qualification Control Register
#define GPFMUX 		*((volatile unsigned int *)0x70D4) 	// GPIO F MUX Control Register
#define GPFDIR 		*((volatile unsigned int *)0x70D5) 	// GPIO F Direction Control Register
#define GPGMUX 		*((volatile unsigned int *)0x70D8) 	// GPIO F MUX Control Register
#define GPGDIR 		*((volatile unsigned int *)0x70D9) 	// GPIO F Direction Control Register

//-----GPIO Data Registers-----------------------------------------------------------------------------
#define GPADAT 		*((volatile unsigned int *)0x70E0) 	// GPIO A Data Register
#define GPASET 		*((volatile unsigned int *)0x70E1) 	// GPIO A Set Register
#define GPACLEAR 	*((volatile unsigned int *)0x70E2) 	// GPIO A Clear Register
#define GPATOGGLE 	*((volatile unsigned int *)0x70E3) 	// GPIO A Toggle Register
#define GPBDAT 		*((volatile unsigned int *)0x70E4) 	// GPIO B Data Register
#define GPBSET 		*((volatile unsigned int *)0x70E5) 	// GPIO B Set Register
#define GPBCLEAR 	*((volatile unsigned int *)0x70E6) 	// GPIO B Clear Register
#define GPBTOGGLE 	*((volatile unsigned int *)0x70E7) 	// GPIO B Toggle Register
#define GPDDAT 		*((volatile unsigned int *)0x70EC) 	// GPIO D Data Register
#define GPDSET 		*((volatile unsigned int *)0x70ED) 	// GPIO D Set Register
#define GPDCLEAR 	*((volatile unsigned int *)0x70EE) 	// GPIO D Clear Register
#define GPDTOGGLE 	*((volatile unsigned int *)0x70EF) 	// GPIO D Toggle Register
#define GPEDAT 		*((volatile unsigned int *)0x70F0) 	// GPIO E Data Register
#define GPESET 		*((volatile unsigned int *)0x70F1) 	// GPIO E Set Register
#define GPECLEAR 	*((volatile unsigned int *)0x70F2) 	// GPIO E Clear Register
#define GPETOGGLE 	*((volatile unsigned int *)0x70F3) 	// GPIO E Toggle Register
#define GPFDAT 		*((volatile unsigned int *)0x70F4) 	// GPIO F Data Register
#define GPFSET 		*((volatile unsigned int *)0x70F5) 	// GPIO F Set Register
#define GPFCLEAR 	*((volatile unsigned int *)0x70F6) 	// GPIO F Clear Register
#define GPFTOGGLE 	*((volatile unsigned int *)0x70F7) 	// GPIO F Toggle Register
#define GPGDAT 		*((volatile unsigned int *)0x70F8) 	// GPIO G Data Register
#define GPGSET 		*((volatile unsigned int *)0x70F9) 	// GPIO G Set Register
#define GPGCLEAR 	*((volatile unsigned int *)0x70FA) 	// GPIO G Clear Register
#define GPGTOGGLE 	*((volatile unsigned int *)0x70FB) 	// GPIO G Toggle Register

//-----ADC Registers-----------------------------------------------------------------------------------
#define ADCTRL1 		*((volatile unsigned int *)0x7100) 	// ADC Control Register 1
#define ADCTRL2 		*((volatile unsigned int *)0x7101) 	// ADC Control Register 2
#define ADCMAXCONV 		*((volatile unsigned int *)0x7102) 	// ADC Maximum Conversion Channels Register
#define ADCCHSELSEQ1 	*((volatile unsigned int *)0x7103) 	// ADC Channel Select Sequencing Control Register 1
#define ADCCHSELSEQ2 	*((volatile unsigned int *)0x7104) 	// ADC Channel Select Sequencing Control Register 2
#define ADCCHSELSEQ3 	*((volatile unsigned int *)0x7105) 	// ADC Channel Select Sequencing Control Register 3
#define ADCCHSELSEQ4 	*((volatile unsigned int *)0x7106) 	// ADC Channel Select Sequencing Control Register 4
#define ADCASEQSR 		*((volatile unsigned int *)0x7107) 	// ADC Auto-Sequence Status Register
#define ADCRESULT0 		*((volatile unsigned int *)0x7108) 	// ADC Conversion Result Buffer Register 0
#define ADCRESULT1 		*((volatile unsigned int *)0x7109) 	// ADC Conversion Result Buffer Register 1
#define ADCRESULT2 		*((volatile unsigned int *)0x710A) 	// ADC Conversion Result Buffer Register 2
#define ADCRESULT3 		*((volatile unsigned int *)0x710B) 	// ADC Conversion Result Buffer Register 3
#define ADCRESULT4 		*((volatile unsigned int *)0x710C) 	// ADC Conversion Result Buffer Register 4
#define ADCRESULT5 		*((volatile unsigned int *)0x710D) 	// ADC Conversion Result Buffer Register 5
#define ADCRESULT6 		*((volatile unsigned int *)0x710E) 	// ADC Conversion Result Buffer Register 6
#define ADCRESULT7 		*((volatile unsigned int *)0x710F) 	// ADC Conversion Result Buffer Register 7
#define ADCRESULT8 		*((volatile unsigned int *)0x7110) 	// ADC Conversion Result Buffer Register 8
#define ADCRESULT9 		*((volatile unsigned int *)0x7111) 	// ADC Conversion Result Buffer Register 9
#define ADCRESULT10 	*((volatile unsigned int *)0x7112) 	// ADC Conversion Result Buffer Register 10
#define ADCRESULT11 	*((volatile unsigned int *)0x7113) 	// ADC Conversion Result Buffer Register 11
#define ADCRESULT12 	*((volatile unsigned int *)0x7114) 	// ADC Conversion Result Buffer Register 12
#define ADCRESULT13 	*((volatile unsigned int *)0x7115) 	// ADC Conversion Result Buffer Register 13
#define ADCRESULT14 	*((volatile unsigned int *)0x7116) 	// ADC Conversion Result Buffer Register 14
#define ADCRESULT15 	*((volatile unsigned int *)0x7117) 	// ADC Conversion Result Buffer Register 15
#define ADCTRL3 		*((volatile unsigned int *)0x7118) 	// ADC Control Register 3
#define ADCST 			*((volatile unsigned int *)0x7119) 	// ADC Status Register

//-----32-bit cpuTimer---------------------------------------------------------------------------------
//CPU-Timers 0, 1, 2 Configuration and Control Registers
#define TIMER0TIM 		*((volatile unsigned int *)0x0C00)	// CPU-Timer 0, Counter Register
#define TIMER0TIMH 		*((volatile unsigned int *)0x0C01)	// CPU-Timer 0, Counter Register High
#define TIMER0PRD 		*((volatile unsigned int *)0x0C02)	// CPU-Timer 0, Period Register
#define TIMER0PRDH 		*((volatile unsigned int *)0x0C03)	// CPU-Timer 0, Period Register High
#define TIMER0TCR 		*((volatile unsigned int *)0x0C04)	// CPU-Timer 0, Control Register
#define TIMER0TPR 		*((volatile unsigned int *)0x0C06)	// CPU-Timer 0, Prescale Register
#define TIMER0TPRH 		*((volatile unsigned int *)0x0C07)	// CPU-Timer 0, Prescale Register High
#define TIMER1TIM 		*((volatile unsigned int *)0x0C08)	// CPU-Timer 1, Counter Register
#define TIMER1TIMH 		*((volatile unsigned int *)0x0C09)	// CPU-Timer 1, Counter Register High
#define TIMER1PRD 		*((volatile unsigned int *)0x0C0A)	// CPU-Timer 1, Period Register
#define TIMER1PRDH 		*((volatile unsigned int *)0x0C0B)	// CPU-Timer 1, Period Register High
#define TIMER1TCR 		*((volatile unsigned int *)0x0C0C)	// CPU-Timer 1, Control Register
#define TIMER1TPR 		*((volatile unsigned int *)0x0C0E)	// CPU-Timer 1, Prescale Register
#define TIMER1TPRH 		*((volatile unsigned int *)0x0C0F)	// CPU-Timer 1, Prescale Register High
#define TIMER2TIM 		*((volatile unsigned int *)0x0C10)	// CPU-Timer 2, Counter Register
#define TIMER2TIMH 		*((volatile unsigned int *)0x0C11)	// CPU-Timer 2, Counter Register High
#define TIMER2PRD 		*((volatile unsigned int *)0x0C12)	// CPU-Timer 2, Period Register
#define TIMER2PRDH 		*((volatile unsigned int *)0x0C13)	// CPU-Timer 2, Period Register High
#define TIMER2TCR 		*((volatile unsigned int *)0x0C14)	// CPU-Timer 2, Control Register
#define TIMER2TPR 		*((volatile unsigned int *)0x0C16)	// CPU-Timer 2, Prescale Register
#define TIMER2TPRH 		*((volatile unsigned int *)0x0C17)	// CPU-Timer 2, Prescale Register High
	
typedef struct{
    unsigned long Timer;       	// Timer Counter
    unsigned long Period;       // Timer Period
    unsigned int Control;      	// Timer Control
    unsigned int Res;         	// Reserved
    unsigned long Prescale;     // Timer Pre-Scale
}CPUTimer;

//-----------------------------------------------------------------------------------------------------
#define eallow			asm(" eallow; 	Enable accesses to PIE control registers")
#define edis			asm(" edis; 	Disable accesses to PIE control registers")