main.asm

一个用汇编写的freescale S12系列单片机监视代码

;*****************************************************************
;* This stationery serves as the framework for a                 *
;* user application (single file, absolute assembly application) *
;* For a more comprehensive program that                         *
;* demonstrates the more advanced functionality of this          *
;* processor, please see the demonstration applications          *
;* located in the examples subdirectory of the                   *
;* Metrowerks CodeWarrior for the HC12 Program directory         *
;*****************************************************************

;
; include derivative specific macros
            ;INCLUDE 'MC9S12NE64.inc'





XDEF Entry,main
*
DATASECTION :	SECTION
*
NUL	EQU $00
EOT	EQU $04
LF 	EQU $0A
CR	EQU $0D
CTRLA	EQU $01
CTRLB	EQU $02
CTRLC	EQU $03
CTRLH	EQU $08
CTRLP	EQU $10
CTRLU	EQU $15
CTRLX	EQU $18
CTRLY	EQU $19
*
PORTB	EQU $01
DDRB	EQU $03
*
SCI0BDH	EQU $C8
SCI0BDL	EQU $C9
SCI0CR1	EQU $CA
SCI0CR2	EQU $CB
SCI0SR1	EQU $CC
SCI0SR2	EQU $CD
SCI0DRH	EQU $CE
SCI0DRL	EQU $CF
*
BKPCT0	EQU $28
BKPCT1	EQU $29
BKP0X	EQU $2A
BKP0H	EQU $2B
BKP0L	EQU $2C
BKP1X	EQU $2D
BKP1H	EQU $2E
*
SYNR	EQU $34
REFDV	EQU $35
CRGFLG	EQU $37
CLKSEL	EQU $39
ARMCOP	EQU $3F
*
INITRM	EQU $10
INITRGDF 	EQU $11
INITEE	EQU $12
PPAGG	EQU $30
FCNFG	EQU $0103
FCMD	EQU $0106
FSTAT	EQU $0105
CBEIF	EQU $80
ERASE	EQU $40
PVIOL	EQU $20
ACCERR	EQU $10
CCIF	EQU $40
BLANK	EQU $04
FCLKDIV	EQU $0100
ECLKDIV	EQU $0110
PROG	EQU $20
PPAGESIZE	EQU $16384
SECTORSIZE	EQU $512
BOOTBLKSIZE	EQU $4096
FlashSTART	EQU $8000
RAMTOP	EQU $3FFF
FlashRAM	EQU RAMTOP-$1FF
RAMPGMBUF	EQU FlashRAM-$100
*
ORG $3FD0	;THIS DEBUG NEED 24 BTYTES OF RAM
*
MRCC	RMB 1
MRB	RMB 1
MRA	RMB 1
MRX	RMB 2
MRY	RMB 2
MRPC	RMB 2
SPBUF	RMB 2
ERA	RMB 2
ERA1	RMB 2
BUF0	RMB 1
BUF1	RMB 1
BUF2	RMB 1
BUF3	RMB 1
BUF4	RMB 1
BUF5	RMB 1
ECHO	RMB 1
NOTUSED	RMB 1
*
STACK	EQU MRCC-1
*
*Interrupt Victors Are move to here
*

ORG $EFA0	; VECTORS
*
Vemacec	EQU $EFA0	;EMAC excessive collision
Vemaclc	EQU $EFA2
Vemacbrxerr	EQU $EFA4
Vemacrxbbo	EQU $EFA6
Vemacrxbao	EQU $EFA8
Vemacrxerr	EQU $EFAA
Vemacmii	EQU $EFAC
Vemacrxfc	EQU $EFAE
Vemactxc	EQU $EFB0
Vemacrxbbc	EQU $EFB2
Vemacrxbac	EQU $EFB4
Vephy	EQU $EFB6
Vflash	EQU $EFB8
Viic	EQU $EFC0
Vcrgscm	EQU $EFC4	; CRG self clock mode CRG self clock mode
Vcrgplllck	EQU $EFC6	; CRG PLL lock
Vportg	EQU $EFCA	; Port G
Vtimovf	EQU $EFDE	; Standard timer overflow
Vtimpaie	EQU $EFDC	; Pulse accumulator input edge
Vspi	EQU $EFD8	; SPI
Vsci0	EQU $EFD6	; SCI0
Vsci1	EQU $EFD4	; SCI1
Vatd	EQU $EFD2	; ATD
Vportj	EQU $EFCE	; Port J
Vporth	EQU $EFCC	; Port H
Vreset	EQU $EFFE	;External reset, power on reset
Vclkmon	EQU $EFFC	; Clock monitor fail reset
Vcop	EQU $EFFA	; COP failure reset
Vtrap	EQU $EFF8	; Unimplemented instruction trap
Vswi	EQU $EFF6	; SWI
Vxirq	EQU $EFF4	; XIRQ
Virq	EQU $EFF2	; IRQ
Vrti	EQU $EFF0	; Real-time interrupt
Vtimch4	EQU $EFE6	; Standard timer channel 4
Vtimch5	EQU $EFE4	; Standard timer channel 5
Vtimch6	EQU $EFE2	; Standard timer channel 6
Vtimch7	EQU $EFE0	; Standard timer channel 7
*
CODESECTION:SECTION
*
ENTRY:
MAIN:
START
***********************************************
*monitor for 9hcs12
*all right reserved
*lirui
*
***************************************************** 
 LDAB  #33
 STAB  $10
 LDS   #STACK
 STS   SPBUF
 ;LDAA  #255
 ;STAA  PORTB
 LDAA  #$AA
 STAA  $01
 LDAA  #0
 STAA  $3C
 LDAB  #1
 STAB  REFDV
 LDAB  #2
 STAB  SYNR
 BRCLR CRGRFLG,#8,*   ;abs = F021
 BSET  CLKSEL,#$80
 LDAA  #73
 STAA  FCLKDIV
 LDAA  ECLKDIV
 STAA  PPAGE
 LDAA  #12
 STAA  SCI0CR2
 LDAA  #0
 STAA  SCI0BDH
 LDAA  #$9C
 STAA  SCI0BDL
*
MONIT	LDX   #MSG1
 	JSR   PDATA
	LDS   #SPBUF
 LDX   #MONIT
 PSHX  
 LDX   #0
 PSHX  
 PSHX  
PSHX  
LDAA  #$90
PSHA  
 STS   SPBUF
 LDX   #MSGWELCOME
 JSR   PDATA
 LDY   #65535
LOOP1 LDX   #$8F
LOOP2 DEX   
BEQ   LOOP3   ;abs = F070
LDAA  #32
 BITA  SCI0SR1
BEQ   LOOP2   ;abs = F062
 LDAA  SCI0DRL
 JMP   NXTCMD
LOOP3 	DEY   
	BNE  LOOP1   ;abs = F05F
LOOP4 	LDX   RESET
	CPX   #65535
	BEQ   NXTCMD  ;abs = F080
  	LDX   RESET	
 	PSHX  

	RTS
*
*NEXT COMMAND
*   
NXTCMD 	LDS   #STACK
  	LDX   #MSG3
 	JSR   PSTRNG
 	JSR   INCH
  	STAA  ERA
  	BRCLR ERA,#64,NUMBER ;abs = F09A
 	CMPA  #123
	BGE   PRTCMD ;abs = F0AD
 	ANDA  #95
NUMBER 	CMPA  #CR
	BEQ   NXTCMD;abs = F080
 	TAB   
 	CMPA  #32
 	BGE   PRTCMD ;abs = F0AD
 	LDAA  #'^'
 	JSR   OUTCH
 	TBA   
 	ADDA  #64
PRTCMD  	JSR   OUTCH

  	JSR   OUT1S
 	LDX   #JMPTAB
NXTCHR 	CMPB  0,X
	BEQ   JMPCMD  ;abs = F0CA
 	INX   
 	INX   
 	INX   
  	CPX   #TBLEND
 	BLT   NXTCHR ;abs = F0B6
  	LDX   #MSG4
 	JSR   PDATA
 	BRA   NXTCMD ;abs = F080
JMPCMD 	LDX   1,X
 	JSR   0,X
 	BRA   NXTCMD ;abs = F080
*
*"GO"Command, go to program according to the pc
*
GO  	LDS   SPBUF
  	LDX   MRPC
 	PSHX  
  	LDX   MRY
 	PSHX  
  	LDX   MRX  
 	PSHX  
  	LDX   MRB  
 	PSHX  
 	LDAA  MRCC 
 	PSHA  
ISRTI	RTI       
*
*   alter pc the p   
*
ALTPC 	JSR   PRTPC
  	JSR   OUT1S
 	JSR   IN1ADR
	BVS   ALTPC1;abs = F0F6
 	STX   MRPC 
ALTPC1 	RTS         
*
* alter y index Register 
*
 	JSR   PRTIY
  	JSR   OUT1S
 	JSR   IN1ADR
	BVS   ALTRYD;abs = F105
 	STX   MRY  
ALTRYD 	RTS   
 	
*
*ALTER "X" INDERX REGISTER
*	
ALTX	JSR   PRTIX
 	JSR   OUT1S
 	JSR   IN1ADR
	BVS   ALTXD ;abs = F114
 	STX   MRX  
ALTXD	RTS   
	
*
*ALTER "PP" P-PAGE REGISTER
*	 	
ALTPP	JSR   PRTPP
 	JSR   OUT1S
 	JSR   BYTE 
	BVS   PPEND ;abs = F125
 	LDY   #48
 	STAA  0,Y
PPEND	RTS   
	
*
*ALTER "B" ACCUMULATOR
*		
ALTB	JSR   PRTB 
 	JSR   OUT1S
 	JSR   BYTE  
	BVS   ALTB1 ;abs = F134
 	STAA  MRA  
ALTB1 	RTS   
	
*
*ALTER "A" ACCUMULATOR
*		
ALTA	JSR   PRTA 
 	JSR   OUT1S
 	JSR   BYTE 
	BVS   ALTR1 ;abs = F143
 	STAA  MRA   
ALTR1	RTS   
	
*
*ALTER "CC"REGISTER
*	 	
ALTCC 	JSR   PRTCC  
 	JSR   OUT1S
 	JSR   BYTE 
	BVS   ALTRCD;abs = F152
 	STAA  MRCC
ALTRCD 	RTS   
*
*Memory Examine and Change
*	
MEMCHG	JSR   IN1ADR
	BVS   CHRTN  ;abs = F182
  	LDY   BUF0 
MEMC2	LDX   #MSG5 
 	JSR   PSTRNG
	PSHY  
	PULX  
 	JSR   OUT4H
 	JSR   OUT1S
 	LDAA  0,Y
 	JSR   OUT2H
 	JSR   OUT1S
	JSR   BYTE
	BVC   CHANGE ;abs = F183
	CMPA  CHRLH
	BEQ   MEMC2  ;abs = F15B
 	CMPA  #'^'
	BEQ   BACK   ;abs = F194
 	CMPA  #13
	BNE   FORWRD ;abs = F191
CHRTN	RTS   
CHANGE 	STAA  0,Y
 	CMPA  0,Y
	BEQ   FORWRD ;abs = F191
 	JSR   OUT1S
 	LDAA  #'?'
 	JSR   OUTCH
FORWRD	INY   
 	BRA   MEMC2  ;abs = F15B
BACK	DEY   
 	BRA   MEMC2  ;abs = F15B
*
*"S" Display Stack Poniter
* 	
DISSP	JSR   PRTSP
 	TFR   SP,Y
 	STY   BUF2 
  	LDX   #SPBUF	;DISPLAY
  	STX   BUF0 	
 	BRA   MDUMP1;abs = F1AC
*
*"D" Dump Memory for Examine in Hex & AscII
* 	
MDUMP	JSR   IN2ADR
 	BVS   EDPRIN;abs = F1B1
MDUMP1	CPX   BUF2 
	BCC   AJDUMP;abs = F1B2
EDPRIN	RTS   
*
*adjust lower & upper Address Limits to Even 16 Bytes Boundaries
*  	
AJDUMP	LDD   BUF0
 	ADDD  #16
 	ANDB  #$F0
  	STD   BUF0 
  	LDD   BUF2 
 	ANDB  #$F0
 	EXG   D,X
NXTLIN	CPX   BUF0 
	BEQ   SKPDMP;abs = F1CE
 	JSR   INCHEK
 	BEQ   EDUMP ;abs = F1CF
SKPDMP	RTS   
EDUMP 	STX   BUF2 
  	LDX   #MSG5 
  	JSR   PSTRNG
 	LDX   BUF2 
  	JSR   OUT4H
  	JSR   OUT2S
 	LDAB  #16
ELOOP	LDAA  0,X
 	INX   
 	JSR   OUT2H
 	JSR   OUT1S
 	DECB  
 	BNE   ELOOP  ;abs = F1E3
 	JSR   OUT2H
 	LDX   OUT1S
 	LDAB  #16
EDPASC	LDAA  0,X
	INX   
 	CMPA  #32
	BCS   PERIOD;abs = F202
 	CMPA  #$7E
	BLS   PRASC ;abs = F204
PERIOD 	LDAA  #$26
PRASE	JSR   OUTCH
	DECB  
 	BNE   EDPASC ;abs = F1F7
 	BRA   NXTLIN ;abs = F1C4
*
*erase flash
*  	
ERSPLSH	LDY   #FlashRAM
  	LDX   #EHEAD
 	LDD   #EEND 
 	SUBD  #EHEAD
ERASELP	MOVB  0,X,0,Y
 	INX   
 	INY   
 	DBNE  D,ERASELP          
 	JMP   FlashRAM
*
*F COMMAMD,PROGRAM FLASH
* 	
PROGRAMFlash	
	LDY   FlashRAM
 	LDX   #FHEAD
  	LDD   #FEND 
 	SUBD  #FHEAD
*
PROGRAMLOOP
	MOVB  0,X,0,Y
	INX   
	INY   
	DBNE  D,PROGRAMLOOP   ;abs = F230
 	JMP   FlashRAM
*
*FOR BANKED ERASE
*  	
ERASEBANK
	LDY   #FlashRAM
 	LDX   #QHEAD
  	LDD   #QEND 
	SUBD  #QHEAD
*
BANKERASELOOP
	MOVB  0,X,0,Y
 	INX   
 	INY   
 	DBNE  D,BANKERASELOOP   ;abs = F248
 	JMP   FlashRAM
*
*"R" Display cpu Registers
* 	
REGDSP	LDX   #MSG5 
 	JSR   PSTRNG
 	JSR   PRTSP
  	JSR   PRTIX
 	JSR   PRTIY
 	LDX   #MSG5 
 	JSR   PSTRNG
	JSR   PRTPC
 	JSR   PRTA
 	JSR   PRTB
 	JMP   PRTCC
BKPTCV RTS   
*
*"H" Command for help
* 	
HELP	LDX   #HELPM 
 	JMP   PSTRNG
*
*DOWNLOAD TO RAM
* 	
DWNLD	CLR   ECHO
 	CLR   BUF3 
 	JSR   INCH 
	CMPA  #'S'
	BNE   NLINE ;abs = F282
 	JSR   INCH
 	CMPA  #'1'
	BEQ   S1  ;abs = F2A1
	CMPA  #'9'
	BNE   NLINE  ;abs = F282
S9	JSR   INCH 
 	CMPA  #$0D
	BEQ   ENDL   ;abs = F2ED
 	CMPA  #10
	BNE   S9   ;abs = F294
 	BRA   ENDL   ;abs = F2ED
S1	JSR   BYTE 
	BVS   LERR   ;abs = F2E7
  	STAA  BUF2 
  	STAA  BUF3 
 	JSR   IN1ADR
	BVS   LERR   ;abs = F2E7
 	EXG   D,X
 	ABA   
  	ADDA  BUF3 
 	STAA  BUF3 
 	DEC   BUF2 
 	DEC   BUF2 
  	LDY   BUF0 
DATA	JSR   BYTE 
	BVS   LERR   ;abs = F2E7
 	PSHA  
  	ADDA  BUF3 
  	STAA  BUF3 
 	PULA  
 	DEC   BUF2 
	BEQ   ENDS1 ;abs = F2DB
 	STAA  0,Y
 	INY   
 	BRA   DATA   ;abs = F2C4
ENDS1	LDAA  #$2A
  	JSR   OUTCH
 	LDAA  #$FF
 	CMPA  BUF3 
	BEQ   NLINE  ;abs = F282
LERR	LDX   #LERRM
  	JSR   PSTRNG
 	COM   ECHO
 	RTS   
*
*SETUP BREAK POINTS
*	
BREAKPOINT
	LDAA  BKPCT0
 	ANDA  #128
	BNE   PBKPT  ;abs = F350
	LDAA  #144
 	STAA  BKPCT0
 	LDAA  #0
 	STAA  BKPCT1
  	LDX   #MSG22
 	JSR   PDATA
	LDAA  #'1'
 	JSR   PDATA 
  	LDX   #MSG20 
 	JSR   PDATA 
	JSR   BYTE 
	BVS   BREAKBACK;abs = F34F
 	ANDA  #63
 	STAA  BKP0X
 	LDX   #MSG22
 	JSR   PDATA
 	JSR   IN1ADR
 	LDY   #BKP0H
 	STX   0,Y
  	LDX   #MSG22
 	JSR   PDATA
 	LDAA  #'2'
 	JSR   OUTCH
  	LDX   MSG20
 	JSR   PDATA
	JSR   BYTE
	BVS   BREAKBACK
 	ANDA  #63
 	STAA  BKP1X
 	LDX   #MSG21
 	JSR   PDATA
	JSR   IN1ADR
  	LDY   #BKP1H
 	STX   0,Y
BREAKBACK	RTS   
*
*DISPLAY break points address
*  	
PBKPT	LDX   #MSG22
 	JSR   PDATA
 	LDAA  BKP0X
 	JSR   OUT2H
  	JSR   OUT1S
  	LDX   BKP0H
 	JSR   OUT4H
  	LDX   #MSG22
 	JSR   PDATA
 	LDAA  BKP1X
 	JSR   OUT2H
 	JSR   OUT1S
 	LDX   BKP1H
 	JSR   OUT4H
 	BRA   BREAKBACK
*
*CLEAR BREAK POINTS
* 	
CLEARBP	LDX   #0
 	STX   BKPCT0
 	STX   BKP0X
 	STX   BKP0L
 	STX   BKP1H
  	LDX   #MSG23
 	JSR   PDATA
 	RTS   
*
*F COMMAND DOWNLOAD S.19 FILE INTO FLASH
* 	
EHEAD	BSR   FINCH
 	CMPA  #83
	BNE   FHEAD
 	BSR   FINCH
	CMPA  #49
	BEQ   FS1
	CMPA  #50
	BEQ   FS2
 	CMPA  #56
	BEQ   FS9
 	CMPA  #57
 	BNE   FHEAD
FS9	BSR   BYTEEN2
  	STAA  BUF2
FS91	BSR   BYTEEN2
 	DEC   BUF2
 	BNE   FS91
 	RTS   
*
*
*  	
FINCH	BRCLR SCI0SR1,#$20,*
 	LDAA  SCI0DRL
 	RTS   
*
*
* 	
FS2	BSR   BYTEEN2
 	STAA  BUF2
 	BSR   BYTEEN2
  	STAA  BUF5
 	DEC   BUF2
 	BSR   IN1ADREN2
 	DEC   BUF2
 	DEC   BUF2
  	LDAA  BUF2
 	LSRA  
  	STAA  BUF3
  	LDY   #RAMPGMBUF
DATA2	BSR   BYTEEN2
 	STAA  0,Y
 	INY   
 	DEC   BUF2
 	BNE   DATA2
  	LDX   BUF0
  	LDY   #RAMPGMBUF
 	TFR   CCR,A
 	STAA  CCRCOPY
 	ORCC  #16
 	LDAB  BUF5
 	LSRB  
	LSRB  
	COMB  
 	ANDB  #3
 	STAB  FCNFG
 	LDAB  #48
 	STAB  FSTAT
 	LDAB  BUF5
 	STAB  PPAGE
	BRA   PROGRAM
*
BYTEEN2	BRA   BYTEEN
IN1ADREN2	LBRA  IN1ADR
*
FS1	BSR   BYTEEN
LP2	STAA  BUF2
S12	BSR   IN1ADREN
 	DEC   BUF2
 	DEC   BUF2
 	LDAA  BUF2
	LSRA  
 	STAA  BUF3
  	LDY   #RAMPGMBUF
FDATA	BSR   BYTEEN
 	STAA  0,Y
	INY   
 	DEC   BUF2
	BNE   FDATA   ;abs = F420
  	LDX   BUF0
  	LDY   #RAMPGMBUF
 	LDAA  #74
 	STAA  FCLKDIV
 	TFR   CCR,A
 	STAA  CCRCOPY
 	ORCC  #16
 	LDAA  #0
 	LDAB  #0
 	LDAA  BUF0
 	ANDA  #64
	BNE   BLOCK3
 	LDAB  PPAGE
	LSRB  
 	LSRB  
 	COMB  
 	ANDB  #3
BLOCK	STAB  FCNFG
	LDAA  #48
 	STAA  FSTAT
	BRA   PROGRAM
*
BYTEEN	BRA   FBYTE
IN1ADREN	BRA   FIN1ADR
* 
PROGRAM	BRCLR FSTAT,#CBEIF,*