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📄 soc_load.c

📁 Infineon公司有一款实现SHDSL协议(ADSL协议的变种)的芯片
💻 C
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/* ============================= */
/* Includes                      */
/* ============================= */

#include <stdio.h>
#include <absacc.h>

#include "sysdef.h"
#include "dds.h"            
#include "sysvar.h"
#include "sysfunc.h"

#include "reg165.h"
#include "modid.h"          

//  Group= SOC_LOAD 


/*******************************************************************************************
       host side bootload
  the sequence consists of the following
   1. Set MODE_E to 80 to signal slave mpu that we want to do a memory
      download  
   1a .check STAT_E to see that HDLC is not busy
   2. if not busy reset fifos via CMD_E
   3.  Send BYTE count in XBC_E - 2 address bytes + code data bytes
   4.  Put MSByte and LSByte of Slave Ram Address in the fifo XFIFO_E
   5.  Put 64 bytes of code data into fifo XFIFO_E
   6.  See if slave MPU is ready for another download via ISTA_E.1 bit
   7.  Download in blocks of 64 or less until finished loading the slave ram.
   8.  Make sure BYTE Cnt is correct for each block via XBC_E
   9.  Set BYTE Cnt to 2 but transmit only one byte to reckcgnize next MODE_E
   9.  Signal slave mpu to send back calculated checksum via MODE_E = 0x80
  10.  wait till slave mpu signals that the fifo (XFIFO_E) contains the checksum via STAT_E
  11.  compare this checksum vs. the checksum in codetabl.h
  12.  when finished switch the slave mpu back to HDLC mode via MODE_E=0
*******************************************************************************/
BOOL Soc_Load (WORD16 startaddress, WORD8 xhuge *data, WORD16 length) 
{
    WORD16 address;
    WORD8 accu, bcount, buffer;

   Disable_Interrupt (INT_SOCRATES);       
    
    /* Reset Socrates to start download */

    S_RST_SET;                     
    S_RST_CLEAR;
    
    /* Wait until registers are accessible */
    
    while ( In(SOCRATES_DSEL) != 0x07 )    Out (SOCRATES_DSEL, 0x07);
    Out (SOCRATES_DSEL, 0x00);

    
    /* API default settings 
       just in case this function is called independently form config_write and 
       no other API setting is done before activation*/

   Out (SOCRATES_MASK_E, 0xFD);                     /* enable acknowledge */
   Out (SOCRATES_MODE_E, 0x80);                     /* Reset download */
 
   Out (SOCRATES_CIF_CON_1, 0x60);                  /* PCM slave, bit serial, DSOUT open drain */
   Out (SOCRATES_TRAN_CON_1, 0x24);                 /* SDSL sync, 3bps, external timed, RT */

   Out (SOCRATES_POW_BOFF, 0xff);                 /* avoid any output on line */
    
   Out (SOCRATES_RATE_CON_1, 0x06);                 /* Rate = 6B0Z */
   Out (SOCRATES_RATE_CON_2, 0x00);
     
    /* Take internal MPU out of reset */
    
   Out (SOCRATES_CONF, 0x04);                        /* internal ROM, WDOG disabled */


   WHILE_NOT_ABORT ((In(SOCRATES_STAT_E) != 0x00));   /* check if HDLC is not busy */
   if (G_Abort == TRUE)
   {
      printf("\n(SLOT %d) FIFO still active", SLOT_NR);
      Enable_Interrupt (INT_SOCRATES);       
      return FALSE;
   }
   
   Out (SOCRATES_CMD_E, 0x03);                         /* reset FIFO */
   Out (SOCRATES_CMD_E, 0x00);

   Out (SOCRATES_XBC_E, 0x42);                         /* number of bytes for first download */

   Out (SOCRATES_XFIFO_E, startaddress / 0x100);       /* store internal startaddress */
   Out (SOCRATES_XFIFO_E, startaddress % 0x100);

    
   Out (SOCRATES_ISTA_E, In(SOCRATES_ISTA_E) & 0xFD);              /* clear acknowledge at the beginning */

   /* don't trace all the reads and writes done by download */
   buffer = G_Eeprom[DEBUG_V24_TRACE];
   G_Eeprom[DEBUG_V24_TRACE] = 0x00;

   accu    = 0x00;
   address = 0x0000;
   bcount  = 0x00;                       /* to avoid compiler warnings */

   while(address < length)               /* loop till all bytes transferred */
   {
       bcount = 0x00;
       while ((address < length) && (bcount < 0x40))
       {
          Out (SOCRATES_XFIFO_E, data[address]);
          accu += data[address];
          address++;
          bcount++;
       }
       Out (SOCRATES_MODE_E, 0xC0);                     /* set write command */
      WHILE_NOT_ABORT (!(In(SOCRATES_ISTA_E) & 0x02));  /* wait for write acknowledge */
      if (G_Abort == TRUE)
      {
         printf("\n(SLOT %d) Transmit pool not ready", SLOT_NR);
         Enable_Interrupt (INT_SOCRATES);       
         return FALSE;
      }

       Out (SOCRATES_ISTA_E, In(SOCRATES_ISTA_E) & 0xFD);   /* clr acknowledge */

       if ((length-address) < 0x40)
       {
          Out (SOCRATES_XBC_E, length-address);         /* #bytes for last block */
       }
       else
       {
          Out (SOCRATES_XBC_E, 0x40);                   /* #bytes to transmit next */
       }
    }

    Out (SOCRATES_XBC_E, 0x02);                          /* allow next download with 2 bytes but send only  */
    Out (SOCRATES_XFIFO_E, 0x00);                        /* one dummydata to get MPU into loop for chksm request */
                                                         /* "0" does not change the checksum */

   WHILE_NOT_ABORT (!(In(SOCRATES_ISTA_E) & 0x02));
   if (G_Abort == TRUE)
   {
      printf("\n(SLOT %d) Transmit pool not ready", SLOT_NR);
      /* trace all further reads and writes if wanted */
      G_Eeprom[DEBUG_V24_TRACE] = buffer;
      Enable_Interrupt (INT_SOCRATES);       
      return FALSE;
   }
    Out (SOCRATES_ISTA_E, In(SOCRATES_ISTA_E) & 0xFD);   /* clr acknowledge */

    Out (SOCRATES_MODE_E, 0x80);                         /* tell MPU to send cksum */



    WHILE_NOT_ABORT (In(SOCRATES_STAT_E) != 0x00);      /* wait till MPU signals that rfifo has cksum */

   /* trace all further reads and writes if wanted */
   G_Eeprom[DEBUG_V24_TRACE] = buffer;


    if (accu == In (SOCRATES_RFIFO_E))                  /* verify cksm */
    {
       printf ("\nCRC OK :0x%02x",accu);
    }
    else
    {
       printf ("\n(SLOT %d) CRC failed :0x%02x", SLOT_NR, accu);
       Enable_Interrupt (INT_SOCRATES);       
       return FALSE;                                    /* indicate download failed */
    }


    {
       Out (SOCRATES_MODE_E, 0x00);                     /* tell MPU to execute program switch */
    }

    Enable_Interrupt (INT_SOCRATES);       
    return TRUE;                                        /* indicate download ok. */

}


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