📄 main.c
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G_Ghs_Capability_List[CL_SI_NPAR1] = 0x00;
G_Ghs_Capability_List[CL_SI_SPAR1_1] = 0x00; /*Annex X */
G_Ghs_Capability_List[CL_ST_SPAR1_2] = 0x02; /*Annex a,b */
G_Ghs_Capability_List[CL_SI_NPAR2] = 0x01; /*Train, Lineprobe or Reg_Silent */
G_Ghs_Capability_List[CL_SI_SPAR2_1] = 0x33; /*first 6 Bit */
G_Ghs_Capability_List[CL_SI_SPAR2_2] = 0x01; /*last 2 Bit */
G_Ghs_Capability_List[CL_T_PBODN] = 0x06; /*PowBackoff down */
G_Ghs_Capability_List[CL_T_BRATEDN1] = 0x30; /*B-Channels */
G_Ghs_Capability_List[CL_T_BRATEDN2] = 0x3f;
G_Ghs_Capability_List[CL_T_BRATEDN3] = 0x3f;
G_Ghs_Capability_List[CL_T_BRATEDN4] = 0x3f;
G_Ghs_Capability_List[CL_T_BRATEDN5] = 0x3f;
G_Ghs_Capability_List[CL_T_BRATEDN6] = 0x3f;
G_Ghs_Capability_List[CL_T_BRATEDN7] = 0x01;
G_Ghs_Capability_List[CL_T_SRATEDN1] = 0x3f; /*Z-bits */
G_Ghs_Capability_List[CL_T_SRATEDN2] = 0x03;
G_Ghs_Capability_List[CL_T_PBOUP] = 0x06; /*PowerBackoff up */
G_Ghs_Capability_List[CL_T_BRATEUP1] = 0x30; /*B-Channels */
G_Ghs_Capability_List[CL_T_BRATEUP2] = 0x3f;
G_Ghs_Capability_List[CL_T_BRATEUP3] = 0x3f;
G_Ghs_Capability_List[CL_T_BRATEUP4] = 0x3f;
G_Ghs_Capability_List[CL_T_BRATEUP5] = 0x3f;
G_Ghs_Capability_List[CL_T_BRATEUP6] = 0x3f;
G_Ghs_Capability_List[CL_T_BRATEUP7] = 0x01;
G_Ghs_Capability_List[CL_T_SRATEUP1] = 0x3f; /*Z-Bits */
G_Ghs_Capability_List[CL_T_SRATEUP2] = 0x03;
G_Ghs_Capability_List[CL_PBODN] = 0x06; /*PowBackoff down */
G_Ghs_Capability_List[CL_BRATEDN1] = 0x30; /*B-Channels */
G_Ghs_Capability_List[CL_BRATEDN2] = 0x3f;
G_Ghs_Capability_List[CL_BRATEDN3] = 0x3f;
G_Ghs_Capability_List[CL_BRATEDN4] = 0x3f;
G_Ghs_Capability_List[CL_BRATEDN5] = 0x3f;
G_Ghs_Capability_List[CL_BRATEDN6] = 0x3f;
G_Ghs_Capability_List[CL_BRATEDN7] = 0x03;
G_Ghs_Capability_List[CL_FIX1_DN] = 0x01;
G_Ghs_Capability_List[CL_FIX2_DN] = 0x00;
G_Ghs_Capability_List[CL_DURATDN] = 0x00; /*Line burst duration */
G_Ghs_Capability_List[CL_SCRAMBDN] = 0x00; /*Scrambler */
G_Ghs_Capability_List[CL_PBOUP] = 0x06; /*PowerBackoff up */
G_Ghs_Capability_List[CL_BRATEUP1] = 0x30; /*B-Channels */
G_Ghs_Capability_List[CL_BRATEUP2] = 0x3f;
G_Ghs_Capability_List[CL_BRATEUP3] = 0x3f;
G_Ghs_Capability_List[CL_BRATEUP4] = 0x3f;
G_Ghs_Capability_List[CL_BRATEUP5] = 0x3f;
G_Ghs_Capability_List[CL_BRATEUP6] = 0x3f;
G_Ghs_Capability_List[CL_BRATEUP7] = 0x03;
G_Ghs_Capability_List[CL_FIX1_UP] = 0x01;
G_Ghs_Capability_List[CL_FIX2_UP] = 0x00;
G_Ghs_Capability_List[CL_DURATUP] = 0x00; /*Line burst duration */
G_Ghs_Capability_List[CL_SCRAMBUP] = 0x00; /*Scrambler */
G_Ghs_Capability_List[CL_STUFFBIT_DN] = 0x03; /*Stuff bits */
G_Ghs_Capability_List[CL_SYNCOC1_DN] = 0x3c; /*Sync word */
G_Ghs_Capability_List[CL_SYNCOC2_DN] = 0x0c;
G_Ghs_Capability_List[CL_STUFFBIT_UP] = 0x03; /*Stuff bits */
G_Ghs_Capability_List[CL_SYNCOC1_UP] = 0x3c; /*Sync word */
G_Ghs_Capability_List[CL_SYNCOC2_UP] = 0x0c;
G_Ghs_Capability_List[CL_TPSCLOCK_A] = 0x07; /*Clock mode */
G_Ghs_Capability_List[CL_TPSCHANNEL_A] = 0x3f; /*Channel */
G_Ghs_Capability_List[CL_TPSISDN_A] = 0x00;
G_Ghs_Capability_List[CL_DUALTPS1_A] = 0x00;
G_Ghs_Capability_List[CL_DUALTPS2_A] = 0x00;
G_Ghs_Capability_List[CL_DUALTPS3_A] = 0x00;
G_Ghs_Capability_List[CL_DUALTPS4_A] = 0x00;
G_Ghs_Capability_List[CL_DUALTPS5_A] = 0x00;
G_Ghs_Capability_List[CL_DUALTPS6_A] = 0x00;
G_Ghs_Capability_List[CL_TPSCLOCK_B] = 0x07; /*Clock mode */
G_Ghs_Capability_List[CL_TPSCHANNEL1_B] = 0x3f; /*Channel */
G_Ghs_Capability_List[CL_TPSCHANNEL2_B] = 0x01; /*Channel */
G_Ghs_Capability_List[CL_TPSISDN_B] = 0x00;
G_Ghs_Capability_List[CL_DUALTPS1_B] = 0x00;
G_Ghs_Capability_List[CL_DUALTPS2_B] = 0x00;
G_Ghs_Capability_List[CL_DUALTPS3_B] = 0x00;
G_Ghs_Capability_List[CL_DUALTPS4_B] = 0x00;
G_Ghs_Capability_List[CL_DUALTPS5_B] = 0x00;
G_Ghs_Capability_List[CL_DUALTPS6_B] = 0x00;
G_Ghs_Capability_List[CL_NUMBLOCK] = 0x00;
G_Ghs_Capability_List[CL_NSTDBLOCK1] = 0x00;
G_Ghs_Capability_List[CL_NSTDBLOCK2] = 0x00;
}
/*******************************************************************************
Description:
Is called in each main loop run, checks for transceiver state machine changes
and prints the uploaded capability list.
Arguments:
none
Return:
none
Remarks:
none
******************************************************************************/
static void Poll_Loop (void)
{
WORD32 value;
switch (Soc_Int_Fifo_Get (&value))
{
case NO_INT:
break;
case CL_UP_INT:
/* print uploaded cap-list if flag is set by int-routine */
if (G_Ghsstate_Indication == 0x01)
Soc_Cl_Indicate ();
break;
case INT_REG_TIMER:
/* restore value */
Out (G_Register_Timer.Address, G_Register_Timer.Old_Value);
V24_PRINT(("\nTime out, 0x%02X overwritten by 0x%02X", G_Register_Timer.Last_Value, G_Register_Timer.Old_Value));
break;
case SNR_INT:
/* print uploaded SNR data if flag is set by int-routine */
Soc_Snr_Indicate ();
break;
case RESET_RFIFO_E:
/* reset RFIFO_E */
Out (SOCRATES_CMD_E, SOCRATES_CMD_E_RRES_E);
/* wait for acknowledge */
WHILE_NOT_ABORT ((In (SOCRATES_STAT_E) & SOCRATES_STAT_E_RRESA_E) != SOCRATES_STAT_E_RRESA_E);
if (G_Abort)
{
V24_PRINT (("\n(SLOT %d) RRESA_E timed out!", SLOT_NR));
}
Out (SOCRATES_CMD_E, 0x00);
break;
case ATSC_INT:
/* indicate Transceiver state change */
Soc_Indicate_State (value);
break;
case TST2C_INT:
/* indicate new TrStat2 */
Soc_Indicate_Trstat2 (value);
break;
case OVHC_INT:
/* indicate Receive overhead bits*/
Soc_Indicate_Rxovh (value >> 8, value & 0xFF);
break;
case EOC_TX_INT:
/* indicate successful EOC transmission */
Soc_Eoc_Transmit_Ind();
break;
case EOC_RX_INT:
/* indicate EOC reception */
Soc_Eoc_Receive_Ind();
break;
case EOC_ERROR_INT:
/* indicate EOC Error */
Soc_Eoc_Error_Ind();
break;
case HDLC_TX_INT:
/* indicate successful HDLC transmission */
Soc_Hdlc_Transmit_Ind();
break;
case HDLC_RX_INT:
/* indicate HDLC reception */
Soc_Hdlc_Receive_Ind();
break;
case HDLC_ERROR_INT:
/* indicate HDLC Error */
Soc_Hdlc_Error_Ind (value >> 8, value & 0xFF);
break;
default:
V24_PRINT (("\nError: Unknown event to indicate!"));
break;
}
/* check if a time measurement has finished */
if (G_Timer.Status == TIMER_STATUS_FINISHED)
{
/* send indication message with data */
Msg_Soc_Indicate_State_Time ();
}
}
/*******************************************************************************
Description:
Interprets and indicates the new reached transceiver state by printout
and LEDs.
Arguments:
state - new transceiver state to indicate
Return:
none
Remarks:
none
******************************************************************************/
static void Soc_Indicate_State (WORD8 tstat)
{
WORD8 state;
/* set LEDs */
if (G_Led_Crc_Error == FALSE)
REG_LED = (REG_LED & ~0x3f) | tstat;
/* send indication */
Msg_Soc_Interrupt (ATSC_INT, 1, &tstat);
V24_PRINT (("TSTAT: 0x%2X ", tstat));
/* print indication */
if (G_Ghsstate_Indication == 0x01)
{
if ((tstat & SOCRATES_TSTAT_ICMD) == SOCRATES_TSTAT_ICMD)
printf ("Illegal Command from State ");
/* eliminate illegal-command-flag */
state = tstat & ~SOCRATES_TSTAT_ICMD;
/* print the lower states */
if (state <= DATA)
{
printf ("%s", Ghs_State_Names [state]);
}
else /* check Data-Failure bits */
{
printf ("Data ");
if ((state & CRC_ANOMALY) == CRC_ANOMALY)
{
printf("CRC Anomaly, ");
}
#ifndef INTEROP
if ((state & LOSW_DEFECT) == LOSW_DEFECT)
printf("LOSW Defect, ");
if ((state & LOOP_ATTEN_DEF) == LOOP_ATTEN_DEF)
printf("Loop Attenuation Defect, ");
if ((state & SNR_MARGIN_DEF) == SNR_MARGIN_DEF)
printf("SNR Margin Defect, ");
if ((state & LOSW_FAILURE) == LOSW_FAILURE)
printf("LOSW Failure");
#endif
}
}
#ifdef INTEROP
if ((tstat & CRC_ANOMALY) == CRC_ANOMALY)
{
Start_Timer (TIMER_LED);
G_Led_Crc_Error = TRUE;
REG_LED = (REG_LED | 0x3f);
}
#endif
if (tstat == DATA)
Soc_Set_Cot_Rt_Led ();
}
/*******************************************************************************
Description:
Interprets and indicates the new reached transceiver state by printout
and LEDs.
Arguments:
state - new transceiver state to indicate
Return:
none
Remarks:
none
******************************************************************************/
static void Soc_Cl_Indicate (void)
{
WORD8 i;
printf ("\n(Slot %d) Capability List:", SLOT_NR);
for (i=0; i<CAPLIST_LENGTH; i++)
printf ("\n %30s : 0x%2X", Ghs_Cl_Names [i], G_Ghs_Cl_Upload [i]);
}
/*******************************************************************************
Description:
Interprets and indicates the new reached TRSTAT_2 state by printout.
Arguments:
trstat2 - value from TRSTAT_2 register to interpret
Return:
none
Remarks:
none
******************************************************************************/
static void Soc_Indicate_Trstat2 (WORD8 trstat2)
{
Msg_Soc_Interrupt (TST2C_INT, 1, &trstat2);
V24_PRINT (("TRSTAT_2: 0x%2X", trstat2));
if (trstat2 & 0x20)
{
V24_PRINT ((", MDSL training sequence received"));
}
if (trstat2 & 0x10)
{
V24_PRINT ((", hand shake pattern received"));
}
if (trstat2 & 0x08)
{
V24_PRINT ((", TSFSC/SYNC active on last frame"));
}
if (trstat2 & 0x04)
{
V24_PRINT ((", TFSC Jerk detected"));
}
if (trstat2 & 0x02)
{
V24_PRINT ((", receive slip detected"));
}
if (trstat2 & 0x01)
{
V24_PRINT ((", transmit slip detected"));
}
}
/*******************************************************************************
Description:
Interprets and indicates the RX_OVERH_X bits by printout.
Arguments:
ovh1 - value from RX_OVERH_1 register to interpret
ovh2 - value from RX_OVERH_2 register to interpret
Return:
none
Remarks:
none
******************************************************************************/
static void Soc_Indicate_Rxovh (WORD8 ovh2, WORD8 ovh1)
{
WORD8 ovh[2];
ovh[0] = ovh1;
ovh[1] = ovh2;
/* send indication */
Msg_Soc_Interrupt (OVHC_INT, 2, ovh);
V24_PRINT (("RX_OVERH_1: 0x%2X, RX_OVERH_2: 0x%2X", ovh[0], ovh[1]));
}
/*******************************************************************************
Description:
Indicates SNR data by printout.
Arguments:
none
Return:
none
Remarks:
none
******************************************************************************/
static void Soc_Snr_Indicate (void)
{
WORD8 nr = G_Snr [1],
i;
V24_PRINT (("\n(SLOT %d) Received SNR data in dB: ", SLOT_NR));
/* print SNR data but not first two */
for (i=2; (i<nr) && (i<SNR_LENGTH); i++)
V24_PRINT (("\n SNR[%d]:\t%hi ", i+1, (G_Snr [i]+((G_Snr [i]>=0x80)*0xff00))));
}
/*******************************************************************************
Description:
Indicates COT or RT by LED setting.
Arguments:
none
Return:
none
Remarks:
none
******************************************************************************/
static void Soc_Set_Cot_Rt_Led (void)
{
/* delete LEDs */
if (G_Led_Crc_Error == FALSE)
{
REG_LED = (REG_LED & ~0x3f);
/* reset LED for RT/COT indication */
if ((G_Eeprom [CONFIG_MODE] == MODE_COT_EXT) || (G_Eeprom [CONFIG_MODE] == MODE_COT_INT))
COT_LED_ON;
else
COT_LED_OFF;
}
}
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