📄 main.c
字号:
/*******************************************************************************
Copyright (c) 2000, Infineon Technologies. All rights reserved.
No Warranty
Because the program is licensed free of charge, there is no warranty for
the program, to the extent permitted by applicable law. Except when
otherwise stated in writing the copyright holders and/or other parties
provide the program "as is" without warranty of any kind, either
expressed or implied, including, but not limited to, the implied
warranties of merchantability and fitness for a particular purpose. The
entire risk as to the quality and performance of the program is with
you. should the program prove defective, you assume the cost of all
necessary servicing, repair or correction.
In no event unless required by applicable law or agreed to in writing
will any copyright holder, or any other party who may modify and/or
redistribute the program as permitted above, be liable to you for
damages, including any general, special, incidental or consequential
damages arising out of the use or inability to use the program
(including but not limited to loss of data or data being rendered
inaccurate or losses sustained by you or third parties or a failure of
the program to operate with any other programs), even if such holder or
other party has been advised of the possibility of such damages.
*******************************************************************************
Module: Main
Product ID: 22622.1.0.1
Description: Main initialization of SMART2000 firmware operating system.
******************************************************************************/
// Group=MAIN
/* ============================= */
/* Includes */
/* ============================= */
#include <stdio.h>
#include <absacc.h>
#include <intrins.h>
#include <stdlib.h>
#include "sysdef.h"
#include "sysvar.h"
#include "dds.h"
#include "sysfunc.h"
#include "reg165.h"
/* ============================= */
/* Local Macros & Definitions */
/* ============================= */
/* Total number of software
timers. */
#define TOTAL_NR_OF_TIMERS 5
/* Total byte size of dynamic
memory management unit. */
#define MMU_SIZE 8192
/* T5 and T6 reload for 100ms or 1ms. */
#define T_100MS 62500
#define T_1MS 625
/* Initialization message slot1. */
#ifdef SLOT1
#ifdef MUX
#define INIT_MAINBOARD _bfld_(BUSCON2, 0x00C0, 0x0040); \
MR_RESST1_SET; \
MR_DMUXST1_CLEAR
#endif
#ifdef DEMUX
#define INIT_MAINBOARD _bfld_(BUSCON2, 0x00C0, 0x0000); \
MR_RESST1_SET; \
MR_DMUXST1_SET
#endif
#define RELOAD_TIMER T5 = T_1MS;
#endif
/* Initialization message slot2. */
#ifdef SLOT2
#ifdef MUX
#define INIT_MAINBOARD _bfld_(BUSCON3, 0x00C0, 0x0040); \
MR_RESST2_SET; \
MR_DMUXST2_CLEAR
#endif
#ifdef DEMUX
#define INIT_MAINBOARD _bfld_(BUSCON3, 0x00C0, 0x0000); \
MR_RESST2_SET; \
MR_DMUXST2_SET
#endif
#define RELOAD_TIMER T6 = T_1MS;
#endif
/* ============================= */
/* Local variable definition */
/* ============================= */
/* List to hold the meanings of the
capability list entries */
static const WORD8 Ghs_Cl_Names [CAPLIST_LENGTH] [22] =
{
"CL Rev Nr",
"CL Length",
"Transaction ID",
"RevNr",
"Country1", "Country2",
"Prov1", "Prov2", "Prov3", "Prov4",
"VendInf1", "VendInf2",
"NPar1",
"SPar1",
"UpMaxNDR", "UpMinNDR", "UpAvgNDR",
"DnMaxNDR", "DnMinNDR", "DnAvgNDR",
"UpMaxLat", "UpAvgLat",
"DnMaxLat", "DnAvgLat",
"SI NPar1",
"SI SPar1 1",
"SI SPar1 2",
"SI NPar2",
"SI SPar2 1",
"SI SPar2 2",
"TrainDnPbo",
"TrainDnNR_B1", "TrainDnNR_B2", "TrainDnNR_B3", "TrainDnNR_B4",
"TrainDnNR_B5", "TrainDnNR_B6", "TrainDnNR_B7",
"TrainDnNR_Z1", "TrainDnNR_Z2",
"TrainUpPbo",
"TrainUpNR_B1", "TrainUpNR_B2", "TrainUpNR_B3", "TrainUpNR_B4",
"TrainUpNR_B5", "TrainUpNR_B6", "TrainUpNR_B7",
"TrainUpNR_Z1", "TrainUpNR_Z2",
"DnPbo",
"DnNR_B1", "DnNR_B2", "DnNR_B3", "DnNR_B4",
"DnNR_B5", "DnNR_B6", "DnNR_B7",
"DnFixed1", "DnFixed2",
"DnDurat",
"DnScra",
"UpPbo",
"UpNR_B1", "UpNR_B2", "UpNR_B3", "UpNR_B4",
"UpNR_B5", "UpNR_B6", "UpNR_B7",
"UpFixed1", "UpFixed2",
"UpDurat",
"UpScra",
"DnStuff",
"DnSync1", "DnSync2",
"UpStuff",
"UpSync1", "UpSync2",
"TPSClock A",
"TPSChannel A",
"TPS ISDN A",
"DualTPS1 A", "DualTPS2 A", "DualTPS3 A",
"DualTPS4 A", "DualTPS5 A", "DualTPS6 A",
"TPSClock B",
"TPSChannel1 B",
"TPSChannel2 B",
"TPS ISDN B",
"DualTPS1 B", "DualTPS2 B", "DualTPS3 B",
"DualTPS4 B", "DualTPS5 B", "DualTPS6 B",
"Non Std Block Length", "NonStdBl1", "NonStdBl2"
};
static const WORD8 Ghs_State_Names [65][30] =
{
"SDSL Power Down", "Send Single Pulses", "Initialization", "Processing CL",
"Transp analog Loop closed", "Transp analog Loop active", "Nontransp analog Loop closed", "Nontransp analog Loop active",
"MDSL Mode", "MDSL Mode", "MDSL Mode", "MDSL Mode",
"MDSL Mode", "MDSL Mode", "MDSL Mode", "MDSL Mode",
"G.hs Startup", "G.hs Transaction Autonomous", "Line Probing", "G.hs Finished",
"G.hs Silence", "G.hs Startup Failed", "G.hs Transact Failed", "Line Probe Failed",
"G.hs No Common Mode", "", "", "",
"", "", "", "",
"", "Wait for Cr", "Transmit Sc", "Transmit Tc",
"Transmit Fc", "", "", "",
"Transmit Cr", "Silent", "Transmit Sr", "Transmit Tr",
"", "", "", "",
"Sr Not Detected", "Tr Not Detected", "Data Exception", "",
"", "", "", "",
"Tc Not Detected", "Fc Not Detected", "", "",
"", "", "", "",
"Data, No Failure"
};
/* This buffer defines the
content of the dynamic memory
management unit. */
static WORD8 Mmu_Buffer [MMU_SIZE];
/* This is the software timer
table:
If a timer is running,
the current timer value is
stored in this table. Each
index of the array
corresponds to a timer :
0 : Timer Nr. 0,
1 : Timer Nr. 1, ... */
static WORD16 Timer_Current_Value [ TOTAL_NR_OF_TIMERS ];
/* Contains the initial values
of the software timer table
(hardware timer tic is 1ms). */
static const WORD16 Timer_Start_Value [ TOTAL_NR_OF_TIMERS ] =
{
/* For Timer Nr. 0:
TIMER_ABORT = 1s */
1000,
/* For Timer Nr. 1:
TIMER_WAIT = 200 ms */
200,
/* For Timer Nr. 2:
TIMER_MEASURE = 6 ms */
6,
/* TIMER_LED 500ms */
500,
/* TIMER_REG_WAIT 6ms */
6
};
static WORD16 Time_Elapsed=0;
/* ============================= */
/* Global variable definition */
/* ============================= */
BIT G_Abort;
BIT G_Wait;
BOOL G_Led_Crc_Error = FALSE;
/* Contains the values
of the interrupt source
vector table. */
const WORD8 G_Int_Vector [TOTAL_NR_OF_INT] =
{
/* For Interrupt Nr. 0:
T5 Interrupt */
0x25,
/* For Interrupt Nr. 1:
T6 Interrupt */
0x26,
/* For Interrupt Nr. 2:
Interrupt SOCRATES, slot1 (Ex INT0) */
0x18,
/* For Interrupt Nr. 3:
Interrupt SOCRATES, slot2 (Ex INT3) */
0x1B,
/* For Interrupt Nr. 4:
Interrupt EPIC, slot1 (Ex INT1) */
0x19,
/* For Interrupt Nr. 5:
Interrupt EPIC, slot2 (Ex INT4) */
0x1C,
/* For Interrupt Nr. 6:
Interrupt FALC, slot1 (Ex INT2) */
0x1A,
/* For Interrupt Nr. 7:
Interrupt FALC, slot2 (Ex INT5) */
0x1D,
};
/* This is the interrupt
disable table:
If a interrupt source is
disabled a counter is
increased. This makes it
possible to restore the
former disable state. Each
index of the array
corresponds to a interrupt
source:
0 : Interrupt Nr. 0,
1 : Interrupt Nr. 1, ... */
WORD8 G_Int_Disable_Count [TOTAL_NR_OF_INT];
/* Global array to hold the uploaded
capability list after g.hand shake */
WORD8 G_Ghs_Cl_Upload [CAPLIST_LENGTH];
/* Global array to hold the uploaded
line probing results */
WORD8 G_Snr [SNR_LENGTH];
/* Global structure to hold the status
and results of time measurement
between transceiver states */
T_TIMER G_Timer;
/* Global variable to buffer interrupts
to indicate */
T_INT_FIFO G_Int_Fifo;
/* ============================= */
/* Local function declaration */
/* ============================= */
static void Timer_Interrupt_Init (void);
static void Timer_Interrupt_Routine (void);
static void Soc_Cl_Init (void);
static void Poll_Loop (void);
static void Soc_Indicate_State (WORD8 state);
static void Soc_Cl_Indicate (void);
static void Soc_Indicate_Rxovh (WORD8 ovh2, WORD8 ovh1);
static void Soc_Indicate_Trstat2 (WORD8 trstat2);
static void Soc_Snr_Indicate (void);
static void Soc_Set_Cot_Rt_Led (void);
/* ============================= */
/* Global function definition */
/* ============================= */
/*******************************************************************************
Description:
Main initialization function for SMART2000 operating system.
Arguments:
pInfo - Pointer to info data structure.
Return:
int - test value.
Remarks:
Function is called from firmware while initialization.
******************************************************************************/
int AmdInit (P_DDS_INFO pInfo)
{
WORD8 error;
/* Make general mainboard
initialization. */
INIT_MAINBOARD;
/* Show user that DDS init.
is started. */
printf ("\nSocrates DDS\nProduct ID: %s, ", PRODUCT);
printf ("Version ID: %s\n", VERSION);
#ifdef SLOT1
printf ("Slot1, ");
#endif
#ifdef SLOT2
printf ("Slot2, ");
#endif
#ifdef MUX
printf ("Mux");
#endif
#ifdef DEMUX
printf ("Demux");
#endif
TRACE ((" - Debug Version"));
printf ("\nModule MAIN.C\t: Initialization done");
/* Read configuration from eeprom */
Read_Eeprom (FIRST_CONFIG_INDEX, LAST_CONFIG_INDEX);
Read_Eeprom (FIRST_DEBUG_INDEX, LAST_DEBUG_INDEX);
/* Check configuration */
error = Config_Check();
if (error != 0)
{
/* Set default configuration */
G_Eeprom[CONFIG_AUTO] = 0x00;
G_Eeprom[CONFIG_INTF] = 0x00; /* E1/PCM synchr */
G_Eeprom[CONFIG_MODE] = 0x00; /* COT ext timed */
G_Eeprom[CONFIG_P_CLK] = 0x00; /* PCM clk 2 MHz */
G_Eeprom[CONFIG_REF_CLK] = 0x00; /* 8 kHz */
G_Eeprom[CONFIG_UC_MODE] = 0x01; /*uC slave */
G_Eeprom[CONFIG_FRAME] = 0x00;
G_Eeprom [CONFIG_SYNC1] = 0x30;
G_Eeprom [CONFIG_SYNC2] = 0xfc;
G_Eeprom[DEBUG_V24_INT] = 0x00;
G_Eeprom[DEBUG_V24_TRACE] = 0x00;
/* Write default configuration to
eeprom */
Write_Eeprom (FIRST_CONFIG_INDEX, LAST_CONFIG_INDEX);
Write_Eeprom (FIRST_DEBUG_INDEX, LAST_DEBUG_INDEX);
}
/* Initialization of all
modules. */
Config_Module_Init ();
Debug_Module_Init ();
Customer_Module_Init (pInfo);
Socrates_Module_Init ();
Register_Module_Init ();
#ifdef DEBUG
//Added for debugging Thomas Lusin
Debuginterface_Module_Init ();
#endif
/* initializes the capability list */
Soc_Cl_Init ();
/* Init HDLC part and variables. */
Soc_Hdlc_Init();
/* initialize internal variables
for EOC handling */
Soc_Eoc_Init ();
/* Initialization of all
interrupt sources. */
Timer_Interrupt_Init ();
Soc_Interrupt_Init ();
/* Initialization of
polling routine. */
pInfo->fPollFct = Poll_Loop;
/* Initialization of the dynamic
memory management pool. */
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -