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📄 soc_ini.c

📁 Infineon公司有一款实现SHDSL协议(ADSL协议的变种)的芯片
💻 C
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   {
      V24INT_PRINT(("RCFDIR=1 (Output), "));
   }
   switch(frame){
   case 0:
        V24INT_PRINT(("SDSL framed, "));
        break;
   case 1:
        V24INT_PRINT(("SDSL plesiochronous framed, "));
        break;
   case 2:
        V24INT_PRINT(("MDSL framed, "));
        break;
   case 3:
        V24INT_PRINT(("transparent, "));
        break;
   default:
        V24INT_PRINT(("\n ERROR: Framing mode not available, "));
        return;
   }

                                      /* Set to bitserial, PCM slave          */
   BFLD ( SOCRATES_CIF_CON_1,  0xE0, 0x60);
 
                                      /* Set rcfdir bit.                      */
   BFLD ( SOCRATES_CIF_CON_2,  0x80, (rcfdir<<7));
 
                                      /* Set COT, ext. timing.                */
   BFLD ( SOCRATES_TRAN_CON_1, 0xC7, (frame<<6) | 0x05 ); 
                                    /* Ref must be 8k */
                                       /* DS 5 */
   BFLD ( SOCRATES_TRAN_CON_4, 0xC0, 0x00 );   
                                       /* old DS 
   BFLD ( SOCRATES_TRAN_CON_1, 0x08, 0x08);      */
                                    
}

/*******************************************************************************
Description: 
   Set Socrates to mode: bitserial, RT loop timed.
Arguments:
   rcfdir - wished value for RCFDIR bit of register CIF_CON_2.
   frame - according TRAN_CON_1 FRMD1..0
Return:
   NONE.
Remarks:
   NONE.
 ******************************************************************************/

static void Soc_Bs_Rt_Loop(WORD8 rcfdir, WORD8 frame)  
{
                                      /* Show selected modes to user.         */
   V24INT_PRINT(("\nSet Socrates mode: bitserial, RT loop timed, "));
   if (!rcfdir)
   {
      V24INT_PRINT(("RCFDIR=0 (Input), "));
   }
   else
   {
      V24INT_PRINT(("RCFDIR=1 (Output), "));
   }
   switch(frame){
   case 0:
        V24INT_PRINT(("SDSL framed, "));
        break;
   case 1:
        V24INT_PRINT(("SDSL plesiochronous framed, "));
        break;
   case 2:
        V24INT_PRINT(("MDSL framed, "));
        break;
   case 3:
        V24INT_PRINT(("transparent, "));
        break;
   default:
        V24INT_PRINT(("\n ERROR: Framing mode not available, "));
        return;
   }

  if (frame == 1)
  {                                  /* Set to bitserial, PCM slave*/
   	BFLD (SOCRATES_CIF_CON_1,  0xE0, 0x60);
  }
  else
  {                                  /* Set to bitserial.                    */
     BFLD ( SOCRATES_CIF_CON_1,  0xE0, 0xE0);
  }
 
                                      /* Set rcfdir bit.                      */
   BFLD ( SOCRATES_CIF_CON_2,  0x80, (rcfdir<<7));
 
                                      /* Set RT, loop timing.                 */
   BFLD ( SOCRATES_TRAN_CON_1, 0xC7, (frame<<6) | 0x00 ); 
                                       /* Ref must be 8k */   
                                       /* DS 5 */
   BFLD ( SOCRATES_TRAN_CON_4, 0xC0, 0x00 );   
                                       /* old DS 
   BFLD ( SOCRATES_TRAN_CON_1, 0x08, 0x08);      */

}

/*******************************************************************************
Description: 
   Set Socrates to mode: PCM2048, COT external timed.
Arguments:
   frame - according TRAN_CON_1 FRMD1..0
   pcm4   - 0 means PCM 2,048 MHz
            1 means PCM 4,096 MHz
Return:
   NONE.
Remarks:
   NONE.
 ******************************************************************************/

static void Soc_Pcm_Cot_Ext (WORD8 frame, WORD8 pcm4)   
{
                                      /* Show selected modes to user.         */
   V24INT_PRINT(("\nSet Socrates mode: COT external timed, "));
   if (!pcm4)
   {
      V24INT_PRINT(("PCM 2MHz, "));
   }
   else
   {
      V24INT_PRINT(("PCM 4MHz, "));
   }
   switch(frame){
   case 0:
        V24INT_PRINT(("SDSL framed, "));
        break;
   case 1:
        V24INT_PRINT(("SDSL plesiochronous framed, "));
        break;
   case 2:
        V24INT_PRINT(("MDSL framed, "));
        break;
   default:
        V24INT_PRINT(("\n ERROR: Framing mode not available, "));
        return;
   }
   
   if (G_Eeprom[CONFIG_INTF] == INTF_T1)
                                      /* Set to T1 mode, PCM slave, DISLP 
                                         sampling on rising edge              */
        BFLD ( SOCRATES_CIF_CON_1,  0xE2, 0x42);
   
   else
   {
                                      /* Set to PCM mode, PCM slave, DISLP 
                                         sampling on rising edge              */
        BFLD ( SOCRATES_CIF_CON_1,  0xE2, 0x02);
        
        /* in external PCM mode Socrates needs to know the number of bytes per
         TDM frame: 32 in 2MHz and 64 in 4MHz mode*/
        switch (pcm4)
        {
         case P_CLK_2MHZ:
           Out (SOCRATES_TBYTE_BCNT, 0x20);
           break;
        case P_CLK_4MHZ: 
           Out (SOCRATES_TBYTE_BCNT, 0x40);
           break;
        default:
           printf("\nP_CLK mode error");
        }
   }
   
   if (G_Eeprom[CONFIG_INTF] == INTF_T1)
                                      /* Set direction of RCLK and RFSC pins
                                         to Input                             */
        BFLD ( SOCRATES_CIF_CON_2,  0x80, 0x00 );   
   else
                                      /* Set direction of RCLK and RFSC pins
                                         to Output                            */
        BFLD ( SOCRATES_CIF_CON_2,  0x80, 0x80 );   

                                      /* Set COT, ext timing, framing mode.   */
   BFLD ( SOCRATES_TRAN_CON_1, 0xC7, 0x05 | (frame<<6) ); 
}

/*******************************************************************************
Description: 
   Set Socrates to mode: PCM2048, COT internal timed.
Arguments:
   frame - according TRAN_CON_1 FRMD1..0
   pcm4   - 0 means PCM 2,048 MHz
            1 means PCM 4,096 MHz
Return:
   NONE.
Remarks:
   NONE.
 ******************************************************************************/

static void Soc_Pcm_Cot_Int(WORD8 frame, WORD8 pcm4)
{
                                      /* Show selected modes to user.         */
   V24INT_PRINT(("\nSet Socrates mode: COT internal timed "));
   if (!pcm4)
   {
      V24INT_PRINT(("PCM 2MHz, "));
   }
   else
   {
      V24INT_PRINT(("PCM 4MHz, "));
   }
   switch(frame){
   case 0:
        V24INT_PRINT(("SDSL framed, "));
        break;
   case 1:
        V24INT_PRINT(("SDSL plesiochronous framed, "));
        break;
   case 2:
        V24INT_PRINT(("MDSL framed, "));
        break;
   default:
        V24INT_PRINT(("\n ERROR: Framing mode not available, "));
        return;
   }

   switch (G_Eeprom[CONFIG_INTF])
   {
    case INTF_T1:
                                      /* Set to T1 mode, PCM master, IFMD = 2,
                                         DISLP sampling on rising edge        */
        BFLD ( SOCRATES_CIF_CON_1,  0xE2, 0xC2 );
        break;

    case INTF_T1_PCM_PLE:
                                      /* Set to T1 mode, PCM slave, IFMD = 2,
                                         DISLP sampling on rising edge        */
        BFLD ( SOCRATES_CIF_CON_1,  0xE3, 0x43 );
        break;

    case INTF_E1_PCM_PLE:
                                       /* Set to PCM mode, PCM slave, IFMD = 0,
                                         DISLP sampling on rising edge        */
        BFLD ( SOCRATES_CIF_CON_1,  0xE3, 0x03 | (pcm4<<5) );
        break;

    default:
                                      /* Set to PCM mode, PCM master, IFMD = 0,
                                         DISLP sampling on rising edge        */
        BFLD ( SOCRATES_CIF_CON_1,  0xE2, 0x82 | (pcm4<<5) );
        break;
   }

   
   if (G_Eeprom[CONFIG_INTF] == INTF_T1)
                                      /* Set direction of RCLK and RFSC pins
                                         to Input                             */
        BFLD ( SOCRATES_CIF_CON_2,  0x80, 0x00 );   
   else
                                      /* Set direction of RCLK and RFSC pins
                                         to Output                            */
        BFLD ( SOCRATES_CIF_CON_2,  0x80, 0x80 );
 
                                      /* Set COT, int timing, framing mode.   */
   BFLD ( SOCRATES_TRAN_CON_1, 0xC7, 0x03 | (frame<<6) ); 
}

/*******************************************************************************
Description: 
   Set Socrates to mode: PCM2048, RT loop timed.
Arguments:
   frame - according TRAN_CON_1 FRMD1..0
   pcm4   - 0 means PCM 2,048 MHz
            1 means PCM 4,096 MHz
Return:
   NONE.
Remarks:
   NONE.
 ******************************************************************************/

static void Soc_Pcm_Rt_Loop(WORD8 frame, WORD8 pcm4)
{
                                      /* Show selected modes to user.         */
   V24INT_PRINT(("\nSet Socrates mode: RT loop timed "));
   if (!pcm4)
   {
      V24INT_PRINT(("PCM 2MHz, "));
   }
   else
   {
      V24INT_PRINT(("PCM 4MHz, "));
   }
   switch(frame){
   case 0:
        V24INT_PRINT(("SDSL framed, "));
        break;
   case 1:
        V24INT_PRINT(("SDSL plesiochronous framed, "));
        break;
   case 2:
        V24INT_PRINT(("MDSL framed, "));
        break;
   default:
        V24INT_PRINT(("\n ERROR: Framing mode not available, "));
        return;
   }

   switch (G_Eeprom[CONFIG_INTF])
   {
    case INTF_T1:
                                      /* Set to T1 mode, PCM master, IFMD = 2,
                                         DISLP sampling on rising edge        */
        BFLD ( SOCRATES_CIF_CON_1,  0xE2, 0xC2 );
        break;

    case INTF_T1_PCM_PLE:
                                      /* Set to T1 mode, PCM slave, IFMD = 2,
                                         DISLP sampling on rising edge        */
        BFLD ( SOCRATES_CIF_CON_1,  0xE3, 0x43 );
        break;

    case INTF_E1_PCM_PLE:
    case INTF_E1_PCM_PLE_TEST:
                                       /* Set to PCM mode, PCM slave, IFMD = 0,
                                         DISLP sampling on rising edge        */
        BFLD ( SOCRATES_CIF_CON_1,  0xE3, 0x03 | (pcm4<<5) );
        break;

    default:
                                      /* Set to PCM mode, PCM master, IFMD = 0,
                                         DISLP sampling on rising edge        */
        BFLD ( SOCRATES_CIF_CON_1,  0xE2, 0x82 | (pcm4<<5) );
        break;
   }
   
   if (G_Eeprom[CONFIG_INTF] == INTF_T1)
                                      /* Set direction of RCLK and RFSC pins
                                         to Input                             */
        BFLD ( SOCRATES_CIF_CON_2,  0x80, 0x00 );   
   else
                                      /* Set direction of RCLK and RFSC pins
                                         to Output                            */
        BFLD ( SOCRATES_CIF_CON_2,  0x80, 0x80 );
   
                                      /* Set RT, loop timing, framing mode.   */
   BFLD ( SOCRATES_TRAN_CON_1, 0xC7, (frame<<6) ); 
 }

/*******************************************************************************
Description: 
   Set Socrates to mode: PCM2048, RT external PLL.
Arguments:
   frame - according TRAN_CON_1 FRMD1..0
   pcm4   - 0 means PCM 2,048 MHz
            1 means PCM 4,096 MHz
Return:
   NONE.
Remarks:
   NONE.
 ******************************************************************************/

static void Soc_Pcm_Rt_Extpll(WORD8 frame, WORD8 pcm4)
{
                                      /* Show selected modes to user.         */
   V24INT_PRINT(("\nSet Socrates mode: RT external PLL"));
   if (!pcm4)
   {
      V24INT_PRINT(("PCM 2MHz, "));
   }
   else
   {
      V24INT_PRINT(("PCM 4MHz, "));
   }
   switch(frame){
   case 0:
        V24INT_PRINT(("SDSL framed, "));
        break;
   case 1:
        V24INT_PRINT(("SDSL plesiochronous framed, "));
        break;
   case 2:
        V24INT_PRINT(("MDSL framed, "));
        break;
   default:
        V24INT_PRINT(("\n ERROR: Framing mode not available, "));
        return;
   }

                                      /* Set to PCM mode.                     */
   BFLD ( SOCRATES_CIF_CON_1,  0x60, (pcm4<<5));

   /* in external PCM mode Socrates needs to know the number of bytes per
   TDM frame: 32 in 2MHz and 64 in 4MHz mode*/
   switch (pcm4)
   {
   case P_CLK_2MHZ:
      Out (SOCRATES_TBYTE_BCNT, 0x20);
      break;
   case P_CLK_4MHZ: 
      Out (SOCRATES_TBYTE_BCNT, 0x40);
      break;
   default:
      printf("\nP_CLK mode error");
   }
   
 
                                      /* Set RT, external PLL, framing mode.  */
   BFLD ( SOCRATES_TRAN_CON_1, 0xC7, 0x06 | (frame<<6) ); 
}


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