soc_ini.c

Infineon公司有一款实现SHDSL协议（ADSL协议的变种）的芯片

/*******************************************************************************
       Copyright (c) 2000, Infineon Technologies.  All rights reserved.
  
                               No Warranty                                                 
   Because the program is licensed free of charge, there is no warranty for 
   the program, to the extent permitted by applicable law.  Except when     
   otherwise stated in writing the copyright holders and/or other parties   
   provide the program "as is" without warranty of any kind, either         
   expressed or implied, including, but not limited to, the implied         
   warranties of merchantability and fitness for a particular purpose. The  
   entire risk as to the quality and performance of the program is with     
   you.  should the program prove defective, you assume the cost of all     
   necessary servicing, repair or correction.                               
                                                                            
   In no event unless required by applicable law or agreed to in writing    
   will any copyright holder, or any other party who may modify and/or      
   redistribute the program as permitted above, be liable to you for        
   damages, including any general, special, incidental or consequential     
   damages arising out of the use or inability to use the program           
   (including but not limited to loss of data or data being rendered        
   inaccurate or losses sustained by you or third parties or a failure of   
   the program to operate with any other programs), even if such holder or  
   other party has been advised of the possibility of such damages. 
 *******************************************************************************       
   
   Module:        SOC_INI
   Product ID:    22622.1.0.1
   Description:   Contains initialization proceedings of SOCRATES.
                                                      
 ******************************************************************************/

//  Group= SOC_INI 

/* ============================= */
/* Includes                      */
/* ============================= */

#include <stdio.h>
#include <absacc.h>
#include <intrins.h>

#include "sysdef.h"            
#include "dds.h"          
#include "sysvar.h"
#include "sysfunc.h"

#include "modid.h"
#include "reg165.h"

/* ============================= */
/* Local Macros & Definitions    */
/* ============================= */

                                         /* This macro realizes the standard
                                            bitfield command (_bfld_()) for
                                            general device addresses. Following
                                            parameters are needed:
                                            x = address of device register to be
                                                modified. Like In() and Out() no
                                                AOM base addr must be specified.
                                            y = AND bitmask: only bits which are
                                                set to 1 are modified.
                                            z = OR bitmask: defines new 
                                                bit values.                   */

/* ============================= */
/* Global variable definition    */
/* ============================= */
WORD8   G_Emulation_Mode;
/* ============================= */
/* Local function declaration    */
/* ============================= */

static void Soc_Bs_Cot_Int (WORD8 rcfdir, WORD8 frame); 
static void Soc_Bs_Cot_Ext (WORD8 rcfdir, WORD8 frame); 
static void Soc_Bs_Rt_Loop (WORD8 rcfdir, WORD8 frame); 
static void Soc_Pcm_Cot_Ext (WORD8 frame, WORD8 pcm4);  
static void Soc_Pcm_Cot_Int (WORD8 frame, WORD8 pcm4);
static void Soc_Pcm_Rt_Loop (WORD8 frame, WORD8 pcm4);
static void Soc_Pcm_Rt_Extpll (WORD8 frame, WORD8 pcm4);

/* ============================= */
/* Global function definition    */
/* ============================= */

/*******************************************************************************
Description: 
   Inititialization function of SOCRATES.
Arguments:
   NONE.
Return:
   NONE.
Remarks:
   This function calls all other SOCRATES initialization function for
   initialization of API (Soc_Init_Api), Mode (Soc_Set_Mode),
   HDLC part (Soc_Hdlc_Init).
 ******************************************************************************/
void Soc_Init (void)
{
   BIN_INFO bin_file;

   if (G_Emulation_Mode != EMUL_MODE)
   {
                                             /* Download has to be done first 
                                                because in this routine a HW reset
                                                included                          */
       if (DdsGetBinInfo (&bin_file) != FALSE)
       {
          Soc_Load (0x8000, bin_file.pBinStart, bin_file.binLength);
       }
       else
       {
          printf("\nNo bin file on SMART2000");
       }
   }
    else
   {
       Disable_Interrupt (INT_SOCRATES);       
    
    
        /* Wait until registers are accessible */
    
        while ( In(SOCRATES_DSEL) != 0x07 )    Out (SOCRATES_DSEL, 0x07);
        Out (SOCRATES_DSEL, 0x00);

        
       Out (SOCRATES_CONF, 0x24);                        /*EMUL, WDOG disabled */


       WHILE_NOT_ABORT ((In(SOCRATES_STAT_E) != 0x00));   /* check if HDLC is not busy */
       if (G_Abort == TRUE)
       {
          printf("\nFIFO still active");
          Enable_Interrupt (INT_SOCRATES);       
       }
       
       Out (SOCRATES_CMD_E, 0x03);                         /* reset FIFO */
       Out (SOCRATES_CMD_E, 0x00);

        Enable_Interrupt (INT_SOCRATES);       
        
   }
                                         /* Initialize all API registers  
                                            to default values.                */
   Soc_Init_Api ();
                                         /* Set API register to values of
                                            operation mode                    */
   Soc_Set_Mode ();

                                         /* No more further initialization,
                                            customer has to start with 
                                            Reg. 0x6E = 0x01                  */
}


/*******************************************************************************
Description: 
   Set API default values.
Arguments:
   NONE.
Return:
   NONE.
Remarks:
   NONE.
 ******************************************************************************/
void Soc_Init_Api (void)
{
                                       /* PCM slave 2.048MHz,DOUT=PushPull.   */
   Out ( SOCRATES_CIF_CON_1,  0x10 ); 
                                       /* enable customer interface */
   Out ( SOCRATES_CIF_CON_3,  0x02 ); 
                                       
                                       /* Data rate 256kbit/s, no Z bits.     */
   Out ( SOCRATES_RATE_CON_1, 0x04 ); 
   Out ( SOCRATES_RATE_CON_2, 0x00 );
 
                                       /* No TDM offset.                      */
   Out ( SOCRATES_TDM_OFF,    0x00 );
   Out ( SOCRATES_BYTE_BOFF,  0x00 );   /* has always to be the same as TDM_OFF */
 
                                       /* 3 bps, loop timed                   */
   Out ( SOCRATES_TRAN_CON_1, 0x20 );
                                       /* Seek sync word, CLKOUT=20.48.       */
   Out ( SOCRATES_TRAN_CON_2, 0x0B );

                                       /* Output Power 14.5 dB            */
   Out ( SOCRATES_POW_BOFF,   0x00 ); 

                                        /* enable Transceiver and EOC, not HDLC interrupt */
    Out (SOCRATES_MASK,    0x01);
                                        /* enable transceiver-status-changed 
                                         interrupt mask, TST2C, OVHC, OHTand OHR interrupt */
    Out (SOCRATES_MASKTR,  0x64);

#ifdef INTEROP
                                        /* enable only GHDBR interrupt */
    Out (SOCRATES_MASK_E,  0xDF);
#else
                                        /* enable all HDLC EOC interrupts */
    Out (SOCRATES_MASK_E,  0xC0);
                                        /* set transparent EOC mode */
    Out (SOCRATES_MODE_E,  0x0F);
#endif    

}

/*******************************************************************************
Description: 
   Set SOCRATES's operation mode according to the 
   chosen configuration settings.
Arguments:
   NONE.
Return:
   NONE.
Remarks:
   NONE.
 ******************************************************************************/
void Soc_Set_Mode (void)
{
   WORD8 rcfdir = 0;

   if (G_Eeprom [CONFIG_INTF] == INTF_BIT_SERIAL_1)
      rcfdir = 1;

   switch (G_Eeprom [CONFIG_INTF])
   {
                                      /* Set bitserial modes.                 */
   case INTF_BIT_SERIAL_0:
   case INTF_BIT_SERIAL_1:
      switch (G_Eeprom [CONFIG_MODE])
      {
      case MODE_COT_EXT:
         COT_LED_ON;
         Soc_Bs_Cot_Ext (rcfdir, G_Eeprom[CONFIG_FRAME]);
         break;

      case MODE_COT_INT:
         COT_LED_ON;
         Soc_Bs_Cot_Int (rcfdir, G_Eeprom[CONFIG_FRAME]);
         break;

      case MODE_RT_LOOP:
         COT_LED_OFF;
         Soc_Bs_Rt_Loop (rcfdir, G_Eeprom[CONFIG_FRAME]);
         break;
      }
      break;

                                      /* Set PCM modes.                       */
   case INTF_E1_PCM_SYN:
   case INTF_E1_PCM_PLE:
   case INTF_T1_PCM_SYN:
   case INTF_T1_PCM_PLE:
   case INTF_T1:
   case INTF_E1_PCM_PLE_TEST:
      
      switch (G_Eeprom [CONFIG_MODE])
      {
      case MODE_COT_EXT:
         COT_LED_ON;
         Soc_Pcm_Cot_Ext (G_Eeprom[CONFIG_FRAME], G_Eeprom[CONFIG_P_CLK]);
         break;

      case MODE_COT_INT:
         COT_LED_ON;
         Soc_Pcm_Cot_Int (G_Eeprom[CONFIG_FRAME], G_Eeprom[CONFIG_P_CLK]);
         break;

      case MODE_RT_LOOP:
         COT_LED_OFF;
         Soc_Pcm_Rt_Loop (G_Eeprom[CONFIG_FRAME], G_Eeprom[CONFIG_P_CLK]);
         break;

      case MODE_RT_FALC:
      case MODE_EXT_PLL:
         COT_LED_OFF;
         Soc_Pcm_Rt_Extpll (G_Eeprom[CONFIG_FRAME], G_Eeprom[CONFIG_P_CLK]);
         break;
      }
      break;
   }
                                      /* Set SDSL params taken if no handshake
                                       took place */
    Out (SOCRATES_TX_SYNCW_1, G_Eeprom [CONFIG_SYNC1]);
    Out (SOCRATES_TX_SYNCW_2, G_Eeprom [CONFIG_SYNC2]);

                                      /* Set Socrates Ref Clock     */
   switch (G_Eeprom [CONFIG_REF_CLK])
   {
      case REF_CLK_8KHZ:
         /*    new datasheet 5 */
         BFLD ( SOCRATES_TRAN_CON_4, 0xc0, 0x00);
         break;
      case REF_CLK_2MHZ_1MHZEXT:
         BFLD ( SOCRATES_TRAN_CON_4, 0xc0, 0x40);
         break;
      case REF_CLK_4MHZ_2MHZEXT:
         BFLD ( SOCRATES_TRAN_CON_4, 0xc0, 0x80);
         break;
      case REF_CLK_CIF_4MHZEXT:
         BFLD ( SOCRATES_TRAN_CON_4, 0xc0, 0xc0);
         break;    
         /* old sheet 
         BFLD ( SOCRATES_TRAN_CON_1, 0x08, 0x08);
         break;
      default:
         BFLD ( SOCRATES_TRAN_CON_1, 0x08, 0x00);
         break;   */
   }
}



/* ============================= */
/* Local function definition     */
/* ============================= */

/*******************************************************************************
Description: 
   Set Socrates to mode: bitserial, COT internal timed.
Arguments:
   rcfdir - wished value for RCFDIR bit of register CIF_CON_2.
   frame - according TRAN_CON_1 FRMD1..0
Return:
   NONE.
Remarks:
   NONE.
 ******************************************************************************/

static void Soc_Bs_Cot_Int (WORD8 rcfdir, WORD8 frame)  
{
                                      /* Show selected modes to user.         */
   V24INT_PRINT(("\nSet Socrates mode: bitserial, COT internal timed, "));
   if (!rcfdir)
   {
      V24INT_PRINT(("RCFDIR=0 (Input), "));
   }
   else
   {
      V24INT_PRINT(("RCFDIR=1 (Output), "));
   }
   switch(frame){
   case 0:
        V24INT_PRINT(("SDSL framed, "));
        break;
   case 1:
        V24INT_PRINT(("SDSL plesiochronous framed, "));
        break;
   case 2:
        V24INT_PRINT(("MDSL framed, "));
        break;
   case 3:
        V24INT_PRINT(("transparent, "));
        break;
   default:
        V24INT_PRINT(("\n ERROR: Framing mode not available, "));
        return;
   }

   if (frame == 1)
   {
                                  /* Set to bitserial.                
      										PCM slave*/
   	BFLD (SOCRATES_CIF_CON_1,  0xE0, 0x60);
   }
   else
   {
                                    /* Set to bitserial, PCM master           */
      BFLD (SOCRATES_CIF_CON_1,  0xE0, 0xE0);
   }
 
                                      /* Set rcfdir bit.                      */
   BFLD ( SOCRATES_CIF_CON_2,  0x80, (rcfdir<<7));
 
                                      /* Set COT, int. timing.                */
   BFLD ( SOCRATES_TRAN_CON_1, 0xC7, (frame<<6) | 0x03 ); 
                                       /* Ref must be 8k */
                                       /* DS 5 */
   BFLD ( SOCRATES_TRAN_CON_4, 0xC0, 0x00 );   
                                       /* old DS 
   BFLD ( SOCRATES_TRAN_CON_1, 0x08, 0x08);      */
 
   /*SOCRATES_TRAN_CON_2 settings already done in API initialization */
}

/*******************************************************************************
Description: 
   Set Socrates to mode: bitserial, COT external timed.
Arguments:
   rcfdir - wished value for RCFDIR bit of register CIF_CON_2.
   frame - according TRAN_CON_1 FRMD1..0
Return:
   NONE.
Remarks:
   NONE.
 ******************************************************************************/

static void Soc_Bs_Cot_Ext(WORD8 rcfdir, WORD8 frame)  
{
                                      /* Show selected modes to user.         */
   V24INT_PRINT(("\nSet Socrates mode: bitserial, COT external timed, "));
   if (!rcfdir)
   {
      V24INT_PRINT(("RCFDIR=0 (Input), "));
   }
   else