soc_int.c

Infineon公司有一款实现SHDSL协议（ADSL协议的变种）的芯片

/*******************************************************************************
       Copyright (c) 2000, Infineon Technologies.  All rights reserved.
  
                               No Warranty                                                 
   Because the program is licensed free of charge, there is no warranty for 
   the program, to the extent permitted by applicable law.  Except when     
   otherwise stated in writing the copyright holders and/or other parties   
   provide the program "as is" without warranty of any kind, either         
   expressed or implied, including, but not limited to, the implied         
   warranties of merchantability and fitness for a particular purpose. The  
   entire risk as to the quality and performance of the program is with     
   you.  should the program prove defective, you assume the cost of all     
   necessary servicing, repair or correction.                               
                                                                            
   In no event unless required by applicable law or agreed to in writing    
   will any copyright holder, or any other party who may modify and/or      
   redistribute the program as permitted above, be liable to you for        
   damages, including any general, special, incidental or consequential     
   damages arising out of the use or inability to use the program           
   (including but not limited to loss of data or data being rendered        
   inaccurate or losses sustained by you or third parties or a failure of   
   the program to operate with any other programs), even if such holder or  
   other party has been advised of the possibility of such damages. 
 *******************************************************************************       
   
   Module:        SOC_INT
   Product ID:    22622.1.0.1
   Description:   Contains interrupt handling of SOCRATES.
                                                      
 ******************************************************************************/

//  Group= SOC_INT 

/* ============================= */
/* Includes                      */
/* ============================= */

#include <stdio.h>
#include <absacc.h>
#include <intrins.h>
#include "reg165.h"            

#include "sysdef.h"            
#include "dds.h"          
#include "sysvar.h"
#include "sysfunc.h"

#include "modid.h"


/* ============================= */
/* Global variable definition   */
/* ============================= */


/* ============================= */
/* Local function declaration    */
/* ============================= */

static void Soc_Interrupt_Routine (void);


/* ============================= */
/* Global function definition    */
/* ============================= */

/*******************************************************************************
Description:
   Initialization of SOCRATES interrupts.
Arguments:
   none
Return Value:
   none
*******************************************************************************/
void Soc_Interrupt_Init (void)
{
                                       /* Establishment of SOCRATES int.      */
   if (!IrqEstablish (G_Int_Vector[INT_SOCRATES]))     
   {
      printf ("\nSOCRATES: IrqEstablish failed");
      return;
   }
                                       /* Set SOCRATES interrupt routine.     */
   IrqSetEntry (G_Int_Vector[INT_SOCRATES], Soc_Interrupt_Routine);

                                       /* Set SOCRATES interrupt level.       */
   SET_INT0_LEVEL;
    
                                       /* Enable SOCRATES interrupts.         */
   Enable_Interrupt (INT_SOCRATES);

                                       /* Clear pending interrupts.           */
   Soc_Interrupt_Routine();
}

/*******************************************************************************
Description:
   Add an Interrupt event to Fifo.
Arguments:
   type  -  Type of event from T_INT_TYPE
   value -  one byte concerning to this event
Return Value:
   none
Remarks:
   none
*******************************************************************************/
void Soc_Int_Fifo_Put (T_INT_TYPE type, WORD32 value)
{
   G_Int_Fifo.Data[G_Int_Fifo.Head].Int_Type = type;
   G_Int_Fifo.Data[G_Int_Fifo.Head].Value = value;
   G_Int_Fifo.Head++;
}

/*******************************************************************************
Description:
   Get an Interrupt event from Fifo.
Arguments:
   value -  pointer for one value byte concerning to this event
Return Value:
   Type of event from T_INT_TYPE
Remarks:
   none
*******************************************************************************/
T_INT_TYPE Soc_Int_Fifo_Get (WORD32 *value)
{
   T_INT_TYPE  type;
   
   Disable_Interrupt (INT_SOCRATES);
   
   if (G_Int_Fifo.Tail == G_Int_Fifo.Head)
   {
      Enable_Interrupt (INT_SOCRATES);
      return NO_INT;
   }
   else
   {   
      *value   = G_Int_Fifo.Data[G_Int_Fifo.Tail].Value;
      type     = G_Int_Fifo.Data[G_Int_Fifo.Tail].Int_Type;
      //G_Int_Fifo.Data[G_Int_Fifo.Tail].Int_Type = NO_INT;
      G_Int_Fifo.Tail++;
      Enable_Interrupt (INT_SOCRATES);
      return type;
   }

}
   
/* ============================= */
/* Local function definition     */
/* ============================= */

/*******************************************************************************
Description:
   Handling of SOCRATES HDLC, HDLC-EOC and Transceiver interrupts.
Arguments:
   none
Return Value:
   none
Remarks:
   Handles all HDLC and HDLC-EOC interrupts by calling 
   Soc_Hdlc_XXX_Interrupt and Soc_Eoc_XXX_Interrupt.
   Also Transceiver interrupts are handled for controlling the g.hs state
   machine and making entries for time measurement.
*******************************************************************************/
static void Soc_Interrupt_Routine (void)
{
   WORD8 ista, sub, 
         ghs_state, rev_nr, 
         i;

   /* Start endless loop.                 */
   while (TRUE)
   {
      /* Read interrupt status register.     */
      ista = In(SOCRATES_ISTA);

      /* Break from loop if no         
      interrupt is indicated.             */
      if (!ista)                         
         break;

#ifndef INTEROP
      /* An HDLC_BZ interrupt has happened.  */
      if (ista & SOCRATES_ISTA_HDLCBZ)
      {
         /* Read HDLC interrupt status reg.     */
         sub = In(SOCRATES_ISTA_BZ);
         //V24_PRINT (("ISTA_BZ: 0x%X", sub));

         /* An HDLC transmit interrupt           
         has happened.                       */
         if (sub & SOCRATES_ISTA_BZ_XPR)
         {
            Soc_Hdlc_Transmit_Interrupt();
         }

         /* An HDLC receive interrupt           
         has happened.                       */
         if (sub & (SOCRATES_ISTA_BZ_RPF | SOCRATES_ISTA_BZ_RME))
         {
            Soc_Hdlc_Receive_Interrupt (sub & SOCRATES_ISTA_BZ_RPF);
         }

         /* HDLC error interrupt.               
         has happened.                       */
         if (sub & (SOCRATES_ISTA_BZ_XDU | SOCRATES_ISTA_BZ_RFO))
         {
            Soc_Hdlc_Error_Interrupt (sub);
         }

         /* bits are selectively cleared in subroutines */
      }
#endif

      /* An HDLC_E interrupt has happened.     */
      if (ista & SOCRATES_ISTA_HDLCE)
      {
         /* Read HDLC_E interrupt status reg.     */
         sub = In(SOCRATES_ISTA_E);


#ifndef INTEROP
         /* An HDLC_E transmit interrupt           
         has happened, TransmitPool is ready   */
         if (sub & SOCRATES_ISTA_E_XPR_E)
         {
            Soc_Eoc_Transmit_Interrupt();
         }

         /* An HDLC_E receive interrupt           
         has happened.                       */
         if (sub & SOCRATES_ISTA_E_RPF_E)
         {
            Soc_Eoc_Receive_Interrupt ();
         }

         /* HDLC_E error interrupt.               
         has happened.                       */
         if (sub & (SOCRATES_ISTA_E_XDOV_E | SOCRATES_ISTA_E_XDU_E | SOCRATES_ISTA_E_RFO_E))
         {
            Soc_Eoc_Error_Interrupt (sub);
         }
#endif
         
         /* In HDLC_E FIFO is G.hs data available */
         if (sub & SOCRATES_ISTA_E_GHDBR)
         {
            /* read first byte from FIFO, this is the revision number */
            rev_nr = In (SOCRATES_RFIFO_E);  
            
            /* check if Capability List or SNR data is to read */
            switch (rev_nr)
            {
                           /* CL is to read */
            case 0x01:
               G_Ghs_Cl_Upload [CL_REVNR_CL] = rev_nr;  
               G_Ghs_Cl_Upload [CL_NUMOCT]   = In (SOCRATES_RFIFO_E); 
               
               /* read upload capability list */
               for (i=2; i< G_Ghs_Cl_Upload [CL_NUMOCT]; i++)
                  G_Ghs_Cl_Upload [i] = In (SOCRATES_RFIFO_E);  
               
               /* reset FIFO and answer acknowledge first from program level 
                  cause CL printout takes time */
               /* reset RFIFO_E for upcoming CL */
               Out (SOCRATES_CMD_E, SOCRATES_CMD_E_RRES_E);
               /* wait for acknowledge */
               WHILE_NOT_ABORT ((In (SOCRATES_STAT_E) & SOCRATES_STAT_E_RRESA_E) != SOCRATES_STAT_E_RRESA_E);
               Out (SOCRATES_CMD_E, 0x00);   
               /* Soc_Int_Fifo_Put (RESET_RFIFO_E, 0);  */
#ifndef INTEROP
               /* set Capability list uploadable flag */
               Soc_Int_Fifo_Put (CL_UP_INT, 0);  
#endif
               break;

                           /* SNR is to read */
            case 0x10:
               G_Snr [0]   = rev_nr;  
               G_Snr [1]   = In (SOCRATES_RFIFO_E); 
               
               /* upload SNR data */
               for (i=2; (i<G_Snr [1]) && (i<SNR_LENGTH); i++)
                  G_Snr [i] = In (SOCRATES_RFIFO_E);  

               /* reset FIFO and answer acknowledge first from program level 
                  cause SNR printout takes time */
               /* reset RFIFO_E for upcoming CL */
               Out (SOCRATES_CMD_E, SOCRATES_CMD_E_RRES_E);
               /* wait for acknowledge */
               WHILE_NOT_ABORT ((In (SOCRATES_STAT_E) & SOCRATES_STAT_E_RRESA_E) != SOCRATES_STAT_E_RRESA_E);
               Out (SOCRATES_CMD_E, 0x00);   
               /*Soc_Int_Fifo_Put (RESET_RFIFO_E, 0);  */
#ifndef INTEROP
               /* set Capability list uploadable flag */
               Soc_Int_Fifo_Put (SNR_INT, 0);  
#endif
               break;

            default:
               /* reset FIFO anyway */
               Soc_Int_Fifo_Put (RESET_RFIFO_E, 0);  
               V24_PRINT (("\n(SLOT %d) Error: Unknown CL Revision 0x%2X to upload", SLOT_NR, rev_nr));
               break;
            }          
         }
         
         /* delete all entries */
         Out (SOCRATES_ISTA_E, 0x00);
      }


      /* A transceiver interrupt has happened */
      if (ista & SOCRATES_ISTA_TRAN)
      {
         /* Read Transceiver interrupt status reg.      */
         sub = In(SOCRATES_ISTATR);

         /* A TRAN status change has happened.                       */
         if (sub & SOCRATES_ISTATR_ATSC)
         {
            /* read state   */
            ghs_state = In(SOCRATES_TSTAT);
            
            /* indicate new state for poll loop */
            Soc_Int_Fifo_Put (ATSC_INT, ghs_state);         

            if (ghs_state == PROCESSING_CL)
               G_Processing_Cl = TRUE;
            else if (ghs_state == GHS_STARTUP)
            {
               /* reset RFIFO_E for upcoming CL */
               Out (SOCRATES_CMD_E, SOCRATES_CMD_E_RRES_E);
               /* wait for acknowledge */
               WHILE_NOT_ABORT ((In (SOCRATES_STAT_E) & SOCRATES_STAT_E_RRESA_E) != SOCRATES_STAT_E_RRESA_E);
               Out (SOCRATES_CMD_E, 0x00);   
            }
               
            /* if timer is running make entries */
            if (G_Timer.Status == TIMER_STATUS_RUNNING)
            {
               if (G_Timer.Mode == TIMER_MODE_ALL_STATES)
               {
                  /* log state and time counter */
                  G_Timer.Entry[G_Timer.Index].State      = ghs_state;
                  Disable_Interrupt (INT_TIMER);       
                  G_Timer.Entry[G_Timer.Index].Time_High  = G_Timer.Time_Counter >> 8;
                  G_Timer.Entry[G_Timer.Index].Time_Low   = G_Timer.Time_Counter & 0x00FF;
                  Enable_Interrupt (INT_TIMER);       
                  G_Timer.Index++;

                  if (ghs_state == G_Timer.Stop_State)
                  {
                     Stop_Timer (TIMER_MEASURE);
                     G_Timer.Length = G_Timer.Index;
                     G_Timer.Status = TIMER_STATUS_FINISHED;
                  }
               }
               else if (ghs_state == G_Timer.Stop_State)
               {
                  Stop_Timer (TIMER_MEASURE);
                  /* log state and time counter */
                  G_Timer.Entry[G_Timer.Index].State      = ghs_state;
                  Disable_Interrupt (INT_TIMER);       
                  G_Timer.Entry[G_Timer.Index].Time_High  = G_Timer.Time_Counter >> 8;
                  G_Timer.Entry[G_Timer.Index].Time_Low   = G_Timer.Time_Counter & 0x00FF;
                  Enable_Interrupt (INT_TIMER);       
                  G_Timer.Index++;
                  G_Timer.Length = G_Timer.Index;
                  /* indicate that time measurement has finished and can be reported */
                  G_Timer.Status = TIMER_STATUS_FINISHED;
               }

            }
            /* if timer shall be started check state */
            if (G_Timer.Status == TIMER_STATUS_ACTIVE)
               if (ghs_state == G_Timer.Start_State)
               {
                  Start_Timer(TIMER_MEASURE);
                  G_Timer.Status = TIMER_STATUS_RUNNING;
               }
         }

#ifndef INTEROP
         /* Transceiver status 2 changed */
         if (sub & SOCRATES_ISTATR_TST2C)
         {
            /* indicate new value for poll loop */
            Soc_Int_Fifo_Put (TST2C_INT, In (SOCRATES_TRSTAT_2));         
         }
         
         /* received overhead bits changed */
         if (sub & SOCRATES_ISTATR_OVHC)
         {
            /* indicate new value for poll loop */
            Soc_Int_Fifo_Put (OVHC_INT, (In (SOCRATES_RX_OVERH_2)<<8)|In (SOCRATES_RX_OVERH_1));         
         }
#endif         
         /* delete all transceiver interrupt */
         Out (SOCRATES_ISTATR, 0x00);
      }
   }
}