📄 stm32f0xx_spi.c
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if (NewState != DISABLE)
{
/* Enable the selected SPI DMA requests */
SPIx->CR2 |= SPI_I2S_DMAReq;
}
else
{
/* Disable the selected SPI DMA requests */
SPIx->CR2 &= (uint16_t)~SPI_I2S_DMAReq;
}
}
/**
* @brief Configures the number of data to transfer type(Even/Odd) for the DMA
* last transfers and for the selected SPI.
* @note - This function have a meaning only if DMA mode is selected and if
* the packing mode is used (data length <= 8 and DMA transfer size halfword)
* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
* @param SPI_LastDMATransfer: specifies the SPI last DMA transfers state.
* This parameter can be one of the following values:
* @arg SPI_LastDMATransfer_TxEvenRxEven: Number of data for transmission Even
* and number of data for reception Even.
* @arg SPI_LastDMATransfer_TxOddRxEven: Number of data for transmission Odd
* and number of data for reception Even.
* @arg SPI_LastDMATransfer_TxEvenRxOdd: Number of data for transmission Even
* and number of data for reception Odd.
* @arg SPI_LastDMATransfer_TxOddRxOdd: Number of data for transmission Odd
* and number of data for reception Odd.
* @retval None
*/
void SPI_LastDMATransferCmd(SPI_TypeDef* SPIx, uint16_t SPI_LastDMATransfer)
{
/* Check the parameters */
assert_param(IS_SPI_ALL_PERIPH(SPIx));
assert_param(IS_SPI_LAST_DMA_TRANSFER(SPI_LastDMATransfer));
/* Clear LDMA_TX and LDMA_RX bits */
SPIx->CR2 &= CR2_LDMA_MASK;
/* Set new LDMA_TX and LDMA_RX bits value */
SPIx->CR2 |= SPI_LastDMATransfer;
}
/**
* @}
*/
/** @defgroup SPI_Group5 Interrupts and flags management functions
* @brief Interrupts and flags management functions
*
@verbatim
===============================================================================
##### Interrupts and flags management functions #####
===============================================================================
[..] This section provides a set of functions allowing to configure the SPI/I2S Interrupts
sources and check or clear the flags or pending bits status.
The user should identify which mode will be used in his application to manage
the communication: Polling mode, Interrupt mode or DMA mode.
*** Polling Mode ***
====================
[..] In Polling Mode, the SPI/I2S communication can be managed by 9 flags:
(#) SPI_I2S_FLAG_TXE : to indicate the status of the transmit buffer register
(#) SPI_I2S_FLAG_RXNE : to indicate the status of the receive buffer register
(#) SPI_I2S_FLAG_BSY : to indicate the state of the communication layer of the SPI.
(#) SPI_FLAG_CRCERR : to indicate if a CRC Calculation error occur
(#) SPI_FLAG_MODF : to indicate if a Mode Fault error occur
(#) SPI_I2S_FLAG_OVR : to indicate if an Overrun error occur
(#) SPI_I2S_FLAG_FRE: to indicate a Frame Format error occurs.
(#) I2S_FLAG_UDR: to indicate an Underrun error occurs.
(#) I2S_FLAG_CHSIDE: to indicate Channel Side.
[..]
(@)Do not use the BSY flag to handle each data transmission or reception. It is better
to use the TXE and RXNE flags instead.
[..] In this Mode it is advised to use the following functions:
(+) FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
(+) void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
*** Interrupt Mode ***
======================
[..] In Interrupt Mode, the SPI/I2S communication can be managed by 3 interrupt sources
and 5 pending bits:
[..] Pending Bits:
(#) SPI_I2S_IT_TXE : to indicate the status of the transmit buffer register
(#) SPI_I2S_IT_RXNE : to indicate the status of the receive buffer register
(#) SPI_I2S_IT_OVR : to indicate if an Overrun error occur
(#) I2S_IT_UDR : to indicate an Underrun Error occurs.
(#) SPI_I2S_FLAG_FRE : to indicate a Frame Format error occurs.
[..] Interrupt Source:
(#) SPI_I2S_IT_TXE: specifies the interrupt source for the Tx buffer empty
interrupt.
(#) SPI_I2S_IT_RXNE : specifies the interrupt source for the Rx buffer not
empty interrupt.
(#) SPI_I2S_IT_ERR : specifies the interrupt source for the errors interrupt.
[..] In this Mode it is advised to use the following functions:
(+) void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState);
(+) ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
*** FIFO Status ***
===================
[..] It is possible to monitor the FIFO status when a transfer is ongoing using the
following function:
(+) uint32_t SPI_GetFIFOStatus(uint8_t SPI_FIFO_Direction);
*** DMA Mode ***
================
[..] In DMA Mode, the SPI communication can be managed by 2 DMA Channel
requests:
(#) SPI_I2S_DMAReq_Tx: specifies the Tx buffer DMA transfer request.
(#) SPI_I2S_DMAReq_Rx: specifies the Rx buffer DMA transfer request.
[..] In this Mode it is advised to use the following function:
(+) void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState).
@endverbatim
* @{
*/
/**
* @brief Enables or disables the specified SPI/I2S interrupts.
* @param SPIx: where x can be 1 or 2 in SPI mode or 1 in I2S mode to select
* the SPI peripheral.
* @param SPI_I2S_IT: specifies the SPI interrupt source to be enabled or disabled.
* This parameter can be one of the following values:
* @arg SPI_I2S_IT_TXE: Tx buffer empty interrupt mask
* @arg SPI_I2S_IT_RXNE: Rx buffer not empty interrupt mask
* @arg SPI_I2S_IT_ERR: Error interrupt mask
* @param NewState: new state of the specified SPI interrupt.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState)
{
uint16_t itpos = 0, itmask = 0 ;
/* Check the parameters */
assert_param(IS_SPI_ALL_PERIPH(SPIx));
assert_param(IS_FUNCTIONAL_STATE(NewState));
assert_param(IS_SPI_I2S_CONFIG_IT(SPI_I2S_IT));
/* Get the SPI IT index */
itpos = SPI_I2S_IT >> 4;
/* Set the IT mask */
itmask = (uint16_t)1 << (uint16_t)itpos;
if (NewState != DISABLE)
{
/* Enable the selected SPI interrupt */
SPIx->CR2 |= itmask;
}
else
{
/* Disable the selected SPI interrupt */
SPIx->CR2 &= (uint16_t)~itmask;
}
}
/**
* @brief Returns the current SPIx Transmission FIFO filled level.
* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
* @retval The Transmission FIFO filling state.
* - SPI_TransmissionFIFOStatus_Empty: when FIFO is empty
* - SPI_TransmissionFIFOStatus_1QuarterFull: if more than 1 quarter-full.
* - SPI_TransmissionFIFOStatus_HalfFull: if more than 1 half-full.
* - SPI_TransmissionFIFOStatus_Full: when FIFO is full.
*/
uint16_t SPI_GetTransmissionFIFOStatus(SPI_TypeDef* SPIx)
{
/* Get the SPIx Transmission FIFO level bits */
return (uint16_t)((SPIx->SR & SPI_SR_FTLVL));
}
/**
* @brief Returns the current SPIx Reception FIFO filled level.
* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
* @retval The Reception FIFO filling state.
* - SPI_ReceptionFIFOStatus_Empty: when FIFO is empty
* - SPI_ReceptionFIFOStatus_1QuarterFull: if more than 1 quarter-full.
* - SPI_ReceptionFIFOStatus_HalfFull: if more than 1 half-full.
* - SPI_ReceptionFIFOStatus_Full: when FIFO is full.
*/
uint16_t SPI_GetReceptionFIFOStatus(SPI_TypeDef* SPIx)
{
/* Get the SPIx Reception FIFO level bits */
return (uint16_t)((SPIx->SR & SPI_SR_FRLVL));
}
/**
* @brief Checks whether the specified SPI flag is set or not.
* @param SPIx: where x can be 1 or 2 in SPI mode or 1 in I2S mode to select
* the SPI peripheral.
* @param SPI_I2S_FLAG: specifies the SPI flag to check.
* This parameter can be one of the following values:
* @arg SPI_I2S_FLAG_TXE: Transmit buffer empty flag.
* @arg SPI_I2S_FLAG_RXNE: Receive buffer not empty flag.
* @arg SPI_I2S_FLAG_BSY: Busy flag.
* @arg SPI_I2S_FLAG_OVR: Overrun flag.
* @arg SPI_I2S_FLAG_MODF: Mode Fault flag.
* @arg SPI_I2S_FLAG_CRCERR: CRC Error flag.
* @arg SPI_I2S_FLAG_FRE: TI frame format error flag.
* @arg I2S_FLAG_UDR: Underrun Error flag.
* @arg I2S_FLAG_CHSIDE: Channel Side flag.
* @retval The new state of SPI_I2S_FLAG (SET or RESET).
*/
FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG)
{
FlagStatus bitstatus = RESET;
/* Check the parameters */
assert_param(IS_SPI_ALL_PERIPH(SPIx));
assert_param(IS_SPI_I2S_GET_FLAG(SPI_I2S_FLAG));
/* Check the status of the specified SPI flag */
if ((SPIx->SR & SPI_I2S_FLAG) != (uint16_t)RESET)
{
/* SPI_I2S_FLAG is set */
bitstatus = SET;
}
else
{
/* SPI_I2S_FLAG is reset */
bitstatus = RESET;
}
/* Return the SPI_I2S_FLAG status */
return bitstatus;
}
/**
* @brief Clears the SPIx CRC Error (CRCERR) flag.
* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
* @param SPI_I2S_FLAG: specifies the SPI flag to clear.
* This function clears only CRCERR flag.
* @note OVR (OverRun error) flag is cleared by software sequence: a read
* operation to SPI_DR register (SPI_I2S_ReceiveData()) followed by
* a read operation to SPI_SR register (SPI_I2S_GetFlagStatus()).
* @note MODF (Mode Fault) flag is cleared by software sequence: a read/write
* operation to SPI_SR register (SPI_I2S_GetFlagStatus()) followed by
* a write operation to SPI_CR1 register (SPI_Cmd() to enable the SPI).
* @retval None
*/
void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG)
{
/* Check the parameters */
assert_param(IS_SPI_ALL_PERIPH(SPIx));
assert_param(IS_SPI_CLEAR_FLAG(SPI_I2S_FLAG));
/* Clear the selected SPI CRC Error (CRCERR) flag */
SPIx->SR = (uint16_t)~SPI_I2S_FLAG;
}
/**
* @brief Checks whether the specified SPI/I2S interrupt has occurred or not.
* @param SPIx: where x can be 1 or 2 in SPI mode or 1 in I2S mode to select
* the SPI peripheral.
* @param SPI_I2S_IT: specifies the SPI interrupt source to check.
* This parameter can be one of the following values:
* @arg SPI_I2S_IT_TXE: Transmit buffer empty interrupt.
* @arg SPI_I2S_IT_RXNE: Receive buffer not empty interrupt.
* @arg SPI_IT_MODF: Mode Fault interrupt.
* @arg SPI_I2S_IT_OVR: Overrun interrupt.
* @arg I2S_IT_UDR: Underrun interrupt.
* @arg SPI_I2S_IT_FRE: Format Error interrupt.
* @retval The new state of SPI_I2S_IT (SET or RESET).
*/
ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT)
{
ITStatus bitstatus = RESET;
uint16_t itpos = 0, itmask = 0, enablestatus = 0;
/* Check the parameters */
assert_param(IS_SPI_ALL_PERIPH(SPIx));
assert_param(IS_SPI_I2S_GET_IT(SPI_I2S_IT));
/* Get the SPI_I2S_IT index */
itpos = 0x01 << (SPI_I2S_IT & 0x0F);
/* Get the SPI_I2S_IT IT mask */
itmask = SPI_I2S_IT >> 4;
/* Set the IT mask */
itmask = 0x01 << itmask;
/* Get the SPI_I2S_IT enable bit status */
enablestatus = (SPIx->CR2 & itmask) ;
/* Check the status of the specified SPI interrupt */
if (((SPIx->SR & itpos) != (uint16_t)RESET) && enablestatus)
{
/* SPI_I2S_IT is set */
bitstatus = SET;
}
else
{
/* SPI_I2S_IT is reset */
bitstatus = RESET;
}
/* Return the SPI_I2S_IT status */
return bitstatus;
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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