stm8_tsl_rc_acquisition.c

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/**
  ******************************************************************************
  * @file    stm8_tsl_rc_acquisition.c
  * @author  MCD Application Team
  * @version V2.3.1
  * @date    14-February-2011
  * @brief   STM8 Touch Sensing Library - This file manages the RC acquisition
  *          for all STM8 devices.
  ******************************************************************************
  * @attention
  *
  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
  *
  * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
  */

/* ASM Inclusion Directive --------------------------------------------------*/

/*< For Raisonance, the SRC pragma must be the first command of the file.
    No header files can be included so _RAISONANCE_ compilation variable
  cannot be used */
#ifdef __RCSTM8__
#pragma SRC("stm8_tsl_rc_acquisition.asm")
#endif

/* Includes ------------------------------------------------------------------*/
#include "stm8_tsl_rc_acquisition.h"
#include "stm8_tsl_services.h"


/*#if defined(__RCSTM8__)
#pragma INITSTATICVAR
#endif*/

#if !defined(CHARGE_TRANSFER)

/* Memory section ------------------------------------------------------------*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/* Public functions ----------------------------------------------------------*/
#if defined(_COSMIC_) && defined(USE_PRAGMA_SECTION)
#pragma section [TSL_IO_RAM]
#pragma section @tiny [TSL_IO_RAM0]
#pragma section const {TSL_IO_CONST}
#pragma section (TSL_IO_CODE)
#endif


/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
u32 TINY FinalMeasurementValue;
TOUCH_PORT_Info_T TINY sTouchIO;
u16 TINY CounterStop;
u8 TINY SamplingShifter;
u8 TINY AcquisitionBitMask;
static u8 SpreadCounter;

/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/* Public functions ----------------------------------------------------------*/

/* This table is always defined */
__CONST u8 Table_SCKEY_BITS[
  SCKEY_P1_KEY_COUNT
#if NUMBER_OF_SINGLE_CHANNEL_PORTS > 1
  + SCKEY_P2_KEY_COUNT
#endif
#if NUMBER_OF_SINGLE_CHANNEL_PORTS > 2
  + SCKEY_P3_KEY_COUNT
#endif
] =
  {
    SCKEY_P1_A /* Always defined */
#if SCKEY_P1_KEY_COUNT > 1
    , SCKEY_P1_B
#endif
#if SCKEY_P1_KEY_COUNT > 2
    , SCKEY_P1_C
#endif
#if SCKEY_P1_KEY_COUNT > 3
    , SCKEY_P1_D
#endif
#if SCKEY_P1_KEY_COUNT > 4
    , SCKEY_P1_E
#endif
#if SCKEY_P1_KEY_COUNT > 5
    , SCKEY_P1_F
#endif
#if SCKEY_P1_KEY_COUNT > 6
    , SCKEY_P1_G
#endif
#if SCKEY_P1_KEY_COUNT > 7
    , SCKEY_P1_H
#endif

#if NUMBER_OF_SINGLE_CHANNEL_PORTS > 1
    , SCKEY_P2_A
#if SCKEY_P2_KEY_COUNT > 1
    , SCKEY_P2_B
#endif
#if SCKEY_P2_KEY_COUNT > 2
    , SCKEY_P2_C
#endif
#if SCKEY_P2_KEY_COUNT > 3
    , SCKEY_P2_D
#endif
#if SCKEY_P2_KEY_COUNT > 4
    , SCKEY_P2_E
#endif
#if SCKEY_P2_KEY_COUNT > 5
    , SCKEY_P2_F
#endif
#if SCKEY_P2_KEY_COUNT > 6
    , SCKEY_P2_G
#endif
#if SCKEY_P2_KEY_COUNT > 7
    , SCKEY_P2_H
#endif
#endif

#if NUMBER_OF_SINGLE_CHANNEL_PORTS > 2
    , SCKEY_P3_A
#if SCKEY_P3_KEY_COUNT > 1
    , SCKEY_P3_B
#endif
#if SCKEY_P3_KEY_COUNT > 2
    , SCKEY_P3_C
#endif
#if SCKEY_P3_KEY_COUNT > 3
    , SCKEY_P3_D
#endif
#if SCKEY_P3_KEY_COUNT > 4
    , SCKEY_P3_E
#endif
#if SCKEY_P3_KEY_COUNT > 5
    , SCKEY_P3_F
#endif
#if SCKEY_P3_KEY_COUNT > 6
    , SCKEY_P3_G
#endif
#if SCKEY_P3_KEY_COUNT > 7
    , SCKEY_P3_H
#endif
#endif
  };

#if NUMBER_OF_MULTI_CHANNEL_KEYS > 0
__CONST u16 Table_MCKEY_PORTS[
#if NUMBER_OF_MULTI_CHANNEL_KEYS == 1
  CHANNEL_PER_MCKEY
#endif
#if NUMBER_OF_MULTI_CHANNEL_KEYS == 2
  CHANNEL_PER_MCKEY + CHANNEL_PER_MCKEY
#endif
] =
  {
    MCKEY1_A_PORT_ADDR
    , MCKEY1_B_PORT_ADDR
    , MCKEY1_C_PORT_ADDR
    , MCKEY1_D_PORT_ADDR
    , MCKEY1_E_PORT_ADDR
#if CHANNEL_PER_MCKEY == 8
    , MCKEY1_F_PORT_ADDR
    , MCKEY1_G_PORT_ADDR
    , MCKEY1_H_PORT_ADDR
#endif
#if NUMBER_OF_MULTI_CHANNEL_KEYS > 1
    , MCKEY2_A_PORT_ADDR
    , MCKEY2_B_PORT_ADDR
    , MCKEY2_C_PORT_ADDR
    , MCKEY2_D_PORT_ADDR
    , MCKEY2_E_PORT_ADDR
#if CHANNEL_PER_MCKEY == 8
    , MCKEY2_F_PORT_ADDR
    , MCKEY2_G_PORT_ADDR
    , MCKEY2_H_PORT_ADDR
#endif
#endif
  };
#endif

#if NUMBER_OF_MULTI_CHANNEL_KEYS > 0
__CONST u8 Table_MCKEY_BITS[
#if NUMBER_OF_MULTI_CHANNEL_KEYS == 1
  CHANNEL_PER_MCKEY
#endif
#if NUMBER_OF_MULTI_CHANNEL_KEYS == 2
  CHANNEL_PER_MCKEY + CHANNEL_PER_MCKEY
#endif
] =
  {
    MCKEY1_A
    , MCKEY1_B
    , MCKEY1_C
    , MCKEY1_D
    , MCKEY1_E
#if CHANNEL_PER_MCKEY == 8
    , MCKEY1_F
    , MCKEY1_G
    , MCKEY1_H
#endif
#if NUMBER_OF_MULTI_CHANNEL_KEYS > 1
    , MCKEY2_A
    , MCKEY2_B
    , MCKEY2_C
    , MCKEY2_D
    , MCKEY2_E
#if CHANNEL_PER_MCKEY == 8
    , MCKEY2_F
    , MCKEY2_G
    , MCKEY2_H
#endif
#endif
  };
#endif




/**
  ******************************************************************************
  * @brief Execute a loop for calibrated number of cycles to allow over sampling
  * @par Parameters:
  * None
  * @retval void None
  * @par Required preconditions:
  * None
  ******************************************************************************/
void TSL_IO_SW_Burst_TestSyncShift(void)
{

#if defined(_COSMIC_)
#asm
  ld a, _SamplingShifter
  // 3 cycles loop if jump executed; 2 cycles loop if not.
ShiftLoopVih:
  dec a       // 1 cycle
  jrne ShiftLoopVih
#endasm
#elif defined(_IAR_)
  __asm("ld a, S:SamplingShifter"); //s: to use a zero page addressing mode
  // 3 cycles loop if jump executed; 2 cycles loop if not.
  __asm("ShiftLoopVih:");
  __asm("dec a");        // 1 cycle
  __asm("jrne ShiftLoopVih");
#else //_RAISONANCE_
#pragma ASM
  ld a, SamplingShifter;// 3 cycles loop if jump executed; 2 cycles loop if not.
ShiftLoopVih:
  dec a;// 1 cycle
  jrne ShiftLoopVih
#pragma ENDASM
#endif

}

/**
  ******************************************************************************
  * @brief Local sub function to wait for vil on RC structure.
  * @par Parameters:
  * None
  * @retval void None
  * @par Required preconditions:
  * None
  ******************************************************************************/
void TSL_IO_SW_Burst_Wait_Vil(void)
{

#if defined(_COSMIC_)
#asm
  ld a, _AcquisitionBitMask
  ldw x, _sTouchIO   // Input data register ...
  incw x
  // Loop = 1 + 1 + 2 + 2 + 2 cycles = 8 cycles
WaitForVil:
// To be sure that the loop last 8 cycles the first instruction must be a 1-byte instruction
// This is to be sure it is fully fetched in 1 cycle. The second instruction must be shorter than 4 bytes.
// If this not the case, the code must be aligned.
  bcp a, (x)  // 1 cycles
  jreq EndWaitForVil
  ldw y, _TIMACQ_CNTR // 2 cycles; hw counter also used for timeout ...
  cpw y, #0x0E00    // 2 cycles; Timeout compare
  jrult WaitForVil
EndWaitForVil:
#endasm
#elif defined(_IAR_)
  __asm("ld a, S:AcquisitionBitMask"); //s: to use a zero page addressing mode
  __asm("ldw x, S:sTouchIO");   // Input data register ...  //s: to use a zero page addressing mode
  __asm("incw x");
  // Loop = 1 + 1 + 2 + 2 + 2 cycles = 8 cycles
  __asm("WaitForVil:");
// To be sure that the loop last 8 cycles the first instruction must be a 1-byte instruction
// This is to be sure it is fully fetched in 1 cycle. The second instruction must be shorter than 4 bytes.
// If this not the case, the code must be aligned.	
  __asm("bcp a, (x)");  // 1 cycles
  __asm("jreq EndWaitForVil");
  __asm("ldw y, TIMACQ_CNTR"); // 2 cycles; hw counter also used for timeout ...
  __asm("cpw y, #0x0E00");    // 2 cycles; Timeout compare
  __asm("jrult WaitForVil");
  __asm("EndWaitForVil:");
#else //_RAISONANCE_
#pragma ASM
  ld a, AcquisitionBitMask
  ldw x, sTouchIO   ;// Input data register ...
  incw x
  ;// Loop = 1 + 1 + 2 + 2 + 2 cycles = 8 cycles
WaitForVil:
// To be sure that the loop last 8 cycles the first instruction must be a 1-byte instruction
// This is to be sure it is fully fetched in 1 cycle. The second instruction must be shorter than 4 bytes.
// If this not the case, the code must be aligned.
  bcp a, (x)  ;// 1 cycles
  jreq EndWaitForVil
  ldw y, TIMACQ_CNTR ;// 2 cycles; hw counter also used for timeout ...
  cpw y, #0E00h    ;// 2 cycles; Timeout compare
  jrult WaitForVil
EndWaitForVil:
#pragma ENDASM

#endif
}

/**
  ******************************************************************************
  * @brief Local sub function to wait for vih on RC structure.
  * @par Parameters:
  * None
  * @retval void None
  * @par Required preconditions:
  * None
  *******************************************************************************/
void TSL_IO_SW_Burst_Wait_Vih(void)
{
#if defined(_COSMIC_)
#asm
  ld a, _AcquisitionBitMask
  ldw x, _sTouchIO   // Input data register ...
  incw x
  // Loop = 1 + 1 + 2 + 2 + 2 cycles = 8 cycles
WaitForVih:
// To be sure that the loop last 8 cycles the first instruction must be a 1-byte instruction
// This is to be sure it is fully fetched in 1 cycle. The second instruction must be shorter than 4 bytes.
// If this not the case, the code must be aligned.
  bcp a, (x)  // 1 cycles
  jrne EndWaitForVih
  ldw y, _TIMACQ_CNTR // 2 cycles; hw counter also used for timeout ...
  cpw y, #0x0E00    // 2 cycles; Timeout compare
  jrult WaitForVih
EndWaitForVih:
#endasm
#elif defined(_IAR_)
  __asm("ld a, S:AcquisitionBitMask"); //s: to use a zero page addressing mode
  __asm("ldw x, S:sTouchIO");   // Input data register ...  //s: to use a zero page addressing mode
  __asm("incw x");
  // Loop = 1 + 1 + 2 + 2 + 2 cycles = 8 cycles
  __asm("WaitForVih:");
// To be sure that the loop last 8 cycles the first instruction must be a 1-byte instruction
// This is to be sure it is fully fetched in 1 cycle. The second instruction must be shorter than 4 bytes.
// If this not the case, the code must be aligned.	
  __asm("bcp a, (x)");  // 1 cycles
  __asm("jrne EndWaitForVih");
  __asm("ldw y, TIMACQ_CNTR"); // 2 cycles; hw counter also used for timeout ...
  __asm("cpw y, #0x0E00");    // 2 cycles; Timeout compare
  __asm("jrult WaitForVih");
  __asm("EndWaitForVih:");
#else  //_RAISONANCE_
#pragma ASM
  ld a, AcquisitionBitMask
  ldw x, sTouchIO   ;// Input data register ...
  incw x
  ;// Loop = 1 + 1 + 2 + 2 + 2 cycles = 8 cycles
WaitForVih:
// To be sure that the loop last 8 cycles the first instruction must be a 1-byte instruction
// This is to be sure it is fully fetched in 1 cycle. The second instruction must be shorter than 4 bytes.
// If this not the case, the code must be aligned.
  bcp a, (x)  ;// 1 cycles
  jrne EndWaitForVih
  ldw y, TIMACQ_CNTR ;// 2 cycles; hw counter also used for timeout ...
  cpw y, #0E00h    ;// 2 cycles; Timeout compare
  jrult WaitForVih
EndWaitForVih:

#pragma ENDASM

#endif
}