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📄 stm8s_tim2.ls

📁 STM8s
💻 LS
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   1                     ; C Compiler for STM8 (COSMIC Software)
   2                     ; Parser V4.9.2 - 29 Jun 2010
   3                     ; Generator V4.3.5 - 02 Jul 2010
  43                     ; 44 void TIM2_DeInit(void)
  43                     ; 45 {
  45                     	switch	.text
  46  0000               _TIM2_DeInit:
  50                     ; 47     TIM2->CR1 = (u8)TIM2_CR1_RESET_VALUE;
  52  0000 725f5300      	clr	21248
  53                     ; 48     TIM2->IER = (u8)TIM2_IER_RESET_VALUE;
  55  0004 725f5301      	clr	21249
  56                     ; 49     TIM2->SR2 = (u8)TIM2_SR2_RESET_VALUE;
  58  0008 725f5303      	clr	21251
  59                     ; 52     TIM2->CCER1 = (u8)TIM2_CCER1_RESET_VALUE;
  61  000c 725f5308      	clr	21256
  62                     ; 53     TIM2->CCER2 = (u8)TIM2_CCER2_RESET_VALUE;
  64  0010 725f5309      	clr	21257
  65                     ; 57     TIM2->CCER1 = (u8)TIM2_CCER1_RESET_VALUE;
  67  0014 725f5308      	clr	21256
  68                     ; 58     TIM2->CCER2 = (u8)TIM2_CCER2_RESET_VALUE;
  70  0018 725f5309      	clr	21257
  71                     ; 59     TIM2->CCMR1 = (u8)TIM2_CCMR1_RESET_VALUE;
  73  001c 725f5305      	clr	21253
  74                     ; 60     TIM2->CCMR2 = (u8)TIM2_CCMR2_RESET_VALUE;
  76  0020 725f5306      	clr	21254
  77                     ; 61     TIM2->CCMR3 = (u8)TIM2_CCMR3_RESET_VALUE;
  79  0024 725f5307      	clr	21255
  80                     ; 62     TIM2->CNTRH = (u8)TIM2_CNTRH_RESET_VALUE;
  82  0028 725f530a      	clr	21258
  83                     ; 63     TIM2->CNTRL = (u8)TIM2_CNTRL_RESET_VALUE;
  85  002c 725f530b      	clr	21259
  86                     ; 64     TIM2->PSCR = (u8)TIM2_PSCR_RESET_VALUE;
  88  0030 725f530c      	clr	21260
  89                     ; 65     TIM2->ARRH  = (u8)TIM2_ARRH_RESET_VALUE;
  91  0034 35ff530d      	mov	21261,#255
  92                     ; 66     TIM2->ARRL  = (u8)TIM2_ARRL_RESET_VALUE;
  94  0038 35ff530e      	mov	21262,#255
  95                     ; 67     TIM2->CCR1H = (u8)TIM2_CCR1H_RESET_VALUE;
  97  003c 725f530f      	clr	21263
  98                     ; 68     TIM2->CCR1L = (u8)TIM2_CCR1L_RESET_VALUE;
 100  0040 725f5310      	clr	21264
 101                     ; 69     TIM2->CCR2H = (u8)TIM2_CCR2H_RESET_VALUE;
 103  0044 725f5311      	clr	21265
 104                     ; 70     TIM2->CCR2L = (u8)TIM2_CCR2L_RESET_VALUE;
 106  0048 725f5312      	clr	21266
 107                     ; 71     TIM2->CCR3H = (u8)TIM2_CCR3H_RESET_VALUE;
 109  004c 725f5313      	clr	21267
 110                     ; 72     TIM2->CCR3L = (u8)TIM2_CCR3L_RESET_VALUE;
 112  0050 725f5314      	clr	21268
 113                     ; 73     TIM2->SR1 = (u8)TIM2_SR1_RESET_VALUE;
 115  0054 725f5302      	clr	21250
 116                     ; 74 }
 119  0058 81            	ret
 287                     ; 83 void TIM2_TimeBaseInit( TIM2_Prescaler_TypeDef TIM2_Prescaler,
 287                     ; 84                         u16 TIM2_Period)
 287                     ; 85 {
 288                     	switch	.text
 289  0059               _TIM2_TimeBaseInit:
 291  0059 88            	push	a
 292       00000000      OFST:	set	0
 295                     ; 87     TIM2->PSCR = (u8)(TIM2_Prescaler);
 297  005a c7530c        	ld	21260,a
 298                     ; 89     TIM2->ARRH = (u8)(TIM2_Period >> 8);
 300  005d 7b04          	ld	a,(OFST+4,sp)
 301  005f c7530d        	ld	21261,a
 302                     ; 90     TIM2->ARRL = (u8)(TIM2_Period);
 304  0062 7b05          	ld	a,(OFST+5,sp)
 305  0064 c7530e        	ld	21262,a
 306                     ; 91 }
 309  0067 84            	pop	a
 310  0068 81            	ret
 467                     ; 102 void TIM2_OC1Init(TIM2_OCMode_TypeDef TIM2_OCMode,
 467                     ; 103                   TIM2_OutputState_TypeDef TIM2_OutputState,
 467                     ; 104                   u16 TIM2_Pulse,
 467                     ; 105                   TIM2_OCPolarity_TypeDef TIM2_OCPolarity)
 467                     ; 106 {
 468                     	switch	.text
 469  0069               _TIM2_OC1Init:
 471  0069 89            	pushw	x
 472  006a 88            	push	a
 473       00000001      OFST:	set	1
 476                     ; 108     assert_param(IS_TIM2_OC_MODE_OK(TIM2_OCMode));
 478                     ; 109     assert_param(IS_TIM2_OUTPUT_STATE_OK(TIM2_OutputState));
 480                     ; 110     assert_param(IS_TIM2_OC_POLARITY_OK(TIM2_OCPolarity));
 482                     ; 113     TIM2->CCER1 &= (u8)(~( TIM2_CCER1_CC1E | TIM2_CCER1_CC1P));
 484  006b c65308        	ld	a,21256
 485  006e a4fc          	and	a,#252
 486  0070 c75308        	ld	21256,a
 487                     ; 115     TIM2->CCER1 |= (u8)((TIM2_OutputState  & TIM2_CCER1_CC1E   ) | (TIM2_OCPolarity   & TIM2_CCER1_CC1P   ));
 489  0073 7b08          	ld	a,(OFST+7,sp)
 490  0075 a402          	and	a,#2
 491  0077 6b01          	ld	(OFST+0,sp),a
 492  0079 9f            	ld	a,xl
 493  007a a401          	and	a,#1
 494  007c 1a01          	or	a,(OFST+0,sp)
 495  007e ca5308        	or	a,21256
 496  0081 c75308        	ld	21256,a
 497                     ; 118     TIM2->CCMR1 = (u8)((TIM2->CCMR1 & (u8)(~TIM2_CCMR_OCM)) | (u8)TIM2_OCMode);
 499  0084 c65305        	ld	a,21253
 500  0087 a48f          	and	a,#143
 501  0089 1a02          	or	a,(OFST+1,sp)
 502  008b c75305        	ld	21253,a
 503                     ; 121     TIM2->CCR1H = (u8)(TIM2_Pulse >> 8);
 505  008e 7b06          	ld	a,(OFST+5,sp)
 506  0090 c7530f        	ld	21263,a
 507                     ; 122     TIM2->CCR1L = (u8)(TIM2_Pulse);
 509  0093 7b07          	ld	a,(OFST+6,sp)
 510  0095 c75310        	ld	21264,a
 511                     ; 123 }
 514  0098 5b03          	addw	sp,#3
 515  009a 81            	ret
 579                     ; 134 void TIM2_OC2Init(TIM2_OCMode_TypeDef TIM2_OCMode,
 579                     ; 135                   TIM2_OutputState_TypeDef TIM2_OutputState,
 579                     ; 136                   u16 TIM2_Pulse,
 579                     ; 137                   TIM2_OCPolarity_TypeDef TIM2_OCPolarity)
 579                     ; 138 {
 580                     	switch	.text
 581  009b               _TIM2_OC2Init:
 583  009b 89            	pushw	x
 584  009c 88            	push	a
 585       00000001      OFST:	set	1
 588                     ; 140     assert_param(IS_TIM2_OC_MODE_OK(TIM2_OCMode));
 590                     ; 141     assert_param(IS_TIM2_OUTPUT_STATE_OK(TIM2_OutputState));
 592                     ; 142     assert_param(IS_TIM2_OC_POLARITY_OK(TIM2_OCPolarity));
 594                     ; 146     TIM2->CCER1 &= (u8)(~( TIM2_CCER1_CC2E |  TIM2_CCER1_CC2P ));
 596  009d c65308        	ld	a,21256
 597  00a0 a4cf          	and	a,#207
 598  00a2 c75308        	ld	21256,a
 599                     ; 148     TIM2->CCER1 |= (u8)((TIM2_OutputState  & TIM2_CCER1_CC2E   ) | \
 599                     ; 149                         (TIM2_OCPolarity   & TIM2_CCER1_CC2P   ));
 601  00a5 7b08          	ld	a,(OFST+7,sp)
 602  00a7 a420          	and	a,#32
 603  00a9 6b01          	ld	(OFST+0,sp),a
 604  00ab 9f            	ld	a,xl
 605  00ac a410          	and	a,#16
 606  00ae 1a01          	or	a,(OFST+0,sp)
 607  00b0 ca5308        	or	a,21256
 608  00b3 c75308        	ld	21256,a
 609                     ; 153     TIM2->CCMR2 = (u8)((TIM2->CCMR2 & (u8)(~TIM2_CCMR_OCM)) | (u8)TIM2_OCMode);
 611  00b6 c65306        	ld	a,21254
 612  00b9 a48f          	and	a,#143
 613  00bb 1a02          	or	a,(OFST+1,sp)
 614  00bd c75306        	ld	21254,a
 615                     ; 157     TIM2->CCR2H = (u8)(TIM2_Pulse >> 8);
 617  00c0 7b06          	ld	a,(OFST+5,sp)
 618  00c2 c75311        	ld	21265,a
 619                     ; 158     TIM2->CCR2L = (u8)(TIM2_Pulse);
 621  00c5 7b07          	ld	a,(OFST+6,sp)
 622  00c7 c75312        	ld	21266,a
 623                     ; 159 }
 626  00ca 5b03          	addw	sp,#3
 627  00cc 81            	ret
 691                     ; 170 void TIM2_OC3Init(TIM2_OCMode_TypeDef TIM2_OCMode,
 691                     ; 171                   TIM2_OutputState_TypeDef TIM2_OutputState,
 691                     ; 172                   u16 TIM2_Pulse,
 691                     ; 173                   TIM2_OCPolarity_TypeDef TIM2_OCPolarity)
 691                     ; 174 {
 692                     	switch	.text
 693  00cd               _TIM2_OC3Init:
 695  00cd 89            	pushw	x
 696  00ce 88            	push	a
 697       00000001      OFST:	set	1
 700                     ; 176     assert_param(IS_TIM2_OC_MODE_OK(TIM2_OCMode));
 702                     ; 177     assert_param(IS_TIM2_OUTPUT_STATE_OK(TIM2_OutputState));
 704                     ; 178     assert_param(IS_TIM2_OC_POLARITY_OK(TIM2_OCPolarity));
 706                     ; 180     TIM2->CCER2 &= (u8)(~( TIM2_CCER2_CC3E  | TIM2_CCER2_CC3P));
 708  00cf c65309        	ld	a,21257
 709  00d2 a4fc          	and	a,#252
 710  00d4 c75309        	ld	21257,a
 711                     ; 182     TIM2->CCER2 |= (u8)((TIM2_OutputState  & TIM2_CCER2_CC3E   ) |  (TIM2_OCPolarity   & TIM2_CCER2_CC3P   ));
 713  00d7 7b08          	ld	a,(OFST+7,sp)
 714  00d9 a402          	and	a,#2
 715  00db 6b01          	ld	(OFST+0,sp),a
 716  00dd 9f            	ld	a,xl
 717  00de a401          	and	a,#1
 718  00e0 1a01          	or	a,(OFST+0,sp)
 719  00e2 ca5309        	or	a,21257
 720  00e5 c75309        	ld	21257,a
 721                     ; 185     TIM2->CCMR3 = (u8)((TIM2->CCMR3 & (u8)(~TIM2_CCMR_OCM)) | (u8)TIM2_OCMode);
 723  00e8 c65307        	ld	a,21255
 724  00eb a48f          	and	a,#143
 725  00ed 1a02          	or	a,(OFST+1,sp)
 726  00ef c75307        	ld	21255,a
 727                     ; 188     TIM2->CCR3H = (u8)(TIM2_Pulse >> 8);
 729  00f2 7b06          	ld	a,(OFST+5,sp)
 730  00f4 c75313        	ld	21267,a
 731                     ; 189     TIM2->CCR3L = (u8)(TIM2_Pulse);
 733  00f7 7b07          	ld	a,(OFST+6,sp)
 734  00f9 c75314        	ld	21268,a
 735                     ; 191 }
 738  00fc 5b03          	addw	sp,#3
 739  00fe 81            	ret
 932                     ; 203 void TIM2_ICInit(TIM2_Channel_TypeDef TIM2_Channel,
 932                     ; 204                  TIM2_ICPolarity_TypeDef TIM2_ICPolarity,
 932                     ; 205                  TIM2_ICSelection_TypeDef TIM2_ICSelection,
 932                     ; 206                  TIM2_ICPSC_TypeDef TIM2_ICPrescaler,
 932                     ; 207                  u8 TIM2_ICFilter)
 932                     ; 208 {
 933                     	switch	.text
 934  00ff               _TIM2_ICInit:
 936  00ff 89            	pushw	x
 937       00000000      OFST:	set	0
 940                     ; 210     assert_param(IS_TIM2_CHANNEL_OK(TIM2_Channel));
 942                     ; 211     assert_param(IS_TIM2_IC_POLARITY_OK(TIM2_ICPolarity));
 944                     ; 212     assert_param(IS_TIM2_IC_SELECTION_OK(TIM2_ICSelection));
 946                     ; 213     assert_param(IS_TIM2_IC_PRESCALER_OK(TIM2_ICPrescaler));
 948                     ; 214     assert_param(IS_TIM2_IC_FILTER_OK(TIM2_ICFilter));
 950                     ; 216     if (TIM2_Channel == TIM2_CHANNEL_1)
 952  0100 9e            	ld	a,xh
 953  0101 4d            	tnz	a
 954  0102 2614          	jrne	L104
 955                     ; 219         TI1_Config((u8)TIM2_ICPolarity,
 955                     ; 220                    (u8)TIM2_ICSelection,
 955                     ; 221                    (u8)TIM2_ICFilter);
 957  0104 7b07          	ld	a,(OFST+7,sp)
 958  0106 88            	push	a
 959  0107 7b06          	ld	a,(OFST+6,sp)
 960  0109 97            	ld	xl,a
 961  010a 7b03          	ld	a,(OFST+3,sp)
 962  010c 95            	ld	xh,a
 963  010d cd045a        	call	L3_TI1_Config
 965  0110 84            	pop	a
 966                     ; 224         TIM2_SetIC1Prescaler(TIM2_ICPrescaler);
 968  0111 7b06          	ld	a,(OFST+6,sp)
 969  0113 cd0340        	call	_TIM2_SetIC1Prescaler
 972  0116 202c          	jra	L304
 973  0118               L104:
 974                     ; 226     else if (TIM2_Channel == TIM2_CHANNEL_2)
 976  0118 7b01          	ld	a,(OFST+1,sp)
 977  011a a101          	cp	a,#1
 978  011c 2614          	jrne	L504
 979                     ; 229         TI2_Config((u8)TIM2_ICPolarity,
 979                     ; 230                    (u8)TIM2_ICSelection,
 979                     ; 231                    (u8)TIM2_ICFilter);
 981  011e 7b07          	ld	a,(OFST+7,sp)
 982  0120 88            	push	a
 983  0121 7b06          	ld	a,(OFST+6,sp)
 984  0123 97            	ld	xl,a
 985  0124 7b03          	ld	a,(OFST+3,sp)
 986  0126 95            	ld	xh,a
 987  0127 cd048a        	call	L5_TI2_Config
 989  012a 84            	pop	a
 990                     ; 234         TIM2_SetIC2Prescaler(TIM2_ICPrescaler);
 992  012b 7b06          	ld	a,(OFST+6,sp)
 993  012d cd034d        	call	_TIM2_SetIC2Prescaler
 996  0130 2012          	jra	L304
 997  0132               L504:
 998                     ; 239         TI3_Config((u8)TIM2_ICPolarity,
 998                     ; 240                    (u8)TIM2_ICSelection,

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