📄 stm8s_adc1.ls
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2041 02cb 5a decw x
2042 02cc 26fc jrne L411
2043 02ce L211:
2044 02ce c4540c and a,21516
2045 02d1 6b01 ld (OFST+0,sp),a
2046 02d3 L777:
2047 ; 543 return ((FlagStatus)status);
2049 02d3 7b01 ld a,(OFST+0,sp)
2052 02d5 85 popw x
2053 02d6 81 ret
2204 ; 552 FlagStatus ADC1_GetFlagStatus(ADC1_Flag_TypeDef Flag)
2204 ; 553 {
2205 switch .text
2206 02d7 _ADC1_GetFlagStatus:
2208 02d7 88 push a
2209 02d8 88 push a
2210 00000001 OFST: set 1
2213 ; 554 u8 flagstatus = 0;
2215 ; 555 u8 temp = 0;
2217 ; 558 assert_param(IS_ADC1_FLAG_OK(Flag));
2219 ; 560 if ((Flag & 0x0F) == 0x01)
2221 02d9 a40f and a,#15
2222 02db a101 cp a,#1
2223 02dd 2609 jrne L5601
2224 ; 563 flagstatus = (u8)(ADC1->CR3 & ADC1_CR3_OVR);
2226 02df c65403 ld a,21507
2227 02e2 a440 and a,#64
2228 02e4 6b01 ld (OFST+0,sp),a
2230 02e6 2045 jra L7601
2231 02e8 L5601:
2232 ; 565 else if ((Flag & 0xF0) == 0x10)
2234 02e8 7b02 ld a,(OFST+1,sp)
2235 02ea a4f0 and a,#240
2236 02ec a110 cp a,#16
2237 02ee 2636 jrne L1701
2238 ; 568 temp = (u8)(Flag & 0x0F);
2240 02f0 7b02 ld a,(OFST+1,sp)
2241 02f2 a40f and a,#15
2242 02f4 6b01 ld (OFST+0,sp),a
2243 ; 569 if (temp < 8)
2245 02f6 7b01 ld a,(OFST+0,sp)
2246 02f8 a108 cp a,#8
2247 02fa 2414 jruge L3701
2248 ; 571 flagstatus = (u8)(ADC1->AWSRL & (1 << temp));
2250 02fc 7b01 ld a,(OFST+0,sp)
2251 02fe 5f clrw x
2252 02ff 97 ld xl,a
2253 0300 a601 ld a,#1
2254 0302 5d tnzw x
2255 0303 2704 jreq L021
2256 0305 L221:
2257 0305 48 sll a
2258 0306 5a decw x
2259 0307 26fc jrne L221
2260 0309 L021:
2261 0309 c4540d and a,21517
2262 030c 6b01 ld (OFST+0,sp),a
2264 030e 201d jra L7601
2265 0310 L3701:
2266 ; 575 flagstatus = (u8)(ADC1->AWSRH & (1 << (temp - 8)));
2268 0310 7b01 ld a,(OFST+0,sp)
2269 0312 a008 sub a,#8
2270 0314 5f clrw x
2271 0315 97 ld xl,a
2272 0316 a601 ld a,#1
2273 0318 5d tnzw x
2274 0319 2704 jreq L421
2275 031b L621:
2276 031b 48 sll a
2277 031c 5a decw x
2278 031d 26fc jrne L621
2279 031f L421:
2280 031f c4540c and a,21516
2281 0322 6b01 ld (OFST+0,sp),a
2282 0324 2007 jra L7601
2283 0326 L1701:
2284 ; 580 flagstatus = (u8)(ADC1->CSR & Flag);
2286 0326 c65400 ld a,21504
2287 0329 1402 and a,(OFST+1,sp)
2288 032b 6b01 ld (OFST+0,sp),a
2289 032d L7601:
2290 ; 582 return ((FlagStatus)flagstatus);
2292 032d 7b01 ld a,(OFST+0,sp)
2295 032f 85 popw x
2296 0330 81 ret
2340 ; 592 void ADC1_ClearFlag(ADC1_Flag_TypeDef Flag)
2340 ; 593 {
2341 switch .text
2342 0331 _ADC1_ClearFlag:
2344 0331 88 push a
2345 0332 88 push a
2346 00000001 OFST: set 1
2349 ; 594 u8 temp = 0;
2351 ; 597 assert_param(IS_ADC1_FLAG_OK(Flag));
2353 ; 599 if ((Flag & 0x0F) == 0x01)
2355 0333 a40f and a,#15
2356 0335 a101 cp a,#1
2357 0337 2606 jrne L3211
2358 ; 602 ADC1->CR3 &= (u8)(~ADC1_CR3_OVR);
2360 0339 721d5403 bres 21507,#6
2362 033d 204b jra L5211
2363 033f L3211:
2364 ; 604 else if ((Flag & 0xF0) == 0x10)
2366 033f 7b02 ld a,(OFST+1,sp)
2367 0341 a4f0 and a,#240
2368 0343 a110 cp a,#16
2369 0345 263a jrne L7211
2370 ; 607 temp = (u8)(Flag & 0x0F);
2372 0347 7b02 ld a,(OFST+1,sp)
2373 0349 a40f and a,#15
2374 034b 6b01 ld (OFST+0,sp),a
2375 ; 608 if (temp < 8)
2377 034d 7b01 ld a,(OFST+0,sp)
2378 034f a108 cp a,#8
2379 0351 2416 jruge L1311
2380 ; 610 ADC1->AWSRL &= (u8)(~((u8)1 << temp));
2382 0353 7b01 ld a,(OFST+0,sp)
2383 0355 5f clrw x
2384 0356 97 ld xl,a
2385 0357 a601 ld a,#1
2386 0359 5d tnzw x
2387 035a 2704 jreq L231
2388 035c L431:
2389 035c 48 sll a
2390 035d 5a decw x
2391 035e 26fc jrne L431
2392 0360 L231:
2393 0360 43 cpl a
2394 0361 c4540d and a,21517
2395 0364 c7540d ld 21517,a
2397 0367 2021 jra L5211
2398 0369 L1311:
2399 ; 614 ADC1->AWSRH &= (u8)(~((u8)1 << (temp - 8)));
2401 0369 7b01 ld a,(OFST+0,sp)
2402 036b a008 sub a,#8
2403 036d 5f clrw x
2404 036e 97 ld xl,a
2405 036f a601 ld a,#1
2406 0371 5d tnzw x
2407 0372 2704 jreq L631
2408 0374 L041:
2409 0374 48 sll a
2410 0375 5a decw x
2411 0376 26fc jrne L041
2412 0378 L631:
2413 0378 43 cpl a
2414 0379 c4540c and a,21516
2415 037c c7540c ld 21516,a
2416 037f 2009 jra L5211
2417 0381 L7211:
2418 ; 619 ADC1->CSR &= (u8) (~Flag);
2420 0381 7b02 ld a,(OFST+1,sp)
2421 0383 43 cpl a
2422 0384 c45400 and a,21504
2423 0387 c75400 ld 21504,a
2424 038a L5211:
2425 ; 621 }
2428 038a 85 popw x
2429 038b 81 ret
2484 ; 641 ITStatus ADC1_GetITStatus(ADC1_IT_TypeDef ITPendingBit)
2484 ; 642 {
2485 switch .text
2486 038c _ADC1_GetITStatus:
2488 038c 89 pushw x
2489 038d 88 push a
2490 00000001 OFST: set 1
2493 ; 643 ITStatus itstatus = RESET;
2495 ; 644 u8 temp = 0;
2497 ; 647 assert_param(IS_ADC1_ITPENDINGBIT_OK(ITPendingBit));
2499 ; 649 if ((ITPendingBit & 0xF0) == 0x10)
2501 038e 01 rrwa x,a
2502 038f a4f0 and a,#240
2503 0391 5f clrw x
2504 0392 02 rlwa x,a
2505 0393 a30010 cpw x,#16
2506 0396 2636 jrne L5611
2507 ; 652 temp = (u8)(ITPendingBit & 0x0F);
2509 0398 7b03 ld a,(OFST+2,sp)
2510 039a a40f and a,#15
2511 039c 6b01 ld (OFST+0,sp),a
2512 ; 653 if (temp < 8)
2514 039e 7b01 ld a,(OFST+0,sp)
2515 03a0 a108 cp a,#8
2516 03a2 2414 jruge L7611
2517 ; 655 itstatus = (u8)(ADC1->AWSRL & (u8)((u8)1 << temp));
2519 03a4 7b01 ld a,(OFST+0,sp)
2520 03a6 5f clrw x
2521 03a7 97 ld xl,a
2522 03a8 a601 ld a,#1
2523 03aa 5d tnzw x
2524 03ab 2704 jreq L441
2525 03ad L641:
2526 03ad 48 sll a
2527 03ae 5a decw x
2528 03af 26fc jrne L641
2529 03b1 L441:
2530 03b1 c4540d and a,21517
2531 03b4 6b01 ld (OFST+0,sp),a
2533 03b6 201d jra L3711
2534 03b8 L7611:
2535 ; 659 itstatus = (u8)(ADC1->AWSRH & (u8)((u8)1 << (temp - 8)));
2537 03b8 7b01 ld a,(OFST+0,sp)
2538 03ba a008 sub a,#8
2539 03bc 5f clrw x
2540 03bd 97 ld xl,a
2541 03be a601 ld a,#1
2542 03c0 5d tnzw x
2543 03c1 2704 jreq L051
2544 03c3 L251:
2545 03c3 48 sll a
2546 03c4 5a decw x
2547 03c5 26fc jrne L251
2548 03c7 L051:
2549 03c7 c4540c and a,21516
2550 03ca 6b01 ld (OFST+0,sp),a
2551 03cc 2007 jra L3711
2552 03ce L5611:
2553 ; 664 itstatus = (u8)(ADC1->CSR & ITPendingBit);
2555 03ce c65400 ld a,21504
2556 03d1 1403 and a,(OFST+2,sp)
2557 03d3 6b01 ld (OFST+0,sp),a
2558 03d5 L3711:
2559 ; 666 return ((ITStatus)itstatus);
2561 03d5 7b01 ld a,(OFST+0,sp)
2564 03d7 5b03 addw sp,#3
2565 03d9 81 ret
2610 ; 688 void ADC1_ClearITPendingBit(ADC1_IT_TypeDef ITPendingBit)
2610 ; 689 {
2611 switch .text
2612 03da _ADC1_ClearITPendingBit:
2614 03da 89 pushw x
2615 03db 88 push a
2616 00000001 OFST: set 1
2619 ; 690 u8 temp = 0;
2621 ; 693 assert_param(IS_ADC1_ITPENDINGBIT_OK(ITPendingBit));
2623 ; 695 if ((ITPendingBit& 0xF0) == 0x10)
2625 03dc 01 rrwa x,a
2626 03dd a4f0 and a,#240
2627 03df 5f clrw x
2628 03e0 02 rlwa x,a
2629 03e1 a30010 cpw x,#16
2630 03e4 263a jrne L7121
2631 ; 698 temp = (u8)(ITPendingBit & 0x0F);
2633 03e6 7b03 ld a,(OFST+2,sp)
2634 03e8 a40f and a,#15
2635 03ea 6b01 ld (OFST+0,sp),a
2636 ; 699 if (temp < 8)
2638 03ec 7b01 ld a,(OFST+0,sp)
2639 03ee a108 cp a,#8
2640 03f0 2416 jruge L1221
2641 ; 701 ADC1->AWSRL &= (u8)(~((u8)1 << temp));
2643 03f2 7b01 ld a,(OFST+0,sp)
2644 03f4 5f clrw x
2645 03f5 97 ld xl,a
2646 03f6 a601 ld a,#1
2647 03f8 5d tnzw x
2648 03f9 2704 jreq L651
2649 03fb L061:
2650 03fb 48 sll a
2651 03fc 5a decw x
2652 03fd 26fc jrne L061
2653 03ff L651:
2654 03ff 43 cpl a
2655 0400 c4540d and a,21517
2656 0403 c7540d ld 21517,a
2658 0406 2021 jra L5221
2659 0408 L1221:
2660 ; 705 ADC1->AWSRH &= (u8)(~((u8)1 << (temp - 8)));
2662 0408 7b01 ld a,(OFST+0,sp)
2663 040a a008 sub a,#8
2664 040c 5f clrw x
2665 040d 97 ld xl,a
2666 040e a601 ld a,#1
2667 0410 5d tnzw x
2668 0411 2704 jreq L261
2669 0413 L461:
2670 0413 48 sll a
2671 0414 5a decw x
2672 0415 26fc jrne L461
2673 0417 L261:
2674 0417 43 cpl a
2675 0418 c4540c and a,21516
2676 041b c7540c ld 21516,a
2677 041e 2009 jra L5221
2678 0420 L7121:
2679 ; 710 ADC1->CSR &= (u8) (~ITPendingBit);
2681 0420 7b03 ld a,(OFST+2,sp)
2682 0422 43 cpl a
2683 0423 c45400 and a,21504
2684 0426 c75400 ld 21504,a
2685 0429 L5221:
2686 ; 712 }
2689 0429 5b03 addw sp,#3
2690 042b 81 ret
2703 xdef _ADC1_ClearITPendingBit
2704 xdef _ADC1_GetITStatus
2705 xdef _ADC1_ClearFlag
2706 xdef _ADC1_GetFlagStatus
2707 xdef _ADC1_GetAWDChannelStatus
2708 xdef _ADC1_GetBufferValue
2709 xdef _ADC1_SetLowThreshold
2710 xdef _ADC1_SetHighThreshold
2711 xdef _ADC1_GetConversionValue
2712 xdef _ADC1_StartConversion
2713 xdef _ADC1_AWDChannelConfig
2714 xdef _ADC1_ExternalTriggerConfig
2715 xdef _ADC1_ConversionConfig
2716 xdef _ADC1_SchmittTriggerConfig
2717 xdef _ADC1_PrescalerConfig
2718 xdef _ADC1_ITConfig
2719 xdef _ADC1_DataBufferCmd
2720 xdef _ADC1_ScanModeCmd
2721 xdef _ADC1_Cmd
2722 xdef _ADC1_Init
2723 xdef _ADC1_DeInit
2742 end
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