📄 stm8s_clk.ls
字号:
1 ; C Compiler for STM8 (COSMIC Software)
2 ; Generator V4.2.8 - 03 Dec 2008
4 .const: section .text
5 0000 _HSIDivFactor:
6 0000 01 dc.b 1
7 0001 02 dc.b 2
8 0002 04 dc.b 4
9 0003 08 dc.b 8
10 0004 _CLKPrescTable:
11 0004 01 dc.b 1
12 0005 02 dc.b 2
13 0006 04 dc.b 4
14 0007 08 dc.b 8
15 0008 0a dc.b 10
16 0009 10 dc.b 16
17 000a 14 dc.b 20
18 000b 28 dc.b 40
47 ; 64 void CLK_DeInit(void)
47 ; 65 {
49 switch .text
50 0000 _CLK_DeInit:
54 ; 67 CLK->ICKR = CLK_ICKR_RESET_VALUE;
56 0000 350150c0 mov 20672,#1
57 ; 68 CLK->ECKR = CLK_ECKR_RESET_VALUE;
59 0004 725f50c1 clr 20673
60 ; 69 CLK->SWR = CLK_SWR_RESET_VALUE;
62 0008 35e150c4 mov 20676,#225
63 ; 70 CLK->SWCR = CLK_SWCR_RESET_VALUE;
65 000c 725f50c5 clr 20677
66 ; 71 CLK->CKDIVR = CLK_CKDIVR_RESET_VALUE;
68 0010 351850c6 mov 20678,#24
69 ; 72 CLK->PCKENR1 = CLK_PCKENR1_RESET_VALUE;
71 0014 35ff50c7 mov 20679,#255
72 ; 73 CLK->PCKENR2 = CLK_PCKENR2_RESET_VALUE;
74 0018 35ff50ca mov 20682,#255
75 ; 74 CLK->CSSR = CLK_CSSR_RESET_VALUE;
77 001c 725f50c8 clr 20680
78 ; 75 CLK->CCOR = CLK_CCOR_RESET_VALUE;
80 0020 725f50c9 clr 20681
82 0024 L52:
83 ; 76 while (CLK->CCOR & CLK_CCOR_CCOEN)
85 0024 c650c9 ld a,20681
86 0027 a501 bcp a,#1
87 0029 26f9 jrne L52
88 ; 78 CLK->CCOR = CLK_CCOR_RESET_VALUE;
90 002b 725f50c9 clr 20681
91 ; 79 CLK->CANCCR = CLK_CANCCR_RESET_VALUE;
93 002f 725f50cb clr 20683
94 ; 80 CLK->HSITRIMR = CLK_HSITRIMR_RESET_VALUE;
96 0033 725f50cc clr 20684
97 ; 81 CLK->SWIMCCR = CLK_SWIMCCR_RESET_VALUE;
99 0037 725f50cd clr 20685
100 ; 83 }
103 003b 81 ret
159 ; 94 void CLK_FastHaltWakeUpCmd(FunctionalState NewState)
159 ; 95 {
160 switch .text
161 003c _CLK_FastHaltWakeUpCmd:
165 ; 98 assert_param(IS_FUNCTIONALSTATE_OK(NewState));
167 ; 100 if (NewState != DISABLE)
169 003c 4d tnz a
170 003d 2706 jreq L75
171 ; 103 CLK->ICKR |= CLK_ICKR_FHWU;
173 003f 721450c0 bset 20672,#2
175 0043 2004 jra L16
176 0045 L75:
177 ; 108 CLK->ICKR &= (u8)(~CLK_ICKR_FHWU);
179 0045 721550c0 bres 20672,#2
180 0049 L16:
181 ; 111 }
184 0049 81 ret
219 ; 118 void CLK_HSECmd(FunctionalState NewState)
219 ; 119 {
220 switch .text
221 004a _CLK_HSECmd:
225 ; 122 assert_param(IS_FUNCTIONALSTATE_OK(NewState));
227 ; 124 if (NewState != DISABLE)
229 004a 4d tnz a
230 004b 2706 jreq L101
231 ; 127 CLK->ECKR |= CLK_ECKR_HSEEN;
233 004d 721050c1 bset 20673,#0
235 0051 2004 jra L301
236 0053 L101:
237 ; 132 CLK->ECKR &= (u8)(~CLK_ECKR_HSEEN);
239 0053 721150c1 bres 20673,#0
240 0057 L301:
241 ; 135 }
244 0057 81 ret
279 ; 142 void CLK_HSICmd(FunctionalState NewState)
279 ; 143 {
280 switch .text
281 0058 _CLK_HSICmd:
285 ; 146 assert_param(IS_FUNCTIONALSTATE_OK(NewState));
287 ; 148 if (NewState != DISABLE)
289 0058 4d tnz a
290 0059 2706 jreq L321
291 ; 151 CLK->ICKR |= CLK_ICKR_HSIEN;
293 005b 721050c0 bset 20672,#0
295 005f 2004 jra L521
296 0061 L321:
297 ; 156 CLK->ICKR &= (u8)(~CLK_ICKR_HSIEN);
299 0061 721150c0 bres 20672,#0
300 0065 L521:
301 ; 159 }
304 0065 81 ret
339 ; 166 void CLK_LSICmd(FunctionalState NewState)
339 ; 167 {
340 switch .text
341 0066 _CLK_LSICmd:
345 ; 170 assert_param(IS_FUNCTIONALSTATE_OK(NewState));
347 ; 172 if (NewState != DISABLE)
349 0066 4d tnz a
350 0067 2706 jreq L541
351 ; 175 CLK->ICKR |= CLK_ICKR_LSIEN;
353 0069 721650c0 bset 20672,#3
355 006d 2004 jra L741
356 006f L541:
357 ; 180 CLK->ICKR &= (u8)(~CLK_ICKR_LSIEN);
359 006f 721750c0 bres 20672,#3
360 0073 L741:
361 ; 183 }
364 0073 81 ret
399 ; 191 void CLK_CCOCmd(FunctionalState NewState)
399 ; 192 {
400 switch .text
401 0074 _CLK_CCOCmd:
405 ; 195 assert_param(IS_FUNCTIONALSTATE_OK(NewState));
407 ; 197 if (NewState != DISABLE)
409 0074 4d tnz a
410 0075 2706 jreq L761
411 ; 200 CLK->CCOR |= CLK_CCOR_CCOEN;
413 0077 721050c9 bset 20681,#0
415 007b 2004 jra L171
416 007d L761:
417 ; 205 CLK->CCOR &= (u8)(~CLK_CCOR_CCOEN);
419 007d 721150c9 bres 20681,#0
420 0081 L171:
421 ; 208 }
424 0081 81 ret
459 ; 217 void CLK_ClockSwitchCmd(FunctionalState NewState)
459 ; 218 {
460 switch .text
461 0082 _CLK_ClockSwitchCmd:
465 ; 221 assert_param(IS_FUNCTIONALSTATE_OK(NewState));
467 ; 223 if (NewState != DISABLE )
469 0082 4d tnz a
470 0083 2706 jreq L112
471 ; 226 CLK->SWCR |= CLK_SWCR_SWEN;
473 0085 721250c5 bset 20677,#1
475 0089 2004 jra L312
476 008b L112:
477 ; 231 CLK->SWCR &= (u8)(~CLK_SWCR_SWEN);
479 008b 721350c5 bres 20677,#1
480 008f L312:
481 ; 234 }
484 008f 81 ret
520 ; 244 void CLK_SlowActiveHaltWakeUpCmd(FunctionalState NewState)
520 ; 245 {
521 switch .text
522 0090 _CLK_SlowActiveHaltWakeUpCmd:
526 ; 248 assert_param(IS_FUNCTIONALSTATE_OK(NewState));
528 ; 250 if (NewState != DISABLE)
530 0090 4d tnz a
531 0091 2706 jreq L332
532 ; 253 CLK->ICKR |= CLK_ICKR_SWUAH;
534 0093 721a50c0 bset 20672,#5
536 0097 2004 jra L532
537 0099 L332:
538 ; 258 CLK->ICKR &= (u8)(~CLK_ICKR_SWUAH);
540 0099 721b50c0 bres 20672,#5
541 009d L532:
542 ; 261 }
545 009d 81 ret
704 ; 271 void CLK_PeripheralClockConfig(CLK_Peripheral_TypeDef CLK_Peripheral, FunctionalState NewState)
704 ; 272 {
705 switch .text
706 009e _CLK_PeripheralClockConfig:
708 009e 89 pushw x
709 00000000 OFST: set 0
712 ; 275 assert_param(IS_FUNCTIONALSTATE_OK(NewState));
714 ; 276 assert_param(IS_CLK_PERIPHERAL_OK(CLK_Peripheral));
716 ; 278 if (((u8)CLK_Peripheral & (u8)0x10) == 0x00)
718 009f 9e ld a,xh
719 00a0 a510 bcp a,#16
720 00a2 2633 jrne L123
721 ; 280 if (NewState != DISABLE)
723 00a4 0d02 tnz (OFST+2,sp)
724 00a6 2717 jreq L323
725 ; 283 CLK->PCKENR1 |= (u8)((u8)1 << ((u8)CLK_Peripheral & (u8)0x0F));
727 00a8 7b01 ld a,(OFST+1,sp)
728 00aa a40f and a,#15
729 00ac 5f clrw x
730 00ad 97 ld xl,a
731 00ae a601 ld a,#1
732 00b0 5d tnzw x
733 00b1 2704 jreq L62
734 00b3 L03:
735 00b3 48 sll a
736 00b4 5a decw x
737 00b5 26fc jrne L03
738 00b7 L62:
739 00b7 ca50c7 or a,20679
740 00ba c750c7 ld 20679,a
742 00bd 2049 jra L723
743 00bf L323:
744 ; 288 CLK->PCKENR1 &= (u8)(~(u8)(((u8)1 << ((u8)CLK_Peripheral & (u8)0x0F))));
746 00bf 7b01 ld a,(OFST+1,sp)
747 00c1 a40f and a,#15
748 00c3 5f clrw x
749 00c4 97 ld xl,a
750 00c5 a601 ld a,#1
751 00c7 5d tnzw x
752 00c8 2704 jreq L23
753 00ca L43:
754 00ca 48 sll a
755 00cb 5a decw x
756 00cc 26fc jrne L43
757 00ce L23:
758 00ce 43 cpl a
759 00cf c450c7 and a,20679
760 00d2 c750c7 ld 20679,a
761 00d5 2031 jra L723
762 00d7 L123:
763 ; 293 if (NewState != DISABLE)
765 00d7 0d02 tnz (OFST+2,sp)
766 00d9 2717 jreq L133
767 ; 296 CLK->PCKENR2 |= (u8)((u8)1 << ((u8)CLK_Peripheral & (u8)0x0F));
769 00db 7b01 ld a,(OFST+1,sp)
770 00dd a40f and a,#15
771 00df 5f clrw x
772 00e0 97 ld xl,a
773 00e1 a601 ld a,#1
774 00e3 5d tnzw x
775 00e4 2704 jreq L63
776 00e6 L04:
777 00e6 48 sll a
778 00e7 5a decw x
779 00e8 26fc jrne L04
780 00ea L63:
781 00ea ca50ca or a,20682
782 00ed c750ca ld 20682,a
784 00f0 2016 jra L723
785 00f2 L133:
786 ; 301 CLK->PCKENR2 &= (u8)(~(u8)(((u8)1 << ((u8)CLK_Peripheral & (u8)0x0F))));
788 00f2 7b01 ld a,(OFST+1,sp)
789 00f4 a40f and a,#15
790 00f6 5f clrw x
791 00f7 97 ld xl,a
792 00f8 a601 ld a,#1
793 00fa 5d tnzw x
794 00fb 2704 jreq L24
795 00fd L44:
796 00fd 48 sll a
797 00fe 5a decw x
798 00ff 26fc jrne L44
799 0101 L24:
800 0101 43 cpl a
801 0102 c450ca and a,20682
802 0105 c750ca ld 20682,a
803 0108 L723:
804 ; 305 }
807 0108 85 popw x
808 0109 81 ret
996 ; 318 ErrorStatus CLK_ClockSwitchConfig(CLK_SwitchMode_TypeDef CLK_SwitchMode, CLK_Source_TypeDef CLK_NewClock, FunctionalState ITState, CLK_CurrentClockState_TypeDef CLK_CurrentClockState)
996 ; 319 {
997 switch .text
998 010a _CLK_ClockSwitchConfig:
1000 010a 89 pushw x
1001 010b 5204 subw sp,#4
1002 00000004 OFST: set 4
1005 ; 322 u16 DownCounter = CLK_TIMEOUT;
1007 010d ae0491 ldw x,#1169
1008 0110 1f03 ldw (OFST-1,sp),x
1009 ; 323 ErrorStatus Swif = ERROR;
1011 0112 7b02 ld a,(OFST-2,sp)
1012 0114 97 ld xl,a
1013 ; 326 assert_param(IS_CLK_SOURCE_OK(CLK_NewClock));
1015 ; 327 assert_param(IS_CLK_SWITCHMODE_OK(CLK_SwitchMode));
1017 ; 328 assert_param(IS_FUNCTIONALSTATE_OK(ITState));
1019 ; 329 assert_param(IS_CLK_CURRENTCLOCKSTATE_OK(CLK_CurrentClockState));
1021 ; 332 clock_master = (CLK_Source_TypeDef)CLK->CMSR;
1023 0115 c650c3 ld a,20675
1024 0118 6b01 ld (OFST-3,sp),a
1025 ; 335 if (CLK_SwitchMode == CLK_SWITCHMODE_AUTO)
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