📄 stm8s_tim5.c
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{
TIM5->CCER2 &= (u8)(~TIM5_CCER2_CC3P) ;
}
}
/**
* @brief Enables or disables the TIM5 Capture Compare Channel x.
* @param[in] TIM5_Channel specifies the TIM5 Channel.
* This parameter can be one of the following values:
* - TIM5_Channel1: TIM5 Channel1
* - TIM5_Channel2: TIM5 Channel2
* - TIM5_Channel3: TIM5 Channel3
* @param[in] NewState specifies the TIM5 Channel CCxE bit new state.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void TIM5_CCxCmd(TIM5_Channel_TypeDef TIM5_Channel, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_TIM5_CHANNEL_OK(TIM5_Channel));
assert_param(IS_FUNCTIONALSTATE_OK(NewState));
if (TIM5_Channel == TIM5_CHANNEL_1)
{
/* Set or Reset the CC1E Bit */
if (NewState != DISABLE)
{
TIM5->CCER1 |= TIM5_CCER1_CC1E ;
}
else
{
TIM5->CCER1 &= (u8)(~TIM5_CCER1_CC1E) ;
}
}
else if (TIM5_Channel == TIM5_CHANNEL_2)
{
/* Set or Reset the CC2E Bit */
if (NewState != DISABLE)
{
TIM5->CCER1 |= TIM5_CCER1_CC2E;
}
else
{
TIM5->CCER1 &= (u8)(~TIM5_CCER1_CC2E) ;
}
}
else
{
/* Set or Reset the CC3E Bit */
if (NewState != DISABLE)
{
TIM5->CCER2 |= TIM5_CCER2_CC3E;
}
else
{
TIM5->CCER2 &= (u8)(~TIM5_CCER2_CC3E) ;
}
}
}
/**
* @brief Selects the TIM5 Ouput Compare Mode. This function disables the
* selected channel before changing the Ouput Compare Mode. User has to
* enable this channel using TIM5_CCxCmd and TIM5_CCxNCmd functions.
* @param[in] TIM5_Channel specifies the TIM5 Channel.
* This parameter can be one of the following values:
* - TIM5_Channel1: TIM5 Channel1
* - TIM5_Channel2: TIM5 Channel2
* - TIM5_Channel3: TIM5 Channel3
* @param[in] TIM5_OCMode specifies the TIM5 Output Compare Mode.
* This paramter can be one of the following values:
* - TIM5_OCMODE_TIMING
* - TIM5_OCMODE_ACTIVE
* - TIM5_OCMODE_TOGGLE
* - TIM5_OCMODE_PWM1
* - TIM5_OCMODE_PWM2
* - TIM5_FORCEDACTION_ACTIVE
* - TIM5_FORCEDACTION_INACTIVE
* @retval None
*/
void TIM5_SelectOCxM(TIM5_Channel_TypeDef TIM5_Channel, TIM5_OCMode_TypeDef TIM5_OCMode)
{
/* Check the parameters */
assert_param(IS_TIM5_CHANNEL_OK(TIM5_Channel));
assert_param(IS_TIM5_OCM_OK(TIM5_OCMode));
if (TIM5_Channel == TIM5_CHANNEL_1)
{
/* Disable the Channel 1: Reset the CCE Bit */
TIM5->CCER1 &= (u8)(~TIM5_CCER1_CC1E);
/* Reset the Output Compare Bits Set the Ouput Compare Mode */
TIM5->CCMR1 = (u8)((TIM5->CCMR1 & (u8)(~TIM5_CCMR_OCM)) | (u8)TIM5_OCMode);
}
else if (TIM5_Channel == TIM5_CHANNEL_2)
{
/* Disable the Channel 2: Reset the CCE Bit */
TIM5->CCER1 &= (u8)(~TIM5_CCER1_CC2E);
/* Reset the Output Compare Bits ** Set the Ouput Compare Mode */
TIM5->CCMR2 = (u8)((TIM5->CCMR2 & (u8)(~TIM5_CCMR_OCM)) | (u8)TIM5_OCMode);
}
else
{
/* Disable the Channel 3: Reset the CCE Bit */
TIM5->CCER2 &= (u8)(~TIM5_CCER2_CC3E);
/* Reset the Output Compare Bits ** Set the Ouput Compare Mode */
TIM5->CCMR3 = (u8)((TIM5->CCMR3 & (u8)(~TIM5_CCMR_OCM)) | (u8)TIM5_OCMode);
}
}
/**
* @brief Sets the TIM5 Counter Register value.
* @param[in] Counter specifies the Counter register new value.
* This parameter is between 0x0000 and 0xFFFF.
* @retval None
*/
void TIM5_SetCounter(u16 Counter)
{
/* Set the Counter Register value */
TIM5->CNTRH = (u8)(Counter >> 8);
TIM5->CNTRL = (u8)(Counter);
}
/**
* @brief Sets the TIM5 Autoreload Register value.
* @param[in] Autoreload specifies the Autoreload register new value.
* This parameter is between 0x0000 and 0xFFFF.
* @retval None
*/
void TIM5_SetAutoreload(u16 Autoreload)
{
/* Set the Autoreload Register value */
TIM5->ARRH = (u8)(Autoreload >> 8);
TIM5->ARRL = (u8)(Autoreload);
}
/**
* @brief Sets the TIM5 Capture Compare1 Register value.
* @param[in] Compare1 specifies the Capture Compare1 register new value.
* This parameter is between 0x0000 and 0xFFFF.
* @retval None
*/
void TIM5_SetCompare1(u16 Compare1)
{
/* Set the Capture Compare1 Register value */
TIM5->CCR1H = (u8)(Compare1 >> 8);
TIM5->CCR1L = (u8)(Compare1);
}
/**
* @brief Sets the TIM5 Capture Compare2 Register value.
* @param[in] Compare2 specifies the Capture Compare2 register new value.
* This parameter is between 0x0000 and 0xFFFF.
* @retval None
*/
void TIM5_SetCompare2(u16 Compare2)
{
/* Set the Capture Compare2 Register value */
TIM5->CCR2H = (u8)(Compare2 >> 8);
TIM5->CCR2L = (u8)(Compare2);
}
/**
* @brief Sets the TIM5 Capture Compare3 Register value.
* @param[in] Compare3 specifies the Capture Compare3 register new value.
* This parameter is between 0x0000 and 0xFFFF.
* @retval None
*/
void TIM5_SetCompare3(u16 Compare3)
{
/* Set the Capture Compare3 Register value */
TIM5->CCR3H = (u8)(Compare3 >> 8);
TIM5->CCR3L = (u8)(Compare3);
}
/**
* @brief Sets the TIM5 Input Capture 1 prescaler.
* @param[in] TIM5_IC1Prescaler specifies the Input Capture prescaler new value
* This parameter can be one of the following values:
* - TIM5_ICPSC_DIV1: no prescaler
* - TIM5_ICPSC_DIV2: capture is done once every 2 events
* - TIM5_ICPSC_DIV4: capture is done once every 4 events
* - TIM5_ICPSC_DIV8: capture is done once every 8 events
* @retval None
*/
void TIM5_SetIC1Prescaler(TIM5_ICPSC_TypeDef TIM5_IC1Prescaler)
{
/* Check the parameters */
assert_param(IS_TIM5_IC_PRESCALER_OK(TIM5_IC1Prescaler));
/* Reset the IC1PSC Bits */ /* Set the IC1PSC value */
TIM5->CCMR1 = (u8)((TIM5->CCMR1 & (u8)(~TIM5_CCMR_ICxPSC))| (u8)TIM5_IC1Prescaler);
}
/**
* @brief Sets the TIM5 Input Capture 2 prescaler.
* @param[in] TIM5_IC2Prescaler specifies the Input Capture prescaler new value
* This parameter can be one of the following values:
* - TIM5_ICPSC_DIV1: no prescaler
* - TIM5_ICPSC_DIV2: capture is done once every 2 events
* - TIM5_ICPSC_DIV4: capture is done once every 4 events
* - TIM5_ICPSC_DIV8: capture is done once every 8 events
* @retval None
*/
void TIM5_SetIC2Prescaler(TIM5_ICPSC_TypeDef TIM5_IC2Prescaler)
{
/* Check the parameters */
assert_param(IS_TIM5_IC_PRESCALER_OK(TIM5_IC2Prescaler));
/* Reset the IC1PSC Bits */ /* Set the IC1PSC value */
TIM5->CCMR2 = (u8)((TIM5->CCMR2 & (u8)(~TIM5_CCMR_ICxPSC)) | (u8)TIM5_IC2Prescaler);
}
/**
* @brief Sets the TIM5 Input Capture 3 prescaler.
* @param[in] TIM5_IC3Prescaler specifies the Input Capture prescaler new value
* This parameter can be one of the following values:
* - TIM5_ICPSC_DIV1: no prescaler
* - TIM5_ICPSC_DIV2: capture is done once every 2 events
* - TIM5_ICPSC_DIV4: capture is done once every 4 events
* - TIM5_ICPSC_DIV8: capture is done once every 8 events
* @retval None
*/
void TIM5_SetIC3Prescaler(TIM5_ICPSC_TypeDef TIM5_IC3Prescaler)
{
/* Check the parameters */
assert_param(IS_TIM5_IC_PRESCALER_OK(TIM5_IC3Prescaler));
/* Reset the IC1PSC Bits */ /* Set the IC1PSC value */
TIM5->CCMR3 = (u8)((TIM5->CCMR3 & (u8)(~TIM5_CCMR_ICxPSC)) | (u8)TIM5_IC3Prescaler);
}
/**
* @brief Gets the TIM5 Input Capture 1 value.
* @param[in] :
* None
* @retval Capture Compare 1 Register value.
*/
u16 TIM5_GetCapture1(void)
{
/* Get the Capture 1 Register value */
return (u16)(((u16)TIM5->CCR1H << 8)| (u16)(TIM5->CCR1L));
}
/**
* @brief Gets the TIM5 Input Capture 2 value.
* @param[in] :
* None
* @retval Capture Compare 2 Register value.
*/
u16 TIM5_GetCapture2(void)
{
/* Get the Capture 2 Register value */
return (u16)(((u16)TIM5->CCR2H << 8)| (u16)(TIM5->CCR2L));
}
/**
* @brief Gets the TIM5 Input Capture 3 value.
* @param[in] :
* None
* @retval Capture Compare 3 Register value.
*/
u16 TIM5_GetCapture3(void)
{
/* Get the Capture 1 Register value */
return (u16)(((u16)TIM5->CCR3H << 8)| (u16)(TIM5->CCR3L));
}
/**
* @brief Gets the TIM5 Counter value.
* @param[in] :
* None
* @retval Counter Register value.
*/
u16 TIM5_GetCounter(void)
{
/* Get the Counter Register value */
return (u16)(((u16)TIM5->CNTRH << 8)| (u16)(TIM5->CNTRL));
}
/**
* @brief Gets the TIM5 Prescaler value.
* @param[in] :
* None
* @retval Prescaler Register configuration value @ref TIM5_Prescaler_TypeDef .
*/
TIM5_Prescaler_TypeDef TIM5_GetPrescaler(void)
{
/* Get the Prescaler Register value */
return (TIM5_Prescaler_TypeDef)(TIM5->PSCR);
}
/**
* @brief Checks whether the specified TIM5 flag is set or not.
* @param[in] TIM5_FLAG specifies the flag to check.
* This parameter can be one of the following values:
* - TIM5_FLAG_UPDATE: TIM5 update Flag
* - TIM5_FLAG_CC1: TIM5 Capture Compare 1 Flag
* - TIM5_FLAG_CC2: TIM5 Capture Compare 2 Flag
* - TIM5_FLAG_CC3: TIM5 Capture Compare 3 Flag
* - TIM5_FLAG_CC1OF: TIM5 Capture Compare 1 overcapture Flag
* - TIM5_FLAG_CC2OF: TIM5 Capture Compare 2 overcapture Flag
* - TIM5_FLAG_CC3OF: TIM5 Capture Compare 3 overcapture Flag
* @retval FlagStatus The new state of TIM5_FLAG (SET or RESET).
*/
FlagStatus TIM5_GetFlagStatus(TIM5_FLAG_TypeDef TIM5_FLAG)
{
volatile FlagStatus bitstatus = RESET;
vu8 tim5_flag_l, tim5_flag_h;
/* Check the parameters */
assert_param(IS_TIM5_GET_FLAG_OK(TIM5_FLAG));
tim5_flag_l= (u8)(TIM5_FLAG);
tim5_flag_h= (u8)(TIM5_FLAG >> 8);
if (((TIM5->SR1 & tim5_flag_l)|(TIM5->SR2 & tim5_flag_h)) != (u8)RESET )
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
return (FlagStatus)bitstatus;
}
/**
* @brief Clears the TIM5抯 pending flags.
* @param[in] TIM5_FLAG specifies the flag to clear.
* This parameter can be one of the following values:
* - TIM5_FLAG_UPDATE: TIM5 update Flag
* - TIM5_FLAG_CC1: TIM5 Capture Compare 1 Flag
* - TIM5_FLAG_CC2: TIM5 Capture Compare 2 Flag
* - TIM5_FLAG_CC3: TIM5 Capture Compare 3 Flag
* - TIM5_FLAG_CC1OF: TIM5 Capture Compare 1 overcapture Flag
* - TIM5_FLAG_CC2OF: TIM5 Capture Compare 2 overcapture Flag
* - TIM5_FLAG_CC3OF: TIM5 Capture Compare 3 overcapture Flag
* @retval None.
*/
void TIM5_ClearFlag(TIM5_FLAG_TypeDef TIM5_FLAG)
{
/* Check the parameters */
assert_param(IS_TIM5_CLEAR_FLAG_OK(TIM5_FLAG));
/* Clear the flags (rc_w0) clear this bit by writing 0. Writing
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