📄 stm8s_uart2.c
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/* UART2_FLAG is reset*/
status = RESET;
}
}
else if (UART2_FLAG == UART2_FLAG_SBK)
{
if ((UART2->CR2 & (u8)UART2_FLAG) != (u8)0x00)
{
/* UART2_FLAG is set*/
status = SET;
}
else
{
/* UART2_FLAG is reset*/
status = RESET;
}
}
else if ((UART2_FLAG == UART2_FLAG_LHDF) || (UART2_FLAG == UART2_FLAG_LSF))
{
if ((UART2->CR6 & (u8)UART2_FLAG) != (u8)0x00)
{
/* UART2_FLAG is set*/
status = SET;
}
else
{
/* UART2_FLAG is reset*/
status = RESET;
}
}
else
{
if ((UART2->SR & (u8)UART2_FLAG) != (u8)0x00)
{
/* UART2_FLAG is set*/
status = SET;
}
else
{
/* UART2_FLAG is reset*/
status = RESET;
}
}
/* Return the UART2_FLAG status*/
return status;
}
/**
* @brief Clears the UART2 flags.
* @par Full description:
* Clears the UART2 flags.
* @param[in] UART2_FLAG specifies the flag to clear
* This parameter can be any combination of the following values:
* - UART2_FLAG_LBDF: LIN Break detection flag.
* - UART2_FLAG_LHDF: LIN Header detection flag.
* - UART2_FLAG_LSF: LIN synchrone field flag.
* - UART2_FLAG_RXNE: Receive data register not empty flag.
* @par Notes:
* - PE (Parity error), FE (Framing error), NE (Noise error), OR (OverRun error)
* and IDLE (Idle line detected) flags are cleared by software sequence: a read
* operation to UART2_SR register (UART2_GetFlagStatus())followed by a read operation
* to UART2_DR register(UART2_ReceiveData8() or UART2_ReceiveData9()).
* - RXNE flag can be also cleared by a read to the UART2_DR register
* (UART2_ReceiveData8()or UART2_ReceiveData9()).
* - TC flag can be also cleared by software sequence: a read operation to UART2_SR
* register (UART2_GetFlagStatus()) followed by a write operation to UART2_DR register
* (UART2_SendData8() or UART2_SendData9()).
* - TXE flag is cleared only by a write to the UART2_DR register (UART2_SendData8() or
* UART2_SendData9()).
* - SBK flag is cleared during the stop bit of break.
* @retval None
*/
void UART2_ClearFlag(UART2_Flag_TypeDef UART2_FLAG)
{
assert_param(IS_UART2_CLEAR_FLAG_OK(UART2_FLAG));
/*< Clear the Receive Register Not Empty flag */
if (UART2_FLAG == UART2_FLAG_RXNE)
{
UART2->SR = (u8)~(UART2_SR_RXNE);
}
/*< Clear the LIN Break Detection flag */
else if (UART2_FLAG == UART2_FLAG_LBDF)
{
UART2->CR4 &= (u8)(~UART2_CR4_LBDF);
}
/*< Clear the LIN Header Detection Flag */
else if (UART2_FLAG == UART2_FLAG_LHDF)
{
UART2->CR6 &= (u8)(~UART2_CR6_LHDF);
}
/*< Clear the LIN Synch Field flag */
else
{
UART2->CR6 &= (u8)(~UART2_CR6_LSF);
}
}
/**
* @brief Checks whether the specified UART2 interrupt has occurred or not.
* @par Full description:
* Checks whether the specified UART2 interrupt has occurred or not.
* @param[in] UART2_IT: Specifies the UART2 interrupt pending bit to check.
* This parameter can be one of the following values:
* - UART2_IT_LBDF: LIN Break detection interrupt
* - UART2_IT_TXE: Tansmit Data Register empty interrupt
* - UART2_IT_TC: Transmission complete interrupt
* - UART2_IT_RXNE: Receive Data register not empty interrupt
* - UART2_IT_IDLE: Idle line detection interrupt
* - UART2_IT_OR: OverRun Error interrupt
* - UART2_IT_PE: Parity Error interrupt
* @retval
* ITStatus The new state of UART2_IT (SET or RESET).
*/
ITStatus UART2_GetITStatus(UART2_IT_TypeDef UART2_IT)
{
ITStatus pendingbitstatus = RESET;
u8 itpos = 0;
u8 itmask1 = 0;
u8 itmask2 = 0;
u8 enablestatus = 0;
/* Check parameters */
assert_param(IS_UART2_GET_IT_OK(UART2_IT));
/* Get the UART2 IT index*/
itpos = (u8)((u8)1 << (u8)((u8)UART2_IT & (u8)0x0F));
/* Get the UART2 IT index*/
itmask1 = (u8)((u8)UART2_IT >> (u8)4);
/* Set the IT mask*/
itmask2 = (u8)((u8)1 << itmask1);
/* Check the status of the specified UART2 pending bit*/
if (UART2_IT == UART2_IT_PE)
{
/* Get the UART2_ITPENDINGBIT enable bit status*/
enablestatus = (u8)((u8)UART2->CR1 & itmask2);
/* Check the status of the specified UART2 interrupt*/
if (((UART2->SR & itpos) != (u8)0x00) && enablestatus)
{
/* Interrupt occurred*/
pendingbitstatus = SET;
}
else
{
/* Interrupt not occurred*/
pendingbitstatus = RESET;
}
}
else if (UART2_IT == UART2_IT_LBDF)
{
/* Get the UART2_IT enable bit status*/
enablestatus = (u8)((u8)UART2->CR4 & itmask2);
/* Check the status of the specified UART2 interrupt*/
if (((UART2->CR4 & itpos) != (u8)0x00) && enablestatus)
{
/* Interrupt occurred*/
pendingbitstatus = SET;
}
else
{
/* Interrupt not occurred*/
pendingbitstatus = RESET;
}
}
else if (UART2_IT == UART2_IT_LHDF)
{
/* Get the UART2_IT enable bit status*/
enablestatus = (u8)((u8)UART2->CR6 & itmask2);
/* Check the status of the specified UART2 interrupt*/
if (((UART2->CR6 & itpos) != (u8)0x00) && enablestatus)
{
/* Interrupt occurred*/
pendingbitstatus = SET;
}
else
{
/* Interrupt not occurred*/
pendingbitstatus = RESET;
}
}
else
{
/* Get the UART2_IT enable bit status*/
enablestatus = (u8)((u8)UART2->CR2 & itmask2);
/* Check the status of the specified UART2 interrupt*/
if (((UART2->SR & itpos) != (u8)0x00) && enablestatus)
{
/* Interrupt occurred*/
pendingbitstatus = SET;
}
else
{
/* Interrupt not occurred*/
pendingbitstatus = RESET;
}
}
/* Return the UART2_IT status*/
return pendingbitstatus;
}
/**
* @brief Clears the UART2 pending flags.
* @par Full description:
* Clears the UART2 pending bit.
* @param[in] UART2_IT specifies the pending bit to clear
* This parameter can be one of the following values:
* - UART2_IT_LBDF: LIN Break detection interrupt
* - UART2_IT_LHDF: LIN Header detection interrupt
* - UART2_IT_RXNE: Receive Data register not empty interrupt.
*
* @par Notes:
* - PE (Parity error), FE (Framing error), NE (Noise error), OR (OverRun error) and
* IDLE (Idle line detected) pending bits are cleared by software sequence: a read
* operation to UART2_SR register (UART2_GetITStatus()) followed by a read operation
* to UART2_DR register (UART2_ReceiveData8() or UART2_ReceiveData9() ).
* - RXNE pending bit can be also cleared by a read to the UART2_DR register
* (UART2_ReceiveData8() or UART2_ReceiveData9() ).
* - TC (Transmit complet) pending bit can be cleared by software sequence: a read
* operation to UART2_SR register (UART2_GetITStatus()) followed by a write operation
* to UART2_DR register (UART2_SendData8()or UART2_SendData9()).
* - TXE pending bit is cleared only by a write to the UART2_DR register
* (UART2_SendData8() or UART2_SendData9()).
* @retval None
*/
void UART2_ClearITPendingBit(UART2_IT_TypeDef UART2_IT)
{
assert_param(IS_UART2_CLEAR_IT_OK(UART2_IT));
/*< Clear the Receive Register Not Empty pending bit */
if (UART2_IT == UART2_IT_RXNE)
{
UART2->SR = (u8)~(UART2_SR_RXNE);
}
/*< Clear the LIN Break Detection pending bit */
else if (UART2_IT == UART2_IT_LBDF)
{
UART2->CR4 &= (u8)~(UART2_CR4_LBDF);
}
/*< Clear the LIN Header Detection pending bit */
else
{
UART2->CR6 &= (u8)(~UART2_CR6_LHDF);
}
}
//串口输出一个字符
void putChr(char a)
{
UART2_SendData8(a);
}
//串口输出单行单个字符
void putChrLine(char a)
{
putChr(a);
putChr('\r');
putChr('\n');
}
//串口输出一个字符串
void putStr(char* a)
{
int i=0;
for(i=0;i<strlen(a);i++)
{
putChr(a[i]);
}
}
//串口输出单行字符串
void putStrLine(char *a)
{
putStr(a);
putChr('\r');
putChr('\n');
}
//串口输出十进制整数
void putInt(unsigned long num)
{
if(num>=10000000)putChr(num%100000000/10000000+'0');
if(num>=1000000)putChr(num%10000000/1000000+'0');
if(num>=100000)putChr(num%1000000/100000+'0');
if(num>=10000)putChr(num%100000/10000+'0');
if(num>=1000)putChr(num%10000/1000+'0');
if(num>=100)putChr(num%1000/100+'0');
if(num>=10)putChr(num%100/10+'0');
if(num>=0)putChr(num%10+'0');
}
//串出输出单行的数字
void putIntLine(unsigned long num)
{
putInt(num);
putChr('\r');
putChr('\n');
}
//输出十六进制值
void putHex(unsigned char* buf,unsigned long bufSize)
{
unsigned long i=0;
for(i=0;i<bufSize;i++)
{
putChr(buf[i]);
}
}
/**
* @}
*/
/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
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