stm8s_uart2.h

STM8s

/**
  ********************************************************************************
  * @file stm8s_uart2.h
  * @brief This file contains all functions prototypes and macros for the UART2 peripheral.
  * @author STMicroelectronics - MCD Application Team
  * @version V1.1.1
  * @date 06/05/2009
  ******************************************************************************
  *
  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
  *
  * <h2><center>&copy; COPYRIGHT 2009 STMicroelectronics</center></h2>
  * @image html logo.bmp
  ******************************************************************************
  */

/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM8S_UART2_H
#define __STM8S_UART2_H

/* Includes ------------------------------------------------------------------*/
#include "stm8s.h"
/* Exported types ------------------------------------------------------------*/

/** @addtogroup UART2_Exported_Types
  * @{
  */

/**
  * @brief UART2 Irda Modes
  */

typedef enum { UART2_IRDAMODE_NORMAL         = (u8)0x00, /**< 0x00 Irda Normal Mode   */
               UART2_IRDAMODE_LOWPOWER       = (u8)0x01  /**< 0x01 Irda Low Power Mode */

             } UART2_IrDAMode_TypeDef;

/**
  * @brief UART2 WakeUP Modes
  */

typedef enum { UART2_WAKEUP_IDLELINE       = (u8)0x00, /**< 0x01 Idle Line wake up                */
               UART2_WAKEUP_ADDRESSMARK    = (u8)0x08  /**< 0x02 Address Mark wake up          */
             } UART2_WakeUp_TypeDef;


/**
  * @brief UART2 LIN Break detection length possible values
  */
typedef enum { UART2_LINBREAKDETECTIONLENGTH_10BITS = (u8)0x00, /**< 0x01 10 bits Lin Break detection            */
               UART2_LINBREAKDETECTIONLENGTH_11BITS = (u8)0x01  /**< 0x02 11 bits Lin Break detection          */
             } UART2_LINBreakDetectionLength_TypeDef;

/**
  * @brief UART2 stop bits possible values
  */

typedef enum { UART2_STOPBITS_1   = (u8)0x00,    /**< One stop bit is  transmitted at the end of frame*/
               UART2_STOPBITS_0_5 = (u8)0x10,    /**< Half stop bits is transmitted at the end of frame*/
               UART2_STOPBITS_2  = (u8)0x20,    /**< Two stop bits are  transmitted at the end of frame*/
               UART2_STOPBITS_1_5 = (u8)0x30     /**< One and half stop bits*/
             } UART2_StopBits_TypeDef;


/**
  * @brief UART2 parity possible values
  */
typedef enum { UART2_PARITY_NO     = (u8)0x00,      /**< No Parity*/
               UART2_PARITY_EVEN   = (u8)0x04,      /**< Even Parity*/
               UART2_PARITY_ODD    = (u8)0x06       /**< Odd Parity*/
             } UART2_Parity_TypeDef;
/**
  * @brief UART2 Mode possible values
  */
typedef enum { UART2_LIN_MODE_MASTER  = (u8)0x00, /**<  LIN Master Mode*/
               UART2_LIN_MODE_SLAVE   = (u8)0x01  /**<  LIN Slave Mode*/
             } UART2_LinMode_TypeDef;
/**
  * @brief UART2 automatic resynchronisation possible values
  */
typedef enum { UART2_LIN_AUTOSYNC_DISABLE   = (u8)0x00,  /**< LIN Autosynchronization Disable*/
               UART2_LIN_AUTOSYNC_ENABLE    = (u8)0x01   /**< LIN Autosynchronization Enable*/
             } UART2_LinAutosync_TypeDef;
/**
  * @brief UART2 Divider Update Method possible values
  */
typedef enum { UART2_LIN_DIVUP_LBRR1    = (u8)0x00, /**<  LIN LDIV is updated as soon as LBRR1 is written*/
               UART2_LIN_DIVUP_NEXTRXNE = (u8)0x01  /**<  LIN LDIV is updated at the next received character*/
             } UART2_LinDivUp_TypeDef;

/**
  * @brief UART2 Synchrone modes
  */
typedef enum { UART2_SYNCMODE_CLOCK_DISABLE    = (u8)0x80, /**< 0x80 Sync mode Disable, SLK pin Disable */
               UART2_SYNCMODE_CLOCK_ENABLE     = (u8)0x08, /**< 0x08 Sync mode Enable, SLK pin Enable     */
               UART2_SYNCMODE_CPOL_LOW         = (u8)0x40, /**< 0x40 Steady low value on SCLK pin outside transmission window */
               UART2_SYNCMODE_CPOL_HIGH        = (u8)0x04, /**< 0x04 Steady high value on SCLK pin outside transmission window */
               UART2_SYNCMODE_CPHA_MIDDLE      = (u8)0x20, /**< 0x20 SCLK clock line activated in middle of data bit     */
               UART2_SYNCMODE_CPHA_BEGINING    = (u8)0x02, /**< 0x02 SCLK clock line activated at beginning of data bit  */
               UART2_SYNCMODE_LASTBIT_DISABLE  = (u8)0x10, /**< 0x10 The clock pulse of the last data bit is not output to the SCLK pin */
               UART2_SYNCMODE_LASTBIT_ENABLE   = (u8)0x01  /**< 0x01 The clock pulse of the last data bit is output to the SCLK pin */
             } UART2_SyncMode_TypeDef;

/**
  * @brief UART2 Word length possible values
  */
typedef enum { UART2_WORDLENGTH_8D = (u8)0x00,/**< 0x00 8 bits Data  */
               UART2_WORDLENGTH_9D = (u8)0x10 /**< 0x10 9 bits Data  */
             } UART2_WordLength_TypeDef;

/**
  * @brief UART2 Mode possible values
  */
typedef enum { UART2_MODE_RX_ENABLE     = (u8)0x08,  /**< 0x08 Receive Enable                     */
               UART2_MODE_TX_ENABLE     = (u8)0x04,  /**< 0x04 Transmit Enable                    */
               UART2_MODE_TX_DISABLE    = (u8)0x80,  /**< 0x80 Transmit Disable                   */
               UART2_MODE_RX_DISABLE    = (u8)0x40,  /**< 0x40 Single-wire Half-duplex mode       */
               UART2_MODE_TXRX_ENABLE   = (u8)0x0C  /**< 0x0C Transmit Enable and Receive Enable */
             } UART2_Mode_TypeDef;
/**
  * @brief UART2 Flag possible values
  */
typedef enum
{
  UART2_FLAG_TXE          = (u16)0x0080, /*!< Transmit Data Register Empty flag */
  UART2_FLAG_TC           = (u16)0x0040, /*!< Transmission Complete flag */
  UART2_FLAG_RXNE         = (u16)0x0020, /*!< Read Data Register Not Empty flag */
  UART2_FLAG_IDLE         = (u16)0x0010, /*!< Idle line detected flag */
  UART2_FLAG_OR_LHE       = (u16)0x0008, /*!< OverRun error flag */
  UART2_FLAG_NF           = (u16)0x0004, /*!< Noise error flag */
  UART2_FLAG_FE           = (u16)0x0002, /*!< Framing Error flag */
  UART2_FLAG_PE           = (u16)0x0001, /*!< Parity Error flag */
  UART2_FLAG_SBK          = (u16)0x0101,  /**< Send Break Complete interrupt flag */
  UART2_FLAG_LBDF         = (u16)0x0210, /**< LIN Break Detection Flag           */
  UART2_FLAG_LHDF         = (u16)0x0302, /**< LIN Header Detection Flag*/
  UART2_FLAG_LSF          = (u16)0x0301  /**< LIN Sync Field Flag*/
} UART2_Flag_TypeDef;

/**
  * @brief UART2 Interrupt definition
  * UART2_IT possible values
  * Elements values convention: 0xZYX
  * X: Position of the corresponding Interrupt
  *   - For the following values, X means the interrupt position in the CR2 register.
  *     UART2_IT_TXE
  *     UART2_IT_TC
  *     UART2_IT_RXNE
  *     UART2_IT_IDLE 
  *     UART2_IT_OR 
  *   - For the UART2_IT_PE value, X means the flag position in the CR1 register.
  *   - For the UART2_IT_LBDF value, X means the flag position in the CR4 register.
  *   - For the UART2_IT_LHDF value, X means the flag position in the CR6 register.
  * Y: Flag position
  *  - For the following values, Y means the flag (pending bit) position in the SR register.
  *     UART2_IT_TXE
  *     UART2_IT_TC
  *     UART2_IT_RXNE
  *     UART2_IT_IDLE 
  *     UART2_IT_OR
  *     UART2_IT_PE
  *  - For the UART2_IT_LBDF value, Y means the flag position in the CR4 register.
  *  - For the UART2_IT_LHDF value, Y means the flag position in the CR6 register.
  * Z: Register index: indicate in which register the dedicated interrupt source is:
  *  - 1==> CR1 register
  *  - 2==> CR2 register
  *  - 3==> CR4 register
  *  - 4==> CR6 register
  */
typedef enum { UART2_IT_TXE        = (u16)0x0277, /**< Transmit interrupt */
               UART2_IT_TC         = (u16)0x0266, /**< Transmission Complete interrupt */
               UART2_IT_RXNE       = (u16)0x0255, /**< Data Register Not Empty interrupt */
               UART2_IT_IDLE       = (u16)0x0244, /**< Idle line detected interrupt */
               UART2_IT_OR         = (u16)0x0235, /**< OverRun error interrupt */
               UART2_IT_PE         = (u16)0x0100, /**< Parity Error interrupt */
               UART2_IT_LBDF       = (u16)0x0346, /**< LIN Break Detection interrupt */
               UART2_IT_LHDF       = (u16)0x0412, /**< LIN Header Detection interrupt*/
               UART2_IT_RXNE_OR    = (u16)0x0205  /*!< Receive/Overrun interrupt */
             } UART2_IT_TypeDef;

/**
  * @}
  */

/* Exported constants --------------------------------------------------------*/
/* Exported macros ------------------------------------------------------------*/

/* Private macros ------------------------------------------------------------*/

/** @addtogroup UART2_Private_Macros
  * @{
  */

/**
  * @brief Macro used by the assert function to check the different functions parameters.
  */

/**
 * @brief Macro used by the assert_param function in order to check the different sensitivity
 * values for the MODEs possible combination should be one of the following.
 */
 
#define IS_UART2_MODE_OK(Mode) \
  (((Mode) == (u8)UART2_MODE_RX_ENABLE) || \
   ((Mode) == (u8)UART2_MODE_RX_DISABLE) || \
   ((Mode) == (u8)UART2_MODE_TX_ENABLE) || \
   ((Mode) == (u8)UART2_MODE_TX_DISABLE) || \
   ((Mode) == (u8)UART2_MODE_TXRX_ENABLE) || \
   ((Mode) == (u8)((u8)UART2_MODE_TX_ENABLE|(u8)UART2_MODE_RX_ENABLE)) || \
   ((Mode) == (u8)((u8)UART2_MODE_TX_ENABLE|(u8)UART2_MODE_RX_DISABLE)) || \
   ((Mode) == (u8)((u8)UART2_MODE_TX_DISABLE|(u8)UART2_MODE_RX_DISABLE)) || \
   ((Mode) == (u8)((u8)UART2_MODE_TX_DISABLE|(u8)UART2_MODE_RX_ENABLE)))

/**