📄 stm8s_uart1.c
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* @retval
* None
*/
void UART1_WakeUpConfig(UART1_WakeUp_TypeDef UART1_WakeUp)
{
assert_param(IS_UART1_WAKEUP_OK(UART1_WakeUp));
UART1->CR1 &= ((u8)~UART1_CR1_WAKE);
UART1->CR1 |= (u8)UART1_WakeUp;
}
/**
* @brief Determines if the UART1 is in mute mode or not.
* @par Full description:
* Determines if the UART1 is in mute mode or not.
* @param[in] NewState: new state of the UART1 mode.
* This parameter can be: ENABLE or DISABLE.
* @retval
* None
*/
void UART1_ReceiverWakeUpCmd(FunctionalState NewState)
{
assert_param(IS_FUNCTIONALSTATE_OK(NewState));
if (NewState != DISABLE)
{
/* Enable the mute mode UART1 by setting the RWU bit in the CR2 register */
UART1->CR2 |= UART1_CR2_RWU;
}
else
{
/* Disable the mute mode UART1 by clearing the RWU bit in the CR1 register */
UART1->CR2 &= ((u8)~UART1_CR2_RWU);
}
}
/**
* @brief Returns the most recent received data by the UART1 peripheral.
* @par Full description:
* Returns the most recent received data by the UART1 peripheral.
* @retval u8 Received Data
* @par Required preconditions:
* UART1_Cmd(ENABLE);
*/
u8 UART1_ReceiveData8(void)
{
return ((u8)UART1->DR);
}
/**
* @brief Returns the most recent received data by the UART1 peripheral.
* @par Full description:
* Returns the most recent received data by the UART1 peripheral.
* @retval u16 Received Data
* @par Required preconditions:
* UART1_Cmd(ENABLE);
*/
u16 UART1_ReceiveData9(void)
{
return (u16)( (((u16) UART1->DR) | ((u16)(((u16)( (u16)UART1->CR1 & (u16)UART1_CR1_R8)) << 1))) & ((u16)0x01FF));
}
/**
* @brief Transmits 8 bit data through the UART1 peripheral.
* @par Full description:
* Transmits 8 bit data through the UART1 peripheral.
* @param[in] Data: the data to transmit.
* @retval
* None
* @par Required preconditions:
* UART1_Cmd(ENABLE);
*/
void UART1_SendData8(u8 Data)
{
/* Transmit Data */
UART1->DR = Data;
}
/**
* @brief Transmits 9 bit data through the UART1 peripheral.
* @par Full description:
* Transmits 9 bit data through the UART1 peripheral.
* @param[in] Data: the data to transmit.
* @retval
* None
* @par Required preconditions:
* UART1_Cmd(ENABLE);
*/
void UART1_SendData9(u16 Data)
{
/**< Clear the transmit data bit 8 [8] */
UART1->CR1 &= ((u8)~UART1_CR1_T8);
/**< Write the transmit data bit [8] */
UART1->CR1 |= (u8)(((u8)(Data >> 2)) & UART1_CR1_T8);
/**< Write the transmit data bit [0:7] */
UART1->DR = (u8)(Data);
}
/**
* @brief Transmits break characters.
* @par Full description:
* Transmits break characters on the UART1 peripheral.
* @retval
* None
*/
void UART1_SendBreak(void)
{
UART1->CR2 |= UART1_CR2_SBK;
}
/**
* @brief Sets the address of the UART1 node.
* @par Full description:
* Sets the address of the UART1 node.
* @param[in] UART1_Address: Indicates the address of the UART1 node.
* @retval
* None
*/
void UART1_SetAddress(u8 UART1_Address)
{
/*assert_param for UART1_Address*/
assert_param(IS_UART1_ADDRESS_OK(UART1_Address));
/* Clear the UART1 address */
UART1->CR4 &= ((u8)~UART1_CR4_ADD);
/* Set the UART1 address node */
UART1->CR4 |= UART1_Address;
}
/**
* @brief Sets the specified UART1 guard time.
* @par Full description:
* Sets the address of the UART1 node.
* @par This function is related to SmartCard mode.
* @param[in] UART1_GuardTime: specifies the guard time.
* @retval
* None
* @par Required preconditions:
* SmartCard Mode Enabled
*/
void UART1_SetGuardTime(u8 UART1_GuardTime)
{
/* Set the UART1 guard time */
UART1->GTR = UART1_GuardTime;
}
/**
* @brief Sets the system clock prescaler.
* @par Full description:
* Sets the system clock prescaler.
* @par This function is related to SmartCard and IrDa mode.
* @param[in] UART1_Prescaler: specifies the prescaler clock.
* This parameter can be one of the following values:
* @par IrDA Low Power Mode
* The clock source is diveded by the value given in the register (8 bits)
* - 0000 0000 Reserved
* - 0000 0001 divides the clock source by 1
* - 0000 0010 divides the clock source by 2
* - ...........................................................
* @par Smart Card Mode
* The clock source is diveded by the value given in the register (5 significant bits) multipied by 2
* - 0 0000 Reserved
* - 0 0001 divides the clock source by 2
* - 0 0010 divides the clock source by 4
* - 0 0011 divides the clock source by 6
* - ...........................................................
* @retval
* None
*/
void UART1_SetPrescaler(u8 UART1_Prescaler)
{
/* Load the UART1 prescaler value*/
UART1->PSCR = UART1_Prescaler;
}
/**
* @brief Checks whether the specified UART1 flag is set or not.
* @par Full description:
* Checks whether the specified UART1 flag is set or not.
* @param[in] UART1_FLAG specifies the flag to check.
* This parameter can be any of the @ref UART1_Flag_TypeDef enumeration.
* @retval FlagStatus (SET or RESET)
*/
FlagStatus UART1_GetFlagStatus(UART1_Flag_TypeDef UART1_FLAG)
{
FlagStatus status = RESET;
/* Check parameters */
assert_param(IS_UART1_FLAG_OK(UART1_FLAG));
/* Check the status of the specified UART1 flag*/
if (UART1_FLAG == UART1_FLAG_LBDF)
{
if ((UART1->CR4 & (u8)UART1_FLAG) != (u8)0x00)
{
/* UART1_FLAG is set*/
status = SET;
}
else
{
/* UART1_FLAG is reset*/
status = RESET;
}
}
else if (UART1_FLAG == UART1_FLAG_SBK)
{
if ((UART1->CR2 & (u8)UART1_FLAG) != (u8)0x00)
{
/* UART1_FLAG is set*/
status = SET;
}
else
{
/* UART1_FLAG is reset*/
status = RESET;
}
}
else
{
if ((UART1->SR & (u8)UART1_FLAG) != (u8)0x00)
{
/* UART1_FLAG is set*/
status = SET;
}
else
{
/* UART1_FLAG is reset*/
status = RESET;
}
}
/* Return the UART1_FLAG status*/
return status;
}
/**
* @brief Clears the UART1 flags.
* @par Full description:
* Clears the UART1 flags.
* @param[in] UART1_FLAG specifies the flag to clear
* This parameter can be any combination of the following values:
* - UART1_FLAG_LBDF: LIN Break detection flag.
* - UART1_FLAG_RXNE: Receive data register not empty flag.
* @par Notes:
* - PE (Parity error), FE (Framing error), NE (Noise error), OR (OverRun error)
* and IDLE (Idle line detected) flags are cleared by software sequence: a read
* operation to UART1_SR register (UART1_GetFlagStatus())followed by a read operation
* to UART1_DR register(UART1_ReceiveData8() or UART1_ReceiveData9()).
* - RXNE flag can be also cleared by a read to the UART1_DR register
* (UART1_ReceiveData8()or UART1_ReceiveData9()).
* - TC flag can be also cleared by software sequence: a read operation to UART1_SR
* register (UART1_GetFlagStatus()) followed by a write operation to UART1_DR register
* (UART1_SendData8() or UART1_SendData9()).
* - TXE flag is cleared only by a write to the UART1_DR register (UART1_SendData8() or
* UART1_SendData9()).
* - SBK flag is cleared during the stop bit of break.
* @retval
* None
*/
void UART1_ClearFlag(UART1_Flag_TypeDef UART1_FLAG)
{
assert_param(IS_UART1_CLEAR_FLAG_OK(UART1_FLAG));
/* Clear the Receive Register Not Empty flag */
if (UART1_FLAG == UART1_FLAG_RXNE)
{
UART1->SR = (u8)~(UART1_SR_RXNE);
}
/* Clear the LIN Break Detection flag */
else
{
UART1->CR4 &= (u8)~(UART1_CR4_LBDF);
}
}
/**
* @brief Checks whether the specified UART1 interrupt has occurred or not.
* @par Full description:
* Checks whether the specified UART1 interrupt has occurred or not.
* @param[in] UART1_IT: Specifies the UART1 interrupt pending bit to check.
* This parameter can be one of the following values:
* - UART1_IT_LBDF: LIN Break detection interrupt
* - UART1_IT_TXE: Tansmit Data Register empty interrupt
* - UART1_IT_TC: Transmission complete interrupt
* - UART1_IT_RXNE: Receive Data register not empty interrupt
* - UART1_IT_IDLE: Idle line detection interrupt
* - UART1_IT_OR: OverRun Error interrupt
* - UART1_IT_PE: Parity Error interrupt
* @retval
* ITStatus The new state of UART1_IT (SET or RESET).
*/
ITStatus UART1_GetITStatus(UART1_IT_TypeDef UART1_IT)
{
ITStatus pendingbitstatus = RESET;
u8 itpos = 0;
u8 itmask1 = 0;
u8 itmask2 = 0;
u8 enablestatus = 0;
/* Check parameters */
assert_param(IS_UART1_GET_IT_OK(UART1_IT));
/* Get the UART1 IT index */
itpos = (u8)((u8)1 << (u8)((u8)UART1_IT & (u8)0x0F));
/* Get the UART1 IT index */
itmask1 = (u8)((u8)UART1_IT >> (u8)4);
/* Set the IT mask*/
itmask2 = (u8)((u8)1 << itmask1);
/* Check the status of the specified UART1 pending bit*/
if (UART1_IT == UART1_IT_PE)
{
/* Get the UART1_IT enable bit status*/
enablestatus = (u8)((u8)UART1->CR1 & itmask2);
/* Check the status of the specified UART1 interrupt*/
if (((UART1->SR & itpos) != (u8)0x00) && enablestatus)
{
/* Interrupt occurred*/
pendingbitstatus = SET;
}
else
{
/* Interrupt not occurred*/
pendingbitstatus = RESET;
}
}
else if (UART1_IT == UART1_IT_LBDF)
{
/* Get the UART1_IT enable bit status*/
enablestatus = (u8)((u8)UART1->CR4 & itmask2);
/* Check the status of the specified UART1 interrupt*/
if (((UART1->CR4 & itpos) != (u8)0x00) && enablestatus)
{
/* Interrupt occurred*/
pendingbitstatus = SET;
}
else
{
/* Interrupt not occurred*/
pendingbitstatus = RESET;
}
}
else
{
/* Get the UART1_IT enable bit status*/
enablestatus = (u8)((u8)UART1->CR2 & itmask2);
/* Check the status of the specified UART1 interrupt*/
if (((UART1->SR & itpos) != (u8)0x00) && enablestatus)
{
/* Interrupt occurred*/
pendingbitstatus = SET;
}
else
{
/* Interrupt not occurred*/
pendingbitstatus = RESET;
}
}
/* Return the UART1_IT status*/
return pendingbitstatus;
}
/**
* @brief Clears the UART1 pending flags.
* @par Full description:
* Clears the UART1 pending bit.
* @param[in] UART1_IT specifies the pending bit to clear
* This parameter can be one of the following values:
* - UART1_IT_LBDF: LIN Break detection interrupt
* - UART1_IT_RXNE: Receive Data register not empty interrupt.
* @par Notes:
* - PE (Parity error), FE (Framing error), NE (Noise error), OR (OverRun error) and
* IDLE (Idle line detected) pending bits are cleared by software sequence: a read
* operation to UART1_SR register (UART1_GetITStatus()) followed by a read operation
* to UART1_DR register (UART1_ReceiveData8() or UART1_ReceiveData9()).
* - RXNE pending bit can be also cleared by a read to the UART1_DR register
* (UART1_ReceiveData8() or UART1_ReceiveData9()).
* - TC (Transmit complet) pending bit can be cleared by software sequence: a read
* operation to UART1_SR register (UART1_GetITStatus()) followed by a write operation
* to UART1_DR register (UART1_SendData8()or UART1_SendData9()).
* - TXE pending bit is cleared only by a write to the UART1_DR register
* (UART1_SendData8() or UART1_SendData9()).
* @retval
* None
*/
void UART1_ClearITPendingBit(UART1_IT_TypeDef UART1_IT)
{
assert_param(IS_UART1_CLEAR_FLAG_OK(UART1_IT));
/*< Clear the Receive Register Not Empty pending bit */
if (UART1_IT == UART1_IT_RXNE)
{
UART1->SR = (u8)~(UART1_SR_RXNE);
}
/*< Clear the LIN Break Detection pending bit */
else
{
UART1->CR4 &= (u8)~(UART1_CR4_LBDF);
}
}
/**
* @}
*/
/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
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