📄 stm8s_uart3.c
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/**
* @brief Returns the most recent received data by the UART3 peripheral.
* @par Full description:
* Returns the most recent received data by the UART3 peripheral.
* @retval u16 Received Data
* @par Required preconditions:
* UART3_Cmd(ENABLE);
*/
u8 UART3_ReceiveData8(void)
{
return ((u8)UART3->DR);
}
/**
* @brief Returns the most recent received data by the UART3 peripheral.
* @par Full description:
* Returns the most recent received data by the UART3 peripheral.
* @retval u16 Received Data
* @par Required preconditions:
* UART3_Cmd(ENABLE);
*/
u16 UART3_ReceiveData9(void)
{
return (u16)((((u16)UART3->DR) | ((u16)(((u16)((u16)UART3->CR1 & (u16)UART3_CR1_R8)) << 1))) & ((u16)0x01FF));
}
/**
* @brief Transmits 8 bit data through the UART3 peripheral.
* @par Full description:
* Transmits 8 bit data through the UART3 peripheral.
* @param[in] Data: the data to transmit.
* @retval
* None
* @par Required preconditions:
* UART3_Cmd(ENABLE);
*/
void UART3_SendData8(u8 Data)
{
/* Transmit Data */
UART3->DR = Data;
}
/**
* @brief Transmits 9 bit data through the UART3 peripheral.
* @par Full description:
* Transmits 9 bit data through the UART3 peripheral.
* @param[in] Data: the data to transmit.
* @retval
* None
* @par Required preconditions:
* UART3_Cmd(ENABLE);
*/
void UART3_SendData9(u16 Data)
{
UART3->CR1 &= ((u8)~UART3_CR1_T8); /**< Clear the transmit data bit 8 */
UART3->CR1 |= (u8)(((u8)(Data >> 2)) & UART3_CR1_T8); /**< Write the transmit data bit [8] */
UART3->DR = (u8)(Data); /**< Write the transmit data bit [0:7] */
}
/**
* @brief Transmits break characters.
* @par Full description:
* Transmits break characters on the UART3 peripheral.
* @retval
* None
*/
void UART3_SendBreak(void)
{
UART3->CR2 |= UART3_CR2_SBK;
}
/**
* @brief Sets the address of the UART3 node.
* @par Full description:
* Sets the address of the UART3 node.
* @param[in] UART3_Address: Indicates the address of the UART3 node.
* @retval
* None
*/
void UART3_SetAddress(u8 UART3_Address)
{
/*assert_param for x UART3_Address*/
assert_param(IS_UART3_ADDRESS_OK(UART3_Address));
/* Clear the UART3 address */
UART3->CR4 &= ((u8)~UART3_CR4_ADD);
/* Set the UART3 address node */
UART3->CR4 |= UART3_Address;
}
/**
* @brief Checks whether the specified UART3 flag is set or not.
* @par Full description:
* Checks whether the specified UART3 flag is set or not.
* @param[in] UART3_FLAG specifies the flag to check.
* This parameter can be any of the @ref UART3_Flag_TypeDef enumeration.
* @retval FlagStatus (SET or RESET)
*/
FlagStatus UART3_GetFlagStatus(UART3_Flag_TypeDef UART3_FLAG)
{
FlagStatus status = RESET;
/* Check parameters */
assert_param(IS_UART3_FLAG_OK(UART3_FLAG));
/* Check the status of the specified UART3 flag*/
if (UART3_FLAG == UART3_FLAG_LBDF)
{
if ((UART3->CR4 & (u8)UART3_FLAG) != (u8)0x00)
{
/* UART3_FLAG is set*/
status = SET;
}
else
{
/* UART3_FLAG is reset*/
status = RESET;
}
}
else if (UART3_FLAG == UART3_FLAG_SBK)
{
if ((UART3->CR2 & (u8)UART3_FLAG) != (u8)0x00)
{
/* UART3_FLAG is set*/
status = SET;
}
else
{
/* UART3_FLAG is reset*/
status = RESET;
}
}
else if ((UART3_FLAG == UART3_FLAG_LHDF) || (UART3_FLAG == UART3_FLAG_LSF))
{
if ((UART3->CR6 & (u8)UART3_FLAG) != (u8)0x00)
{
/* UART3_FLAG is set*/
status = SET;
}
else
{
/* UART3_FLAG is reset*/
status = RESET;
}
}
else
{
if ((UART3->SR & (u8)UART3_FLAG) != (u8)0x00)
{
/* UART3_FLAG is set*/
status = SET;
}
else
{
/* UART3_FLAG is reset*/
status = RESET;
}
}
/* Return the UART3_FLAG status*/
return status;
}
/**
* @brief Clears the UART3 flags.
* @par Full description:
* Clears the UART3 flags.
* @param[in] UART3_FLAG specifies the flag to clear
* This parameter can be any combination of the following values:
* - UART3_FLAG_LBDF: LIN Break detection flag.
* - UART3_FLAG_LHDF: LIN Header detection flag.
* - UART3_FLAG_LSF: LIN synchrone field flag.
* - UART3_FLAG_RXNE: Receive data register not empty flag.
* @par Notes:
* - PE (Parity error), FE (Framing error), NF (Noise error), OR (OverRun error)
* and IDLE (Idle line detected) flags are cleared by software sequence: a read
* operation to UART3_SR register (UART3_GetFlagStatus())followed by a read operation
* to UART3_DR register(UART3_ReceiveData8() or UART3_ReceiveData9()).
* - RXNE flag can be also cleared by a read to the UART3_DR register
* (UART3_ReceiveData8()or UART3_ReceiveData9()).
* - TC flag can be also cleared by software sequence: a read operation to UART3_SR
* register (UART3_GetFlagStatus()) followed by a write operation to UART3_DR register
* (UART3_SendData8() or UART3_SendData9()).
* - TXE flag is cleared only by a write to the UART3_DR register (UART3_SendData8() or
* UART3_SendData9()).
* - SBK flag is cleared during the stop bit of break.
* @retval
* None
*/
void UART3_ClearFlag(UART3_Flag_TypeDef UART3_FLAG)
{
assert_param(IS_UART3_CLEAR_FLAG_OK(UART3_FLAG));
/*< Clear the Receive Register Not Empty flag */
if (UART3_FLAG == UART3_FLAG_RXNE)
{
UART3->SR = (u8)~(UART3_SR_RXNE);
}
/*< Clear the LIN Break Detection flag */
else if (UART3_FLAG == UART3_FLAG_LBDF)
{
UART3->CR4 &= (u8)(~UART3_CR4_LBDF);
}
/*< Clear the LIN Header Detection Flag */
else if (UART3_FLAG == UART3_FLAG_LHDF)
{
UART3->CR6 &= (u8)(~UART3_CR6_LHDF);
}
/*< Clear the LIN Synch Field flag */
else
{
UART3->CR6 &= (u8)(~UART3_CR6_LSF);
}
}
/**
* @brief Checks whether the specified UART3 interrupt has occurred or not.
* @par Full description:
* Checks whether the specified UART3 interrupt has occurred or not.
* @param[in] UART3_IT: Specifies the UART3 interrupt pending bit to check.
* This parameter can be one of the following values:
* - UART3_IT_LBDF: LIN Break detection interrupt
* - UART3_IT_TXE: Tansmit Data Register empty interrupt
* - UART3_IT_TC: Transmission complete interrupt
* - UART3_IT_RXNE: Receive Data register not empty interrupt
* - UART3_IT_IDLE: Idle line detection interrupt
* - UART3_IT_OR: OverRun Error interrupt
* - UART3_IT_PE: Parity Error interrupt
* @retval
* ITStatus The new state of UART3_IT (SET or RESET).
*/
ITStatus UART3_GetITStatus(UART3_IT_TypeDef UART3_IT)
{
ITStatus pendingbitstatus = RESET;
u8 itpos = 0;
u8 itmask1 = 0;
u8 itmask2 = 0;
u8 enablestatus = 0;
/* Check parameters */
assert_param(IS_UART3_GET_IT_OK(UART3_IT));
/* Get the UART3 IT index*/
itpos = (u8)((u8)1 << (u8)((u8)UART3_IT & (u8)0x0F));
/* Get the UART3 IT index*/
itmask1 = (u8)((u8)UART3_IT >> (u8)4);
/* Set the IT mask*/
itmask2 = (u8)((u8)1 << itmask1);
/* Check the status of the specified UART3 pending bit*/
if (UART3_IT == UART3_IT_PE)
{
/* Get the UART3_ITPENDINGBIT enable bit status*/
enablestatus = (u8)((u8)UART3->CR1 & itmask2);
/* Check the status of the specified UART3 interrupt*/
if (((UART3->SR & itpos) != (u8)0x00) && enablestatus)
{
/* Interrupt occurred*/
pendingbitstatus = SET;
}
else
{
/* Interrupt not occurred*/
pendingbitstatus = RESET;
}
}
else if (UART3_IT == UART3_IT_LBDF)
{
/* Get the UART3_IT enable bit status*/
enablestatus = (u8)((u8)UART3->CR4 & itmask2);
/* Check the status of the specified UART3 interrupt*/
if (((UART3->CR4 & itpos) != (u8)0x00) && enablestatus)
{
/* Interrupt occurred*/
pendingbitstatus = SET;
}
else
{
/* Interrupt not occurred*/
pendingbitstatus = RESET;
}
}
else if (UART3_IT == UART3_IT_LHDF)
{
/* Get the UART3_IT enable bit status*/
enablestatus = (u8)((u8)UART3->CR6 & itmask2);
/* Check the status of the specified UART3 interrupt*/
if (((UART3->CR6 & itpos) != (u8)0x00) && enablestatus)
{
/* Interrupt occurred*/
pendingbitstatus = SET;
}
else
{
/* Interrupt not occurred*/
pendingbitstatus = RESET;
}
}
else
{
/* Get the UART3_IT enable bit status*/
enablestatus = (u8)((u8)UART3->CR2 & itmask2);
/* Check the status of the specified UART3 interrupt*/
if (((UART3->SR & itpos) != (u8)0x00) && enablestatus)
{
/* Interrupt occurred*/
pendingbitstatus = SET;
}
else
{
/* Interrupt not occurred*/
pendingbitstatus = RESET;
}
}
/* Return the UART3_IT status*/
return pendingbitstatus;
}
/**
* @brief Clears the UART3 pending flags.
* @par Full description:
* Clears the UART3 pending bit.
* @param[in] UART3_IT specifies the pending bit to clear
* This parameter can be one of the following values:
* - UART3_IT_LBDF: LIN Break detection interrupt
* - UART3_IT_LHDF: LIN Header detection interrupt
* - UART3_IT_RXNE: Receive Data register not empty interrupt.
*
* @par Notes:
* - PE (Parity error), FE (Framing error), NF (Noise error), OR (OverRun error) and
* IDLE (Idle line detected) pending bits are cleared by software sequence: a read
* operation to UART3_SR register (UART3_GetITStatus()) followed by a read operation
* to UART3_DR register (UART3_ReceiveData8() or UART3_ReceiveData9() ).
* - RXNE pending bit can be also cleared by a read to the UART3_DR register
* (UART3_ReceiveData8() or UART3_ReceiveData9() ).
* - TC (Transmit complet) pending bit can be cleared by software sequence: a read
* operation to UART3_SR register (UART3_GetITStatus()) followed by a write operation
* to UART3_DR register (UART3_SendData8()or UART3_SendData9()).
* - TXE pending bit is cleared only by a write to the UART3_DR register
* (UART3_SendData8() or UART3_SendData9()).
* @retval
* None
*/
void UART3_ClearITPendingBit(UART3_IT_TypeDef UART3_IT)
{
assert_param(IS_UART3_CLEAR_IT_OK(UART3_IT));
/*< Clear the Receive Register Not Empty pending bit */
if (UART3_IT == UART3_IT_RXNE)
{
UART3->SR = (u8)~(UART3_SR_RXNE);
}
/*< Clear the LIN Break Detection pending bit */
else if (UART3_IT == UART3_IT_LBDF)
{
UART3->CR4 &= (u8)~(UART3_CR4_LBDF);
}
/*< Clear the LIN Header Detection pending bit */
else
{
UART3->CR6 &= (u8)(~UART3_CR6_LHDF);
}
}
/**
* @}
*/
/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
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