📄 stm8s_tim2.ls
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1 ; C Compiler for STM8 (COSMIC Software)
2 ; Generator V4.2.8 - 03 Dec 2008
32 ; 44 void TIM2_DeInit(void)
32 ; 45 {
34 switch .text
35 0000 _TIM2_DeInit:
39 ; 47 TIM2->CR1 = (u8)TIM2_CR1_RESET_VALUE;
41 0000 725f5300 clr 21248
42 ; 48 TIM2->IER = (u8)TIM2_IER_RESET_VALUE;
44 0004 725f5301 clr 21249
45 ; 49 TIM2->SR2 = (u8)TIM2_SR2_RESET_VALUE;
47 0008 725f5303 clr 21251
48 ; 52 TIM2->CCER1 = (u8)TIM2_CCER1_RESET_VALUE;
50 000c 725f5308 clr 21256
51 ; 53 TIM2->CCER2 = (u8)TIM2_CCER2_RESET_VALUE;
53 0010 725f5309 clr 21257
54 ; 57 TIM2->CCER1 = (u8)TIM2_CCER1_RESET_VALUE;
56 0014 725f5308 clr 21256
57 ; 58 TIM2->CCER2 = (u8)TIM2_CCER2_RESET_VALUE;
59 0018 725f5309 clr 21257
60 ; 59 TIM2->CCMR1 = (u8)TIM2_CCMR1_RESET_VALUE;
62 001c 725f5305 clr 21253
63 ; 60 TIM2->CCMR2 = (u8)TIM2_CCMR2_RESET_VALUE;
65 0020 725f5306 clr 21254
66 ; 61 TIM2->CCMR3 = (u8)TIM2_CCMR3_RESET_VALUE;
68 0024 725f5307 clr 21255
69 ; 62 TIM2->CNTRH = (u8)TIM2_CNTRH_RESET_VALUE;
71 0028 725f530a clr 21258
72 ; 63 TIM2->CNTRL = (u8)TIM2_CNTRL_RESET_VALUE;
74 002c 725f530b clr 21259
75 ; 64 TIM2->PSCR = (u8)TIM2_PSCR_RESET_VALUE;
77 0030 725f530c clr 21260
78 ; 65 TIM2->ARRH = (u8)TIM2_ARRH_RESET_VALUE;
80 0034 35ff530d mov 21261,#255
81 ; 66 TIM2->ARRL = (u8)TIM2_ARRL_RESET_VALUE;
83 0038 35ff530e mov 21262,#255
84 ; 67 TIM2->CCR1H = (u8)TIM2_CCR1H_RESET_VALUE;
86 003c 725f530f clr 21263
87 ; 68 TIM2->CCR1L = (u8)TIM2_CCR1L_RESET_VALUE;
89 0040 725f5310 clr 21264
90 ; 69 TIM2->CCR2H = (u8)TIM2_CCR2H_RESET_VALUE;
92 0044 725f5311 clr 21265
93 ; 70 TIM2->CCR2L = (u8)TIM2_CCR2L_RESET_VALUE;
95 0048 725f5312 clr 21266
96 ; 71 TIM2->CCR3H = (u8)TIM2_CCR3H_RESET_VALUE;
98 004c 725f5313 clr 21267
99 ; 72 TIM2->CCR3L = (u8)TIM2_CCR3L_RESET_VALUE;
101 0050 725f5314 clr 21268
102 ; 73 TIM2->SR1 = (u8)TIM2_SR1_RESET_VALUE;
104 0054 725f5302 clr 21250
105 ; 74 }
108 0058 81 ret
276 ; 83 void TIM2_TimeBaseInit( TIM2_Prescaler_TypeDef TIM2_Prescaler,
276 ; 84 u16 TIM2_Period)
276 ; 85 {
277 switch .text
278 0059 _TIM2_TimeBaseInit:
280 0059 88 push a
281 00000000 OFST: set 0
284 ; 87 TIM2->PSCR = (u8)(TIM2_Prescaler);
286 005a c7530c ld 21260,a
287 ; 89 TIM2->ARRH = (u8)(TIM2_Period >> 8);
289 005d 7b04 ld a,(OFST+4,sp)
290 005f c7530d ld 21261,a
291 ; 90 TIM2->ARRL = (u8)(TIM2_Period);
293 0062 7b05 ld a,(OFST+5,sp)
294 0064 c7530e ld 21262,a
295 ; 91 }
298 0067 84 pop a
299 0068 81 ret
456 ; 102 void TIM2_OC1Init(TIM2_OCMode_TypeDef TIM2_OCMode,
456 ; 103 TIM2_OutputState_TypeDef TIM2_OutputState,
456 ; 104 u16 TIM2_Pulse,
456 ; 105 TIM2_OCPolarity_TypeDef TIM2_OCPolarity)
456 ; 106 {
457 switch .text
458 0069 _TIM2_OC1Init:
460 0069 89 pushw x
461 006a 88 push a
462 00000001 OFST: set 1
465 ; 108 assert_param(IS_TIM2_OC_MODE_OK(TIM2_OCMode));
467 ; 109 assert_param(IS_TIM2_OUTPUT_STATE_OK(TIM2_OutputState));
469 ; 110 assert_param(IS_TIM2_OC_POLARITY_OK(TIM2_OCPolarity));
471 ; 113 TIM2->CCER1 &= (u8)(~( TIM2_CCER1_CC1E | TIM2_CCER1_CC1P));
473 006b c65308 ld a,21256
474 006e a4fc and a,#252
475 0070 c75308 ld 21256,a
476 ; 115 TIM2->CCER1 |= (u8)((TIM2_OutputState & TIM2_CCER1_CC1E ) | (TIM2_OCPolarity & TIM2_CCER1_CC1P ));
478 0073 7b08 ld a,(OFST+7,sp)
479 0075 a402 and a,#2
480 0077 6b01 ld (OFST+0,sp),a
481 0079 9f ld a,xl
482 007a a401 and a,#1
483 007c 1a01 or a,(OFST+0,sp)
484 007e ca5308 or a,21256
485 0081 c75308 ld 21256,a
486 ; 118 TIM2->CCMR1 = (u8)((TIM2->CCMR1 & (u8)(~TIM2_CCMR_OCM)) | (u8)TIM2_OCMode);
488 0084 c65305 ld a,21253
489 0087 a48f and a,#143
490 0089 1a02 or a,(OFST+1,sp)
491 008b c75305 ld 21253,a
492 ; 121 TIM2->CCR1H = (u8)(TIM2_Pulse >> 8);
494 008e 7b06 ld a,(OFST+5,sp)
495 0090 c7530f ld 21263,a
496 ; 122 TIM2->CCR1L = (u8)(TIM2_Pulse);
498 0093 7b07 ld a,(OFST+6,sp)
499 0095 c75310 ld 21264,a
500 ; 123 }
503 0098 5b03 addw sp,#3
504 009a 81 ret
568 ; 134 void TIM2_OC2Init(TIM2_OCMode_TypeDef TIM2_OCMode,
568 ; 135 TIM2_OutputState_TypeDef TIM2_OutputState,
568 ; 136 u16 TIM2_Pulse,
568 ; 137 TIM2_OCPolarity_TypeDef TIM2_OCPolarity)
568 ; 138 {
569 switch .text
570 009b _TIM2_OC2Init:
572 009b 89 pushw x
573 009c 88 push a
574 00000001 OFST: set 1
577 ; 140 assert_param(IS_TIM2_OC_MODE_OK(TIM2_OCMode));
579 ; 141 assert_param(IS_TIM2_OUTPUT_STATE_OK(TIM2_OutputState));
581 ; 142 assert_param(IS_TIM2_OC_POLARITY_OK(TIM2_OCPolarity));
583 ; 146 TIM2->CCER1 &= (u8)(~( TIM2_CCER1_CC2E | TIM2_CCER1_CC2P ));
585 009d c65308 ld a,21256
586 00a0 a4cf and a,#207
587 00a2 c75308 ld 21256,a
588 ; 148 TIM2->CCER1 |= (u8)((TIM2_OutputState & TIM2_CCER1_CC2E ) | \
588 ; 149 (TIM2_OCPolarity & TIM2_CCER1_CC2P ));
590 00a5 7b08 ld a,(OFST+7,sp)
591 00a7 a420 and a,#32
592 00a9 6b01 ld (OFST+0,sp),a
593 00ab 9f ld a,xl
594 00ac a410 and a,#16
595 00ae 1a01 or a,(OFST+0,sp)
596 00b0 ca5308 or a,21256
597 00b3 c75308 ld 21256,a
598 ; 153 TIM2->CCMR2 = (u8)((TIM2->CCMR2 & (u8)(~TIM2_CCMR_OCM)) | (u8)TIM2_OCMode);
600 00b6 c65306 ld a,21254
601 00b9 a48f and a,#143
602 00bb 1a02 or a,(OFST+1,sp)
603 00bd c75306 ld 21254,a
604 ; 157 TIM2->CCR2H = (u8)(TIM2_Pulse >> 8);
606 00c0 7b06 ld a,(OFST+5,sp)
607 00c2 c75311 ld 21265,a
608 ; 158 TIM2->CCR2L = (u8)(TIM2_Pulse);
610 00c5 7b07 ld a,(OFST+6,sp)
611 00c7 c75312 ld 21266,a
612 ; 159 }
615 00ca 5b03 addw sp,#3
616 00cc 81 ret
680 ; 170 void TIM2_OC3Init(TIM2_OCMode_TypeDef TIM2_OCMode,
680 ; 171 TIM2_OutputState_TypeDef TIM2_OutputState,
680 ; 172 u16 TIM2_Pulse,
680 ; 173 TIM2_OCPolarity_TypeDef TIM2_OCPolarity)
680 ; 174 {
681 switch .text
682 00cd _TIM2_OC3Init:
684 00cd 89 pushw x
685 00ce 88 push a
686 00000001 OFST: set 1
689 ; 176 assert_param(IS_TIM2_OC_MODE_OK(TIM2_OCMode));
691 ; 177 assert_param(IS_TIM2_OUTPUT_STATE_OK(TIM2_OutputState));
693 ; 178 assert_param(IS_TIM2_OC_POLARITY_OK(TIM2_OCPolarity));
695 ; 180 TIM2->CCER2 &= (u8)(~( TIM2_CCER2_CC3E | TIM2_CCER2_CC3P));
697 00cf c65309 ld a,21257
698 00d2 a4fc and a,#252
699 00d4 c75309 ld 21257,a
700 ; 182 TIM2->CCER2 |= (u8)((TIM2_OutputState & TIM2_CCER2_CC3E ) | (TIM2_OCPolarity & TIM2_CCER2_CC3P ));
702 00d7 7b08 ld a,(OFST+7,sp)
703 00d9 a402 and a,#2
704 00db 6b01 ld (OFST+0,sp),a
705 00dd 9f ld a,xl
706 00de a401 and a,#1
707 00e0 1a01 or a,(OFST+0,sp)
708 00e2 ca5309 or a,21257
709 00e5 c75309 ld 21257,a
710 ; 185 TIM2->CCMR3 = (u8)((TIM2->CCMR3 & (u8)(~TIM2_CCMR_OCM)) | (u8)TIM2_OCMode);
712 00e8 c65307 ld a,21255
713 00eb a48f and a,#143
714 00ed 1a02 or a,(OFST+1,sp)
715 00ef c75307 ld 21255,a
716 ; 188 TIM2->CCR3H = (u8)(TIM2_Pulse >> 8);
718 00f2 7b06 ld a,(OFST+5,sp)
719 00f4 c75313 ld 21267,a
720 ; 189 TIM2->CCR3L = (u8)(TIM2_Pulse);
722 00f7 7b07 ld a,(OFST+6,sp)
723 00f9 c75314 ld 21268,a
724 ; 191 }
727 00fc 5b03 addw sp,#3
728 00fe 81 ret
921 ; 203 void TIM2_ICInit(TIM2_Channel_TypeDef TIM2_Channel,
921 ; 204 TIM2_ICPolarity_TypeDef TIM2_ICPolarity,
921 ; 205 TIM2_ICSelection_TypeDef TIM2_ICSelection,
921 ; 206 TIM2_ICPSC_TypeDef TIM2_ICPrescaler,
921 ; 207 u8 TIM2_ICFilter)
921 ; 208 {
922 switch .text
923 00ff _TIM2_ICInit:
925 00ff 89 pushw x
926 00000000 OFST: set 0
929 ; 210 assert_param(IS_TIM2_CHANNEL_OK(TIM2_Channel));
931 ; 211 assert_param(IS_TIM2_IC_POLARITY_OK(TIM2_ICPolarity));
933 ; 212 assert_param(IS_TIM2_IC_SELECTION_OK(TIM2_ICSelection));
935 ; 213 assert_param(IS_TIM2_IC_PRESCALER_OK(TIM2_ICPrescaler));
937 ; 214 assert_param(IS_TIM2_IC_FILTER_OK(TIM2_ICFilter));
939 ; 216 if (TIM2_Channel == TIM2_CHANNEL_1)
941 0100 9e ld a,xh
942 0101 4d tnz a
943 0102 2614 jrne L104
944 ; 219 TI1_Config((u8)TIM2_ICPolarity,
944 ; 220 (u8)TIM2_ICSelection,
944 ; 221 (u8)TIM2_ICFilter);
946 0104 7b07 ld a,(OFST+7,sp)
947 0106 88 push a
948 0107 7b06 ld a,(OFST+6,sp)
949 0109 97 ld xl,a
950 010a 7b03 ld a,(OFST+3,sp)
951 010c 95 ld xh,a
952 010d cd0479 call L3_TI1_Config
954 0110 84 pop a
955 ; 224 TIM2_SetIC1Prescaler(TIM2_ICPrescaler);
957 0111 7b06 ld a,(OFST+6,sp)
958 0113 cd0347 call _TIM2_SetIC1Prescaler
961 0116 202c jra L304
962 0118 L104:
963 ; 226 else if (TIM2_Channel == TIM2_CHANNEL_2)
965 0118 7b01 ld a,(OFST+1,sp)
966 011a a101 cp a,#1
967 011c 2614 jrne L504
968 ; 229 TI2_Config((u8)TIM2_ICPolarity,
968 ; 230 (u8)TIM2_ICSelection,
968 ; 231 (u8)TIM2_ICFilter);
970 011e 7b07 ld a,(OFST+7,sp)
971 0120 88 push a
972 0121 7b06 ld a,(OFST+6,sp)
973 0123 97 ld xl,a
974 0124 7b03 ld a,(OFST+3,sp)
975 0126 95 ld xh,a
976 0127 cd04a9 call L5_TI2_Config
978 012a 84 pop a
979 ; 234 TIM2_SetIC2Prescaler(TIM2_ICPrescaler);
981 012b 7b06 ld a,(OFST+6,sp)
982 012d cd0354 call _TIM2_SetIC2Prescaler
985 0130 2012 jra L304
986 0132 L504:
987 ; 239 TI3_Config((u8)TIM2_ICPolarity,
987 ; 240 (u8)TIM2_ICSelection,
987 ; 241 (u8)TIM2_ICFilter);
989 0132 7b07 ld a,(OFST+7,sp)
990 0134 88 push a
991 0135 7b06 ld a,(OFST+6,sp)
992 0137 97 ld xl,a
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