stm8s_tim2.c

STM8s

        TIM2->IER &= (u8)(~TIM2_IT);
    }
}


/**
  * @brief Enables or Disables the TIM2 Update event.
  * @param[in] NewState new state of the TIM2 peripheral Preload register. This parameter can
  * be ENABLE or DISABLE.
  * @retval None
  */
void TIM2_UpdateDisableConfig(FunctionalState NewState)
{
    /* Check the parameters */
    assert_param(IS_FUNCTIONALSTATE_OK(NewState));

    /* Set or Reset the UDIS Bit */
    if (NewState != DISABLE)
    {
        TIM2->CR1 |= (u8)TIM2_CR1_UDIS;
    }
    else
    {
        TIM2->CR1 &= (u8)(~TIM2_CR1_UDIS);
    }
}

/**
  * @brief Selects the TIM2 Update Request Interrupt source.
  * @param[in] TIM2_UpdateSource specifies the Update source.
  * This parameter can be one of the following values
  *                       - TIM2_UPDATESOURCE_REGULAR
  *                       - TIM2_UPDATESOURCE_GLOBAL
  * @retval None
  */
void TIM2_UpdateRequestConfig(TIM2_UpdateSource_TypeDef TIM2_UpdateSource)
{
    /* Check the parameters */
    assert_param(IS_TIM2_UPDATE_SOURCE_OK(TIM2_UpdateSource));

    /* Set or Reset the URS Bit */
    if (TIM2_UpdateSource != TIM2_UPDATESOURCE_GLOBAL)
    {
        TIM2->CR1 |= (u8)TIM2_CR1_URS;
    }
    else
    {
        TIM2->CR1 &= (u8)(~TIM2_CR1_URS);
    }
}


/**
  * @brief Selects the TIM2抯 One Pulse Mode.
  * @param[in] TIM2_OPMode specifies the OPM Mode to be used.
  * This parameter can be one of the following values
  *                    - TIM2_OPMODE_SINGLE
  *                    - TIM2_OPMODE_REPETITIVE
  * @retval None
  */
void TIM2_SelectOnePulseMode(TIM2_OPMode_TypeDef TIM2_OPMode)
{
    /* Check the parameters */
    assert_param(IS_TIM2_OPM_MODE_OK(TIM2_OPMode));

    /* Set or Reset the OPM Bit */
    if (TIM2_OPMode != TIM2_OPMODE_REPETITIVE)
    {
        TIM2->CR1 |= (u8)TIM2_CR1_OPM;
    }
    else
    {
        TIM2->CR1 &= (u8)(~TIM2_CR1_OPM);
    }

}


/**
  * @brief Configures the TIM2 Prescaler.
  * @param[in] Prescaler specifies the Prescaler Register value
  * This parameter can be one of the following values
  *                       -  TIM2_PRESCALER_1
  *                       -  TIM2_PRESCALER_2
  *                       -  TIM2_PRESCALER_4
  *                       -  TIM2_PRESCALER_8
  *                       -  TIM2_PRESCALER_16
  *                       -  TIM2_PRESCALER_32
  *                       -  TIM2_PRESCALER_64
  *                       -  TIM2_PRESCALER_128
  *                       -  TIM2_PRESCALER_256
  *                       -  TIM2_PRESCALER_512
  *                       -  TIM2_PRESCALER_1024
  *                       -  TIM2_PRESCALER_2048
  *                       -  TIM2_PRESCALER_4096
  *                       -  TIM2_PRESCALER_8192
  *                       -  TIM2_PRESCALER_16384
  *                       -  TIM2_PRESCALER_32768
  * @param[in] TIM2_PSCReloadMode specifies the TIM2 Prescaler Reload mode.
  * This parameter can be one of the following values
  *                       - TIM2_PSCRELOADMODE_IMMEDIATE: The Prescaler is loaded
  *                         immediately.
  *                       - TIM2_PSCRELOADMODE_UPDATE: The Prescaler is loaded at
  *                         the update event.
  * @retval None
  */
void TIM2_PrescalerConfig(TIM2_Prescaler_TypeDef Prescaler,
                          TIM2_PSCReloadMode_TypeDef TIM2_PSCReloadMode)
{
    /* Check the parameters */
    assert_param(IS_TIM2_PRESCALER_RELOAD_OK(TIM2_PSCReloadMode));
    assert_param(IS_TIM2_PRESCALER_OK(Prescaler));

    /* Set the Prescaler value */
    TIM2->PSCR = (u8)Prescaler;

    /* Set or reset the UG Bit */
    TIM2->EGR = (u8)TIM2_PSCReloadMode;
}

/**
  * @brief Forces the TIM2 Channel1 output waveform to active or inactive level.
  * @param[in] TIM2_ForcedAction specifies the forced Action to be set to the output waveform.
  * This parameter can be one of the following values:
  *                       - TIM2_FORCEDACTION_ACTIVE: Force active level on OC1REF
  *                       - TIM2_FORCEDACTION_INACTIVE: Force inactive level on
  *                         OC1REF.
  * @retval None
  */
void TIM2_ForcedOC1Config(TIM2_ForcedAction_TypeDef TIM2_ForcedAction)
{
    /* Check the parameters */
    assert_param(IS_TIM2_FORCED_ACTION_OK(TIM2_ForcedAction));

    /* Reset the OCM Bits & Configure the Forced output Mode */
    TIM2->CCMR1  =  (u8)((TIM2->CCMR1 & (u8)(~TIM2_CCMR_OCM))  | (u8)TIM2_ForcedAction);
}

/**
  * @brief Forces the TIM2 Channel2 output waveform to active or inactive level.
  * @param[in] TIM2_ForcedAction specifies the forced Action to be set to the output waveform.
  * This parameter can be one of the following values:
  *                       - TIM2_FORCEDACTION_ACTIVE: Force active level on OC2REF
  *                       - TIM2_FORCEDACTION_INACTIVE: Force inactive level on
  *                         OC2REF.
  * @retval None
  */
void TIM2_ForcedOC2Config(TIM2_ForcedAction_TypeDef TIM2_ForcedAction)
{
    /* Check the parameters */
    assert_param(IS_TIM2_FORCED_ACTION_OK(TIM2_ForcedAction));

    /* Reset the OCM Bits & Configure the Forced output Mode */
    TIM2->CCMR2 = (u8)((TIM2->CCMR2 & (u8)(~TIM2_CCMR_OCM))  | (u8)TIM2_ForcedAction);
}

/**
  * @brief Forces the TIM2 Channel3 output waveform to active or inactive level.
  * @param[in] TIM2_ForcedAction specifies the forced Action to be set to the output waveform.
  * This parameter can be one of the following values:
  *                       - TIM2_FORCEDACTION_ACTIVE: Force active level on OC3REF
  *                       - TIM2_FORCEDACTION_INACTIVE: Force inactive level on
  *                         OC3REF.
  * @retval None
  */
void TIM2_ForcedOC3Config(TIM2_ForcedAction_TypeDef TIM2_ForcedAction)
{
    /* Check the parameters */
    assert_param(IS_TIM2_FORCED_ACTION_OK(TIM2_ForcedAction));

    /* Reset the OCM Bits & Configure the Forced output Mode */
    TIM2->CCMR3  =  (u8)((TIM2->CCMR3 & (u8)(~TIM2_CCMR_OCM))  | (u8)TIM2_ForcedAction);
}


/**
  * @brief Enables or disables TIM2 peripheral Preload register on ARR.
  * @param[in] NewState new state of the TIM2 peripheral Preload register.
  * This parameter can be ENABLE or DISABLE.
  * @retval None
  */
void TIM2_ARRPreloadConfig(FunctionalState NewState)
{
    /* Check the parameters */
    assert_param(IS_FUNCTIONALSTATE_OK(NewState));

    /* Set or Reset the ARPE Bit */
    if (NewState != DISABLE)
    {
        TIM2->CR1 |= (u8)TIM2_CR1_ARPE;
    }
    else
    {
        TIM2->CR1 &= (u8)(~TIM2_CR1_ARPE);
    }
}


/**
  * @brief Enables or disables the TIM2 peripheral Preload Register on CCR1.
  * @param[in] NewState new state of the Capture Compare Preload register.
  * This parameter can be ENABLE or DISABLE.
  * @retval None
  */
void TIM2_OC1PreloadConfig(FunctionalState NewState)
{
    /* Check the parameters */
    assert_param(IS_FUNCTIONALSTATE_OK(NewState));

    /* Set or Reset the OC1PE Bit */
    if (NewState != DISABLE)
    {
        TIM2->CCMR1 |= (u8)TIM2_CCMR_OCxPE;
    }
    else
    {
        TIM2->CCMR1 &= (u8)(~TIM2_CCMR_OCxPE);
    }
}


/**
  * @brief Enables or disables the TIM2 peripheral Preload Register on CCR2.
  * @param[in] NewState new state of the Capture Compare Preload register.
  * This parameter can be ENABLE or DISABLE.
  * @retval None
  */
void TIM2_OC2PreloadConfig(FunctionalState NewState)
{
    /* Check the parameters */
    assert_param(IS_FUNCTIONALSTATE_OK(NewState));

    /* Set or Reset the OC2PE Bit */
    if (NewState != DISABLE)
    {
        TIM2->CCMR2 |= (u8)TIM2_CCMR_OCxPE;
    }
    else
    {
        TIM2->CCMR2 &= (u8)(~TIM2_CCMR_OCxPE);
    }
}


/**
  * @brief Enables or disables the TIM2 peripheral Preload Register on CCR3.
  * @param[in] NewState new state of the Capture Compare Preload register.
  * This parameter can be ENABLE or DISABLE.
  * @retval None
  */
void TIM2_OC3PreloadConfig(FunctionalState NewState)
{
    /* Check the parameters */
    assert_param(IS_FUNCTIONALSTATE_OK(NewState));

    /* Set or Reset the OC3PE Bit */
    if (NewState != DISABLE)
    {
        TIM2->CCMR3 |= (u8)TIM2_CCMR_OCxPE;
    }
    else
    {
        TIM2->CCMR3 &= (u8)(~TIM2_CCMR_OCxPE);
    }
}


/**
  * @brief Configures the TIM2 event to be generated by software.
  * @param[in] TIM2_EventSource specifies the event source.
  * This parameter can be one of the following values:
  *                       - TIM2_EVENTSOURCE_UPDATE: TIM2 update Event source
  *                       - TIM2_EVENTSOURCE_CC1: TIM2 Capture Compare 1 Event source
  *                       - TIM2_EVENTSOURCE_CC2: TIM2 Capture Compare 2 Event source
  *                       - TIM2_EVENTSOURCE_CC3: TIM2 Capture Compare 3 Event source
  * @retval None
  */
void TIM2_GenerateEvent(TIM2_EventSource_TypeDef TIM2_EventSource)
{
    /* Check the parameters */
    assert_param(IS_TIM2_EVENT_SOURCE_OK(TIM2_EventSource));

    /* Set the event sources */
    TIM2->EGR = (u8)TIM2_EventSource;
}


/**
  * @brief Configures the TIM2 Channel 1 polarity.
  * @param[in] TIM2_OCPolarity specifies the OC1 Polarity.
  * This parameter can be one of the following values:
  *                       - TIM2_OCPOLARITY_LOW: Output Compare active low
  *                       - TIM2_OCPOLARITY_HIGH: Output Compare active high
  * @retval None
  */
void TIM2_OC1PolarityConfig(TIM2_OCPolarity_TypeDef TIM2_OCPolarity)
{
    /* Check the parameters */
    assert_param(IS_TIM2_OC_POLARITY_OK(TIM2_OCPolarity));

    /* Set or Reset the CC1P Bit */
    if (TIM2_OCPolarity != TIM2_OCPOLARITY_HIGH)
    {
        TIM2->CCER1 |= (u8)TIM2_CCER1_CC1P;
    }
    else
    {
        TIM2->CCER1 &= (u8)(~TIM2_CCER1_CC1P);
    }
}


/**
  * @brief Configures the TIM2 Channel 2 polarity.
  * @param[in] TIM2_OCPolarity specifies the OC2 Polarity.
  * This parameter can be one of the following values:
  *                       - TIM2_OCPOLARITY_LOW: Output Compare active low
  *                       - TIM2_OCPOLARITY_HIGH: Output Compare active high
  * @retval None
  */
void TIM2_OC2PolarityConfig(TIM2_OCPolarity_TypeDef TIM2_OCPolarity)
{
    /* Check the parameters */
    assert_param(IS_TIM2_OC_POLARITY_OK(TIM2_OCPolarity));

    /* Set or Reset the CC2P Bit */
    if (TIM2_OCPolarity != TIM2_OCPOLARITY_HIGH)
    {
        TIM2->CCER1 |= TIM2_CCER1_CC2P;
    }
    else
    {
        TIM2->CCER1 &= (u8)(~TIM2_CCER1_CC2P);
    }
}


/**
  * @brief Configures the TIM2 Channel 3 polarity.
  * @param[in] TIM2_OCPolarity specifies the OC3 Polarity.
  * This parameter can be one of the following values:
  *                       - TIM2_OCPOLARITY_LOW: Output Compare active low
  *                       - TIM2_OCPOLARITY_HIGH: Output Compare active high
  * @retval None
  */
void TIM2_OC3PolarityConfig(TIM2_OCPolarity_TypeDef TIM2_OCPolarity)
{
    /* Check the parameters */
    assert_param(IS_TIM2_OC_POLARITY_OK(TIM2_OCPolarity));

    /* Set or Reset the CC3P Bit */
    if (TIM2_OCPolarity != TIM2_OCPOLARITY_HIGH)
    {
        TIM2->CCER2 |= (u8)TIM2_CCER2_CC3P;
    }
    else
    {
        TIM2->CCER2 &= (u8)(~TIM2_CCER2_CC3P);
    }
}


/**
  * @brief Enables or disables the TIM2 Capture Compare Channel x.
  * @param[in] TIM2_Channel specifies the TIM2 Channel.
  * This parameter can be one of the following values:
  *                       - TIM2_CHANNEL_1: TIM2 Channel1
  *                       - TIM2_CHANNEL_2: TIM2 Channel2
  *                       - TIM2_CHANNEL_3: TIM2 Channel3
  * @param[in] NewState specifies the TIM2 Channel CCxE bit new state.
  * This parameter can be: ENABLE or DISABLE.
  * @retval None
  */
void TIM2_CCxCmd(TIM2_Channel_TypeDef TIM2_Channel, FunctionalState NewState)
{