📄 stm32f10x_can.c
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*/
uint8_t CAN_GetReceiveErrorCounter(CAN_TypeDef* CANx)
{
uint8_t counter=0;
/* Check the parameters */
assert_param(IS_CAN_ALL_PERIPH(CANx));
/* Get the Receive Error Counter*/
counter = (uint8_t)((CANx->ESR & CAN_ESR_REC)>> 24);
/* Return the Receive Error Counter*/
return counter;
}
/**
* @brief Returns the LSB of the 9-bit CANx Transmit Error Counter(TEC).
* @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
* @retval LSB of the 9-bit CAN Transmit Error Counter.
*/
uint8_t CAN_GetLSBTransmitErrorCounter(CAN_TypeDef* CANx)
{
uint8_t counter=0;
/* Check the parameters */
assert_param(IS_CAN_ALL_PERIPH(CANx));
/* Get the LSB of the 9-bit CANx Transmit Error Counter(TEC) */
counter = (uint8_t)((CANx->ESR & CAN_ESR_TEC)>> 16);
/* Return the LSB of the 9-bit CANx Transmit Error Counter(TEC) */
return counter;
}
/**
* @brief Enables or disables the specified CANx interrupts.
* @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
* @param CAN_IT: specifies the CAN interrupt sources to be enabled or disabled.
* This parameter can be:
* - CAN_IT_TME,
* - CAN_IT_FMP0,
* - CAN_IT_FF0,
* - CAN_IT_FOV0,
* - CAN_IT_FMP1,
* - CAN_IT_FF1,
* - CAN_IT_FOV1,
* - CAN_IT_EWG,
* - CAN_IT_EPV,
* - CAN_IT_LEC,
* - CAN_IT_ERR,
* - CAN_IT_WKU or
* - CAN_IT_SLK.
* @param NewState: new state of the CAN interrupts.
* This parameter can be: ENABLE or DISABLE.
* @retval None.
*/
void CAN_ITConfig(CAN_TypeDef* CANx, uint32_t CAN_IT, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_CAN_ALL_PERIPH(CANx));
assert_param(IS_CAN_IT(CAN_IT));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
/* Enable the selected CANx interrupt */
CANx->IER |= CAN_IT;
}
else
{
/* Disable the selected CANx interrupt */
CANx->IER &= ~CAN_IT;
}
}
/**
* @brief Checks whether the specified CAN flag is set or not.
* @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
* @param CAN_FLAG: specifies the flag to check.
* This parameter can be one of the following flags:
* - CAN_FLAG_EWG
* - CAN_FLAG_EPV
* - CAN_FLAG_BOF
* - CAN_FLAG_RQCP0
* - CAN_FLAG_RQCP1
* - CAN_FLAG_RQCP2
* - CAN_FLAG_FMP1
* - CAN_FLAG_FF1
* - CAN_FLAG_FOV1
* - CAN_FLAG_FMP0
* - CAN_FLAG_FF0
* - CAN_FLAG_FOV0
* - CAN_FLAG_WKU
* - CAN_FLAG_SLAK
* - CAN_FLAG_LEC
* @retval The new state of CAN_FLAG (SET or RESET).
*/
FlagStatus CAN_GetFlagStatus(CAN_TypeDef* CANx, uint32_t CAN_FLAG)
{
FlagStatus bitstatus = RESET;
/* Check the parameters */
assert_param(IS_CAN_ALL_PERIPH(CANx));
assert_param(IS_CAN_GET_FLAG(CAN_FLAG));
if((CAN_FLAG & CAN_FLAGS_ESR) != (uint32_t)RESET)
{
/* Check the status of the specified CAN flag */
if ((CANx->ESR & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET)
{
/* CAN_FLAG is set */
bitstatus = SET;
}
else
{
/* CAN_FLAG is reset */
bitstatus = RESET;
}
}
else if((CAN_FLAG & CAN_FLAGS_MSR) != (uint32_t)RESET)
{
/* Check the status of the specified CAN flag */
if ((CANx->MSR & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET)
{
/* CAN_FLAG is set */
bitstatus = SET;
}
else
{
/* CAN_FLAG is reset */
bitstatus = RESET;
}
}
else if((CAN_FLAG & CAN_FLAGS_TSR) != (uint32_t)RESET)
{
/* Check the status of the specified CAN flag */
if ((CANx->TSR & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET)
{
/* CAN_FLAG is set */
bitstatus = SET;
}
else
{
/* CAN_FLAG is reset */
bitstatus = RESET;
}
}
else if((CAN_FLAG & CAN_FLAGS_RF0R) != (uint32_t)RESET)
{
/* Check the status of the specified CAN flag */
if ((CANx->RF0R & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET)
{
/* CAN_FLAG is set */
bitstatus = SET;
}
else
{
/* CAN_FLAG is reset */
bitstatus = RESET;
}
}
else /* If(CAN_FLAG & CAN_FLAGS_RF1R != (uint32_t)RESET) */
{
/* Check the status of the specified CAN flag */
if ((uint32_t)(CANx->RF1R & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET)
{
/* CAN_FLAG is set */
bitstatus = SET;
}
else
{
/* CAN_FLAG is reset */
bitstatus = RESET;
}
}
/* Return the CAN_FLAG status */
return bitstatus;
}
/**
* @brief Clears the CAN's pending flags.
* @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
* @param CAN_FLAG: specifies the flag to clear.
* This parameter can be one of the following flags:
* - CAN_FLAG_RQCP0
* - CAN_FLAG_RQCP1
* - CAN_FLAG_RQCP2
* - CAN_FLAG_FF1
* - CAN_FLAG_FOV1
* - CAN_FLAG_FF0
* - CAN_FLAG_FOV0
* - CAN_FLAG_WKU
* - CAN_FLAG_SLAK
* - CAN_FLAG_LEC
* @retval None.
*/
void CAN_ClearFlag(CAN_TypeDef* CANx, uint32_t CAN_FLAG)
{
uint32_t flagtmp=0;
/* Check the parameters */
assert_param(IS_CAN_ALL_PERIPH(CANx));
assert_param(IS_CAN_CLEAR_FLAG(CAN_FLAG));
if (CAN_FLAG == CAN_FLAG_LEC) /* ESR register */
{
/* Clear the selected CAN flags */
CANx->ESR = (uint32_t)RESET;
}
else /* MSR or TSR or RF0R or RF1R */
{
flagtmp = CAN_FLAG & 0x000FFFFF;
if ((CAN_FLAG & CAN_FLAGS_RF0R)!=(uint32_t)RESET)
{
/* Receive Flags */
CANx->RF0R = (uint32_t)(flagtmp);
}
else if ((CAN_FLAG & CAN_FLAGS_RF1R)!=(uint32_t)RESET)
{
/* Receive Flags */
CANx->RF1R = (uint32_t)(flagtmp);
}
else if ((CAN_FLAG & CAN_FLAGS_TSR)!=(uint32_t)RESET)
{
/* Transmit Flags */
CANx->TSR = (uint32_t)(flagtmp);
}
else /* If((CAN_FLAG & CAN_FLAGS_MSR)!=(uint32_t)RESET) */
{
/* Operating mode Flags */
CANx->MSR = (uint32_t)(flagtmp);
}
}
}
/**
* @brief Checks whether the specified CANx interrupt has occurred or not.
* @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
* @param CAN_IT: specifies the CAN interrupt source to check.
* This parameter can be one of the following flags:
* - CAN_IT_TME
* - CAN_IT_FMP0
* - CAN_IT_FF0
* - CAN_IT_FOV0
* - CAN_IT_FMP1
* - CAN_IT_FF1
* - CAN_IT_FOV1
* - CAN_IT_WKU
* - CAN_IT_SLK
* - CAN_IT_EWG
* - CAN_IT_EPV
* - CAN_IT_BOF
* - CAN_IT_LEC
* - CAN_IT_ERR
* @retval The current state of CAN_IT (SET or RESET).
*/
ITStatus CAN_GetITStatus(CAN_TypeDef* CANx, uint32_t CAN_IT)
{
ITStatus itstatus = RESET;
/* Check the parameters */
assert_param(IS_CAN_ALL_PERIPH(CANx));
assert_param(IS_CAN_IT(CAN_IT));
/* check the enable interrupt bit */
if((CANx->IER & CAN_IT) != RESET)
{
/* in case the Interrupt is enabled, .... */
switch (CAN_IT)
{
case CAN_IT_TME:
/* Check CAN_TSR_RQCPx bits */
itstatus = CheckITStatus(CANx->TSR, CAN_TSR_RQCP0|CAN_TSR_RQCP1|CAN_TSR_RQCP2);
break;
case CAN_IT_FMP0:
/* Check CAN_RF0R_FMP0 bit */
itstatus = CheckITStatus(CANx->RF0R, CAN_RF0R_FMP0);
break;
case CAN_IT_FF0:
/* Check CAN_RF0R_FULL0 bit */
itstatus = CheckITStatus(CANx->RF0R, CAN_RF0R_FULL0);
break;
case CAN_IT_FOV0:
/* Check CAN_RF0R_FOVR0 bit */
itstatus = CheckITStatus(CANx->RF0R, CAN_RF0R_FOVR0);
break;
case CAN_IT_FMP1:
/* Check CAN_RF1R_FMP1 bit */
itstatus = CheckITStatus(CANx->RF1R, CAN_RF1R_FMP1);
break;
case CAN_IT_FF1:
/* Check CAN_RF1R_FULL1 bit */
itstatus = CheckITStatus(CANx->RF1R, CAN_RF1R_FULL1);
break;
case CAN_IT_FOV1:
/* Check CAN_RF1R_FOVR1 bit */
itstatus = CheckITStatus(CANx->RF1R, CAN_RF1R_FOVR1);
break;
case CAN_IT_WKU:
/* Check CAN_MSR_WKUI bit */
itstatus = CheckITStatus(CANx->MSR, CAN_MSR_WKUI);
break;
case CAN_IT_SLK:
/* Check CAN_MSR_SLAKI bit */
itstatus = CheckITStatus(CANx->MSR, CAN_MSR_SLAKI);
break;
case CAN_IT_EWG:
/* Check CAN_ESR_EWGF bit */
itstatus = CheckITStatus(CANx->ESR, CAN_ESR_EWGF);
break;
case CAN_IT_EPV:
/* Check CAN_ESR_EPVF bit */
itstatus = CheckITStatus(CANx->ESR, CAN_ESR_EPVF);
break;
case CAN_IT_BOF:
/* Check CAN_ESR_BOFF bit */
itstatus = CheckITStatus(CANx->ESR, CAN_ESR_BOFF);
break;
case CAN_IT_LEC:
/* Check CAN_ESR_LEC bit */
itstatus = CheckITStatus(CANx->ESR, CAN_ESR_LEC);
break;
case CAN_IT_ERR:
/* Check CAN_MSR_ERRI bit */
itstatus = CheckITStatus(CANx->MSR, CAN_MSR_ERRI);
break;
default :
/* in case of error, return RESET */
itstatus = RESET;
break;
}
}
else
{
/* in case the Interrupt is not enabled, return RESET */
itstatus = RESET;
}
/* Return the CAN_IT status */
return itstatus;
}
/**
* @brief Clears the CANx's interrupt pending bits.
* @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
* @param CAN_IT: specifies the interrupt pending bit to clear.
* - CAN_IT_TME
* - CAN_IT_FF0
* - CAN_IT_FOV0
* - CAN_IT_FF1
* - CAN_IT_FOV1
* - CAN_IT_WKU
* - CAN_IT_SLK
* - CAN_IT_EWG
* - CAN_IT_EPV
* - CAN_IT_BOF
* - CAN_IT_LEC
* - CAN_IT_ERR
* @retval None.
*/
void CAN_ClearITPendingBit(CAN_TypeDef* CANx, uint32_t CAN_IT)
{
/* Check the parameters */
assert_param(IS_CAN_ALL_PERIPH(CANx));
assert_param(IS_CAN_CLEAR_IT(CAN_IT));
switch (CAN_IT)
{
case CAN_IT_TME:
/* Clear CAN_TSR_RQCPx (rc_w1)*/
CANx->TSR = CAN_TSR_RQCP0|CAN_TSR_RQCP1|CAN_TSR_RQCP2;
break;
case CAN_IT_FF0:
/* Clear CAN_RF0R_FULL0 (rc_w1)*/
CANx->RF0R = CAN_RF0R_FULL0;
break;
case CAN_IT_FOV0:
/* Clear CAN_RF0R_FOVR0 (rc_w1)*/
CANx->RF0R = CAN_RF0R_FOVR0;
break;
case CAN_IT_FF1:
/* Clear CAN_RF1R_FULL1 (rc_w1)*/
CANx->RF1R = CAN_RF1R_FULL1;
break;
case CAN_IT_FOV1:
/* Clear CAN_RF1R_FOVR1 (rc_w1)*/
CANx->RF1R = CAN_RF1R_FOVR1;
break;
case CAN_IT_WKU:
/* Clear CAN_MSR_WKUI (rc_w1)*/
CANx->MSR = CAN_MSR_WKUI;
break;
case CAN_IT_SLK:
/* Clear CAN_MSR_SLAKI (rc_w1)*/
CANx->MSR = CAN_MSR_SLAKI;
break;
case CAN_IT_EWG:
/* Clear CAN_MSR_ERRI (rc_w1) */
CANx->MSR = CAN_MSR_ERRI;
/* Note : the corresponding Flag is cleared by hardware depending
of the CAN Bus status*/
break;
case CAN_IT_EPV:
/* Clear CAN_MSR_ERRI (rc_w1) */
CANx->MSR = CAN_MSR_ERRI;
/* Note : the corresponding Flag is cleared by hardware depending
of the CAN Bus status*/
break;
case CAN_IT_BOF:
/* Clear CAN_MSR_ERRI (rc_w1) */
CANx->MSR = CAN_MSR_ERRI;
/* Note : the corresponding Flag is cleared by hardware depending
of the CAN Bus status*/
break;
case CAN_IT_LEC:
/* Clear LEC bits */
CANx->ESR = RESET;
/* Clear CAN_MSR_ERRI (rc_w1) */
CANx->MSR = CAN_MSR_ERRI;
break;
case CAN_IT_ERR:
/*Clear LEC bits */
CANx->ESR = RESET;
/* Clear CAN_MSR_ERRI (rc_w1) */
CANx->MSR = CAN_MSR_ERRI;
/* Note : BOFF, EPVF and EWGF Flags are cleared by hardware depending
of the CAN Bus status*/
break;
default :
break;
}
}
/**
* @brief Checks whether the CAN interrupt has occurred or not.
* @param CAN_Reg: specifies the CAN interrupt register to check.
* @param It_Bit: specifies the interrupt source bit to check.
* @retval The new state of the CAN Interrupt (SET or RESET).
*/
static ITStatus CheckITStatus(uint32_t CAN_Reg, uint32_t It_Bit)
{
ITStatus pendingbitstatus = RESET;
if ((CAN_Reg & It_Bit) != (uint32_t)RESET)
{
/* CAN_IT is set */
pendingbitstatus = SET;
}
else
{
/* CAN_IT is reset */
pendingbitstatus = RESET;
}
return pendingbitstatus;
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
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