📄 lib_mem.h
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* are also independent of CPU data-word-alignment & SHOULD be used whenever possible.
*
* See also 'MEM_VAL_COPY_GET_xxx() Note #4'
* & 'MEM_VAL_COPY_SET_xxx() Note #4'.
*
* (4) Generic endian word order macro's are NOT atomic operations & MUST NOT be used on any
* non-static (i.e. volatile) variables, registers, hardware, etc.; without the caller of
* the macro's providing some form of additional protection (e.g. mutual exclusion).
*
* (5) The 'CPU_CFG_ENDIAN_TYPE' pre-processor 'else'-conditional code SHOULD never be compiled/
* linked since each 'cpu.h' SHOULD ensure that the CPU data-word-memory order configuration
* constant (CPU_CFG_ENDIAN_TYPE) is configured with an appropriate data-word-memory order
* value (see 'cpu.h CPU WORD CONFIGURATION Note #2'). The 'else'-conditional code is
* included as an extra precaution in case 'cpu.h' is incorrectly configured.
*********************************************************************************************************
*/
/*$PAGE*/
#if ((CPU_CFG_DATA_SIZE == CPU_WORD_SIZE_64) || \
(CPU_CFG_DATA_SIZE == CPU_WORD_SIZE_32))
#define MEM_VAL_BIG_TO_LITTLE_16(val) ((CPU_INT16U)(((((CPU_INT16U)(val)) & (CPU_INT16U) 0xFF00u) >> (1u * DEF_OCTET_NBR_BITS)) | \
((((CPU_INT16U)(val)) & (CPU_INT16U) 0x00FFu) << (1u * DEF_OCTET_NBR_BITS))))
#define MEM_VAL_BIG_TO_LITTLE_32(val) ((CPU_INT32U)(((((CPU_INT32U)(val)) & (CPU_INT32U)0xFF000000u) >> (3u * DEF_OCTET_NBR_BITS)) | \
((((CPU_INT32U)(val)) & (CPU_INT32U)0x00FF0000u) >> (1u * DEF_OCTET_NBR_BITS)) | \
((((CPU_INT32U)(val)) & (CPU_INT32U)0x0000FF00u) << (1u * DEF_OCTET_NBR_BITS)) | \
((((CPU_INT32U)(val)) & (CPU_INT32U)0x000000FFu) << (3u * DEF_OCTET_NBR_BITS))))
#elif (CPU_CFG_DATA_SIZE == CPU_WORD_SIZE_16)
#define MEM_VAL_BIG_TO_LITTLE_16(val) ((CPU_INT16U)(((((CPU_INT16U)(val)) & (CPU_INT16U) 0xFF00u) >> (1u * DEF_OCTET_NBR_BITS)) | \
((((CPU_INT16U)(val)) & (CPU_INT16U) 0x00FFu) << (1u * DEF_OCTET_NBR_BITS))))
#define MEM_VAL_BIG_TO_LITTLE_32(val) ((CPU_INT32U)(((((CPU_INT32U)(val)) & (CPU_INT32U)0xFF000000u) >> (1u * DEF_OCTET_NBR_BITS)) | \
((((CPU_INT32U)(val)) & (CPU_INT32U)0x00FF0000u) << (1u * DEF_OCTET_NBR_BITS)) | \
((((CPU_INT32U)(val)) & (CPU_INT32U)0x0000FF00u) >> (1u * DEF_OCTET_NBR_BITS)) | \
((((CPU_INT32U)(val)) & (CPU_INT32U)0x000000FFu) << (1u * DEF_OCTET_NBR_BITS))))
#else
#define MEM_VAL_BIG_TO_LITTLE_16(val) (val)
#define MEM_VAL_BIG_TO_LITTLE_32(val) (val)
#endif
#define MEM_VAL_LITTLE_TO_BIG_16(val) MEM_VAL_BIG_TO_LITTLE_16(val)
#define MEM_VAL_LITTLE_TO_BIG_32(val) MEM_VAL_BIG_TO_LITTLE_32(val)
#if (CPU_CFG_ENDIAN_TYPE == CPU_ENDIAN_TYPE_BIG)
#define MEM_VAL_BIG_TO_HOST_16(val) (val)
#define MEM_VAL_BIG_TO_HOST_32(val) (val)
#define MEM_VAL_LITTLE_TO_HOST_16(val) MEM_VAL_LITTLE_TO_BIG_16(val)
#define MEM_VAL_LITTLE_TO_HOST_32(val) MEM_VAL_LITTLE_TO_BIG_32(val)
#elif (CPU_CFG_ENDIAN_TYPE == CPU_ENDIAN_TYPE_LITTLE)
#define MEM_VAL_BIG_TO_HOST_16(val) MEM_VAL_BIG_TO_LITTLE_16(val)
#define MEM_VAL_BIG_TO_HOST_32(val) MEM_VAL_BIG_TO_LITTLE_32(val)
#define MEM_VAL_LITTLE_TO_HOST_16(val) (val)
#define MEM_VAL_LITTLE_TO_HOST_32(val) (val)
#else /* See Note #5. */
#error "CPU_CFG_ENDIAN_TYPE illegally #defined in 'cpu.h' "
#error " [See 'cpu.h CONFIGURATION ERRORS']"
#endif
#define MEM_VAL_HOST_TO_BIG_16(val) MEM_VAL_BIG_TO_HOST_16(val)
#define MEM_VAL_HOST_TO_BIG_32(val) MEM_VAL_BIG_TO_HOST_32(val)
#define MEM_VAL_HOST_TO_LITTLE_16(val) MEM_VAL_LITTLE_TO_HOST_16(val)
#define MEM_VAL_HOST_TO_LITTLE_32(val) MEM_VAL_LITTLE_TO_HOST_32(val)
/*$PAGE*/
/*
*********************************************************************************************************
* MEM_VAL_GET_xxx()
*
* Description : Decode data values from any CPU memory address.
*
* Argument(s) : addr Lowest CPU memory address of data value to decode (see Notes #2 & #3a).
*
* Return(s) : Decoded data value from CPU memory address (see Notes #1 & #3b).
*
* Caller(s) : Application.
*
* Note(s) : (1) Decode data values based on the values' data-word order in CPU memory :
*
* MEM_VAL_GET_xxx_BIG() Decode big- endian data values -- data words' most
* significant octet @ lowest memory address
* MEM_VAL_GET_xxx_LITTLE() Decode little-endian data values -- data words' least
* significant octet @ lowest memory address
* MEM_VAL_GET_xxx() Decode data values using CPU's native or configured
* data-word order
*
* See also 'cpu.h CPU WORD CONFIGURATION Note #2'.
*
* (2) CPU memory addresses/pointers NOT checked for NULL.
*
* (3) (a) MEM_VAL_GET_xxx() macro's decode data values without regard to CPU word-aligned addresses.
* Thus for processors that require data word alignment, data words can be decoded from any
* CPU address, word-aligned or not, without generating data-word-alignment exceptions/faults.
*
* (b) However, any variable to receive the returned data value MUST start on an appropriate CPU
* word-aligned address.
*
* See also 'MEMORY DATA VALUE MACRO'S Note #1'.
*
* (4) MEM_VAL_COPY_GET_xxx() macro's are more efficient than MEM_VAL_GET_xxx() macro's & are
* also independent of CPU data-word-alignment & SHOULD be used whenever possible.
*
* See also 'MEM_VAL_COPY_GET_xxx() Note #4'.
*
* (5) MEM_VAL_GET_xxx() macro's are NOT atomic operations & MUST NOT be used on any non-static
* (i.e. volatile) variables, registers, hardware, etc.; without the caller of the macro's
* providing some form of additional protection (e.g. mutual exclusion).
*
* (6) The 'CPU_CFG_ENDIAN_TYPE' pre-processor 'else'-conditional code SHOULD never be compiled/
* linked since each 'cpu.h' SHOULD ensure that the CPU data-word-memory order configuration
* constant (CPU_CFG_ENDIAN_TYPE) is configured with an appropriate data-word-memory order
* value (see 'cpu.h CPU WORD CONFIGURATION Note #2'). The 'else'-conditional code is
* included as an extra precaution in case 'cpu.h' is incorrectly configured.
*********************************************************************************************************
*/
/*$PAGE*/
#define MEM_VAL_GET_INT08U_BIG(addr) ((CPU_INT08U) (((CPU_INT08U)(*(((CPU_INT08U *)(addr)) + 0))) << (0u * DEF_OCTET_NBR_BITS)))
#define MEM_VAL_GET_INT16U_BIG(addr) ((CPU_INT16U)((((CPU_INT16U)(*(((CPU_INT08U *)(addr)) + 0))) << (1u * DEF_OCTET_NBR_BITS)) + \
(((CPU_INT16U)(*(((CPU_INT08U *)(addr)) + 1))) << (0u * DEF_OCTET_NBR_BITS))))
#define MEM_VAL_GET_INT32U_BIG(addr) ((CPU_INT32U)((((CPU_INT32U)(*(((CPU_INT08U *)(addr)) + 0))) << (3u * DEF_OCTET_NBR_BITS)) + \
(((CPU_INT32U)(*(((CPU_INT08U *)(addr)) + 1))) << (2u * DEF_OCTET_NBR_BITS)) + \
(((CPU_INT32U)(*(((CPU_INT08U *)(addr)) + 2))) << (1u * DEF_OCTET_NBR_BITS)) + \
(((CPU_INT32U)(*(((CPU_INT08U *)(addr)) + 3))) << (0u * DEF_OCTET_NBR_BITS))))
#define MEM_VAL_GET_INT08U_LITTLE(addr) ((CPU_INT08U) (((CPU_INT08U)(*(((CPU_INT08U *)(addr)) + 0))) << (0u * DEF_OCTET_NBR_BITS)))
#define MEM_VAL_GET_INT16U_LITTLE(addr) ((CPU_INT16U)((((CPU_INT16U)(*(((CPU_INT08U *)(addr)) + 0))) << (0u * DEF_OCTET_NBR_BITS)) + \
(((CPU_INT16U)(*(((CPU_INT08U *)(addr)) + 1))) << (1u * DEF_OCTET_NBR_BITS))))
#define MEM_VAL_GET_INT32U_LITTLE(addr) ((CPU_INT32U)((((CPU_INT32U)(*(((CPU_INT08U *)(addr)) + 0))) << (0u * DEF_OCTET_NBR_BITS)) + \
(((CPU_INT32U)(*(((CPU_INT08U *)(addr)) + 1))) << (1u * DEF_OCTET_NBR_BITS)) + \
(((CPU_INT32U)(*(((CPU_INT08U *)(addr)) + 2))) << (2u * DEF_OCTET_NBR_BITS)) + \
(((CPU_INT32U)(*(((CPU_INT08U *)(addr)) + 3))) << (3u * DEF_OCTET_NBR_BITS))))
#if (CPU_CFG_ENDIAN_TYPE == CPU_ENDIAN_TYPE_BIG)
#define MEM_VAL_GET_INT08U(addr) MEM_VAL_GET_INT08U_BIG(addr)
#define MEM_VAL_GET_INT16U(addr) MEM_VAL_GET_INT16U_BIG(addr)
#define MEM_VAL_GET_INT32U(addr) MEM_VAL_GET_INT32U_BIG(addr)
#elif (CPU_CFG_ENDIAN_TYPE == CPU_ENDIAN_TYPE_LITTLE)
#define MEM_VAL_GET_INT08U(addr) MEM_VAL_GET_INT08U_LITTLE(addr)
#define MEM_VAL_GET_INT16U(addr) MEM_VAL_GET_INT16U_LITTLE(addr)
#define MEM_VAL_GET_INT32U(addr) MEM_VAL_GET_INT32U_LITTLE(addr)
#else /* See Note #6. */
#error "CPU_CFG_ENDIAN_TYPE illegally #defined in 'cpu.h' "
#error " [See 'cpu.h CONFIGURATION ERRORS']"
#endif
/*$PAGE*/
/*
*********************************************************************************************************
* MEM_VAL_SET_xxx()
*
* Description : Encode data values to any CPU memory address.
*
* Argument(s) : addr Lowest CPU memory address to encode data value (see Notes #2 & #3a).
*
* val Data value to encode (see Notes #1 & #3b).
*
* Return(s) : none.
*
* Caller(s) : Application.
*
* Note(s) : (1) Encode data values into CPU memory based on the values' data-word order :
*
* MEM_VAL_SET_xxx_BIG() Encode big- endian data values -- data words' most
* significant octet @ lowest memory address
* MEM_VAL_SET_xxx_LITTLE() Encode little-endian data values -- data words' least
* significant octet @ lowest memory address
* MEM_VAL_SET_xxx() Encode data values using CPU's native or configured
* data-word order
*
* See also 'cpu.h CPU WORD CONFIGURATION Note #2'.
*
* (2) CPU memory addresses/pointers NOT checked for NULL.
*
* (3) (a) MEM_VAL_SET_xxx() macro's encode data values without regard to CPU word-aligned addresses.
* Thus for processors that require data word alignment, data words can be encoded to any
* CPU address, word-aligned or not, without generating data-word-alignment exceptions/faults.
*
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