📄 cpu.h
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#define CPU_REG_NVIC_ISAFR2 (*((CPU_REG32 *)(0xE000ED68))) /* ISA Feature Reg 2. */
#define CPU_REG_NVIC_ISAFR3 (*((CPU_REG32 *)(0xE000ED6C))) /* ISA Feature Reg 3. */
#define CPU_REG_NVIC_ISAFR4 (*((CPU_REG32 *)(0xE000ED70))) /* ISA Feature Reg 4. */
#define CPU_REG_NVIC_SW_TRIG (*((CPU_REG32 *)(0xE000EF00))) /* Software Trigger Int Reg. */
#define CPU_REG_MPU_TYPE (*((CPU_REG32 *)(0xE000ED90))) /* MPU Type Reg. */
#define CPU_REG_MPU_CTRL (*((CPU_REG32 *)(0xE000ED94))) /* MPU Ctrl Reg. */
#define CPU_REG_MPU_REG_NBR (*((CPU_REG32 *)(0xE000ED98))) /* MPU Region Nbr Reg. */
#define CPU_REG_MPU_REG_BASE (*((CPU_REG32 *)(0xE000ED9C))) /* MPU Region Base Addr Reg. */
#define CPU_REG_MPU_REG_ATTR (*((CPU_REG32 *)(0xE000EDA0))) /* MPU Region Attrib & Size Reg. */
#define CPU_REG_DBG_CTRL (*((CPU_REG32 *)(0xE000EDF0))) /* Debug Halting Ctrl & Status Reg. */
#define CPU_REG_DBG_SELECT (*((CPU_REG32 *)(0xE000EDF4))) /* Debug Core Reg Selector Reg. */
#define CPU_REG_DBG_DATA (*((CPU_REG32 *)(0xE000EDF8))) /* Debug Core Reg Data Reg. */
#define CPU_REG_DBG_INT (*((CPU_REG32 *)(0xE000EDFC))) /* Debug Except & Monitor Ctrl Reg. */
/*$PAGE*/
/*
*********************************************************************************************************
* CPU REGISTER BITS
*********************************************************************************************************
*/
/* ---------- SYSTICK CTRL & STATUS REG BITS ---------- */
#define CPU_REG_NVIC_ST_CTRL_COUNTFLAG 0x00010000
#define CPU_REG_NVIC_ST_CTRL_CLKSOURCE 0x00000004
#define CPU_REG_NVIC_ST_CTRL_TICKINT 0x00000002
#define CPU_REG_NVIC_ST_CTRL_ENABLE 0x00000001
/* -------- SYSTICK CALIBRATION VALUE REG BITS -------- */
#define CPU_REG_NVIC_ST_CAL_NOREF 0x80000000
#define CPU_REG_NVIC_ST_CAL_SKEW 0x40000000
/* -------------- INT CTRL STATE REG BITS ------------- */
#define CPU_REG_NVIC_ICSR_NMIPENDSET 0x80000000
#define CPU_REG_NVIC_ICSR_PENDSVSET 0x10000000
#define CPU_REG_NVIC_ICSR_PENDSVCLR 0x08000000
#define CPU_REG_NVIC_ICSR_PENDSTSET 0x04000000
#define CPU_REG_NVIC_ICSR_PENDSTCLR 0x02000000
#define CPU_REG_NVIC_ICSR_ISRPREEMPT 0x00800000
#define CPU_REG_NVIC_ICSR_ISRPENDING 0x00400000
#define CPU_REG_NVIC_ICSR_RETTOBASE 0x00000800
/* ------------- VECT TBL OFFSET REG BITS ------------- */
#define CPU_REG_NVIC_VTOR_TBLBASE 0x20000000
/* ------------ APP INT/RESET CTRL REG BITS ----------- */
#define CPU_REG_NVIC_AIRCR_ENDIANNESS 0x00008000
#define CPU_REG_NVIC_AIRCR_SYSRESETREQ 0x00000004
#define CPU_REG_NVIC_AIRCR_VECTCLRACTIVE 0x00000002
#define CPU_REG_NVIC_AIRCR_VECTRESET 0x00000001
/* --------------- SYSTEM CTRL REG BITS --------------- */
#define CPU_REG_NVIC_SCR_SEVONPEND 0x00000010
#define CPU_REG_NVIC_SCR_SLEEPDEEP 0x00000004
#define CPU_REG_NVIC_SCR_SLEEPONEXIT 0x00000002
/* ----------------- CFG CTRL REG BITS ---------------- */
#define CPU_REG_NVIC_CCR_STKALIGN 0x00000200
#define CPU_REG_NVIC_CCR_BFHFNMIGN 0x00000100
#define CPU_REG_NVIC_CCR_DIV_0_TRP 0x00000010
#define CPU_REG_NVIC_CCR_UNALIGN_TRP 0x00000008
#define CPU_REG_NVIC_CCR_USERSETMPEND 0x00000002
#define CPU_REG_NVIC_CCR_NONBASETHRDENA 0x00000001
/* ------- SYSTEM HANDLER CTRL & STATE REG BITS ------- */
#define CPU_REG_NVIC_SHCSR_USGFAULTENA 0x00040000
#define CPU_REG_NVIC_SHCSR_BUSFAULTENA 0x00020000
#define CPU_REG_NVIC_SHCSR_MEMFAULTENA 0x00010000
#define CPU_REG_NVIC_SHCSR_SVCALLPENDED 0x00008000
#define CPU_REG_NVIC_SHCSR_BUSFAULTPENDED 0x00004000
#define CPU_REG_NVIC_SHCSR_MEMFAULTPENDED 0x00002000
#define CPU_REG_NVIC_SHCSR_USGFAULTPENDED 0x00001000
#define CPU_REG_NVIC_SHCSR_SYSTICKACT 0x00000800
#define CPU_REG_NVIC_SHCSR_PENDSVACT 0x00000400
#define CPU_REG_NVIC_SHCSR_MONITORACT 0x00000100
#define CPU_REG_NVIC_SHCSR_SVCALLACT 0x00000080
#define CPU_REG_NVIC_SHCSR_USGFAULTACT 0x00000008
#define CPU_REG_NVIC_SHCSR_BUSFAULTACT 0x00000002
#define CPU_REG_NVIC_SHCSR_MEMFAULTACT 0x00000001
/* -------- CONFIGURABLE FAULT STATUS REG BITS -------- */
#define CPU_REG_NVIC_CFSR_DIVBYZERO 0x02000000
#define CPU_REG_NVIC_CFSR_UNALIGNED 0x01000000
#define CPU_REG_NVIC_CFSR_NOCP 0x00080000
#define CPU_REG_NVIC_CFSR_INVPC 0x00040000
#define CPU_REG_NVIC_CFSR_INVSTATE 0x00020000
#define CPU_REG_NVIC_CFSR_UNDEFINSTR 0x00010000
#define CPU_REG_NVIC_CFSR_BFARVALID 0x00008000
#define CPU_REG_NVIC_CFSR_STKERR 0x00001000
#define CPU_REG_NVIC_CFSR_UNSTKERR 0x00000800
#define CPU_REG_NVIC_CFSR_IMPRECISERR 0x00000400
#define CPU_REG_NVIC_CFSR_PRECISERR 0x00000200
#define CPU_REG_NVIC_CFSR_IBUSERR 0x00000100
#define CPU_REG_NVIC_CFSR_MMARVALID 0x00000080
#define CPU_REG_NVIC_CFSR_MSTKERR 0x00000010
#define CPU_REG_NVIC_CFSR_MUNSTKERR 0x00000008
#define CPU_REG_NVIC_CFSR_DACCVIOL 0x00000002
#define CPU_REG_NVIC_CFSR_IACCVIOL 0x00000001
/* ------------ HARD FAULT STATUS REG BITS ------------ */
#define CPU_REG_NVIC_HFSR_DEBUGEVT 0x80000000
#define CPU_REG_NVIC_HFSR_FORCED 0x40000000
#define CPU_REG_NVIC_HFSR_VECTTBL 0x00000002
/* ------------ DEBUG FAULT STATUS REG BITS ----------- */
#define CPU_REG_NVIC_DFSR_EXTERNAL 0x00000010
#define CPU_REG_NVIC_DFSR_VCATCH 0x00000008
#define CPU_REG_NVIC_DFSR_DWTTRAP 0x00000004
#define CPU_REG_NVIC_DFSR_BKPT 0x00000002
#define CPU_REG_NVIC_DFSR_HALTED 0x00000001
/*$PAGE*/
/*
*********************************************************************************************************
* CPU REGISTER MASK
*********************************************************************************************************
*/
#define CPU_MSK_NVIC_ICSR_VECT_ACTIVE 0x000001FF
/*$PAGE*/
/*
*********************************************************************************************************
* CONFIGURATION ERRORS
*********************************************************************************************************
*/
#ifndef CPU_CFG_ADDR_SIZE
#error "CPU_CFG_ADDR_SIZE not #define'd in 'cpu.h' "
#error " [MUST be CPU_WORD_SIZE_08 8-bit alignment]"
#error " [ || CPU_WORD_SIZE_16 16-bit alignment]"
#error " [ || CPU_WORD_SIZE_32 32-bit alignment]"
#elif ((CPU_CFG_ADDR_SIZE != CPU_WORD_SIZE_08) && \
(CPU_CFG_ADDR_SIZE != CPU_WORD_SIZE_16) && \
(CPU_CFG_ADDR_SIZE != CPU_WORD_SIZE_32))
#error "CPU_CFG_ADDR_SIZE illegally #define'd in 'cpu.h' "
#error " [MUST be CPU_WORD_SIZE_08 8-bit alignment]"
#error " [ || CPU_WORD_SIZE_16 16-bit alignment]"
#error " [ || CPU_WORD_SIZE_32 32-bit alignment]"
#endif
#ifndef CPU_CFG_DATA_SIZE
#error "CPU_CFG_DATA_SIZE not #define'd in 'cpu.h' "
#error " [MUST be CPU_WORD_SIZE_08 8-bit alignment]"
#error " [ || CPU_WORD_SIZE_16 16-bit alignment]"
#error " [ || CPU_WORD_SIZE_32 32-bit alignment]"
#elif ((CPU_CFG_DATA_SIZE != CPU_WORD_SIZE_08) && \
(CPU_CFG_DATA_SIZE != CPU_WORD_SIZE_16) && \
(CPU_CFG_DATA_SIZE != CPU_WORD_SIZE_32))
#error "CPU_CFG_DATA_SIZE illegally #define'd in 'cpu.h' "
#error " [MUST be CPU_WORD_SIZE_08 8-bit alignment]"
#error " [ || CPU_WORD_SIZE_16 16-bit alignment]"
#error " [ || CPU_WORD_SIZE_32 32-bit alignment]"
#endif
#ifndef CPU_CFG_ENDIAN_TYPE
#error "CPU_CFG_ENDIAN_TYPE not #define'd in 'cpu.h' "
#error " [MUST be CPU_ENDIAN_TYPE_BIG ]"
#error " [ || CPU_ENDIAN_TYPE_LITTLE]"
#elif ((CPU_CFG_ENDIAN_TYPE != CPU_ENDIAN_TYPE_BIG ) && \
(CPU_CFG_ENDIAN_TYPE != CPU_ENDIAN_TYPE_LITTLE))
#error "CPU_CFG_ENDIAN_TYPE illegally #define'd in 'cpu.h' "
#error " [MUST be CPU_ENDIAN_TYPE_BIG ]"
#error " [ || CPU_ENDIAN_TYPE_LITTLE]"
#endif
#ifndef CPU_CFG_STK_GROWTH
#error "CPU_CFG_STK_GROWTH not #define'd in 'cpu.h' "
#error " [MUST be CPU_STK_GROWTH_LO_TO_HI]"
#error " [ || CPU_STK_GROWTH_HI_TO_LO]"
#elif ((CPU_CFG_STK_GROWTH != CPU_STK_GROWTH_LO_TO_HI) && \
(CPU_CFG_STK_GROWTH != CPU_STK_GROWTH_HI_TO_LO))
#error "CPU_CFG_STK_GROWTH illegally #define'd in 'cpu.h' "
#error " [MUST be CPU_STK_GROWTH_LO_TO_HI]"
#error " [ || CPU_STK_GROWTH_HI_TO_LO]"
#endif
#ifndef CPU_CFG_CRITICAL_METHOD
#error "CPU_CFG_CRITICAL_METHOD not #define'd in 'cpu.h' "
#error " [MUST be CPU_CRITICAL_METHOD_INT_DIS_EN ]"
#error " [ || CPU_CRITICAL_METHOD_STATUS_STK ]"
#error " [ || CPU_CRITICAL_METHOD_STATUS_LOCAL]"
#elif ((CPU_CFG_CRITICAL_METHOD != CPU_CRITICAL_METHOD_INT_DIS_EN ) && \
(CPU_CFG_CRITICAL_METHOD != CPU_CRITICAL_METHOD_STATUS_STK ) && \
(CPU_CFG_CRITICAL_METHOD != CPU_CRITICAL_METHOD_STATUS_LOCAL))
#error "CPU_CFG_CRITICAL_METHOD illegally #define'd in 'cpu.h' "
#error " [MUST be CPU_CRITICAL_METHOD_INT_DIS_EN ]"
#error " [ || CPU_CRITICAL_METHOD_STATUS_STK ]"
#error " [ || CPU_CRITICAL_METHOD_STATUS_LOCAL]"
#endif
/*$PAGE*/
/*
*********************************************************************************************************
* MODULE END
*********************************************************************************************************
*/
#endif /* End of CPU module include. */
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