foc.asm

该软件是关于交流异步电动机磁场定向调速控制的汇编程序

splk #05555h, WD_KEY
splk #0AAAAh, WD_KEY
splk #006Fh, WD_CNTL
***********************************************************
* Function to initialise the Event Manager
* GPTimer 1 => Full PWM
* Enable Timer 1==0 interrupt on INT2
* All other pins are IO
***********************************************************
;Set up SYSCLK and PLL for C24 EVM with 10MHz ;External Clk（首先设置系统时钟和锁相环时钟）
ldp #DP_PF1
splk #00000010b,CKCR0 ;PLL disabled
; LPM0
;ACLK enabled
;SYSCLK 5MHz
splk #10110001b,CKCR1 ;10MHz clk in for ACLK
;Do not divide PLL
;PLL ratio x2
splk #10000011b,CKCR0 ;PLL enabled
;LPM0
;ACLK enabled
;SYSCLK 10MHz PLL x2
;Set up CLKOUT to be SYSCLK
splk #40C0h,SYSCR
;Clear all reset variables
lacc SYSSR
and #69FFh
sacl SYSSR
;Set up zero wait states for external memory
lacc #0004h
sacl *
out *,WSGR
;Clear All EV Registers（对所有事件管理器的寄存器清零）
zac
ldp #DP_EV
sacl GPTCON
sacl T1CNT
sacl T1CMP
sacl T1PER
sacl T1CON
sacl T2CNT
sacl T2CMP
sacl T2PER
sacl T2CON
sacl T3CNT
sacl T3CMP
sacl T3PER
sacl T3CON
sacl COMCON
sacl ACTR
sacl SACTR
sacl DBTCON
sacl CMPR1
sacl CMPR2
sacl CMPR3
sacl SCMPR1
sacl SCMPR2
sacl SCMPR3
sacl CAPCON
sacl CAPFIFO
sacl FIFO1
sacl FIFO2
sacl FIFO3
sacl FIFO4
;Initialise PWM ; No software dead-band
splk #666h,ACTR ;Bits 15-12 not used, no space vector
;PWM compare actions
;PWM6/PWM5 -Active Low/Active High
;PWM4/PWM3 -Active Low/Active High
;PWM2/PWM1 -Active Low/Active High
splk #100,CMPR1
splk #200,CMPR2
splk #300,CMPR3
splk #0207h,COMCON ;FIRST enable PWM operation
;Reload Full Compare when T1CNT=0
;Disable Space Vector
;Reload Full Compare Action when T1CNT=0
;Enable Full Compare Outputs
;Disable Simple Compare Outputs
;Full Compare Units in PWM Mode
splk #8207h,COMCON ;THEN enable Compare operation
splk #PWMPRD,T1PER ;Set T1 period
splk #0,T1CNT
splk #0A800h,T1CON ;Ignore Emulation suspend
;Cont Up/Down Mode连续增减记数模式
;x/1 prescalar
;Use own TENABLE
;Disable Timer,enable later
;Internal Clock Source
;Reload Compare Register when T1CNT=0
;Disable Timer Compare operation
;Enable Timer 1
lacc T1CON
or #40h
sacl T1CON
***********************************************************
* PWM Channel enable
* 74HC541 chip enable connected to IOPC3 of Digital
* input/output
***********************************************************
;Configure IO\function MUXing of pins
ldp #DP_PF2 ;Enable Power Security Function
splk #000Fh,OPCRA ;Ports A/B all IO except ADCs
splk #00F9h,OPCRB ;Port C as non IO function except
;IOPC2&3
splk #0FF08h,PCDATDIR ;bit IOPC3
*** END: PWM enable
***********************************************************
* Initialize ar7 as the stack for context save
* space reserved: DARAM B2 60h-80h (page 0)
***********************************************************
lar ar7,#79h
***********************************************************
* Incremental encoder initialization
* Capture for Incremental encoder correction with Xint2
***********************************************************
ldp #DP_EV
splk #0000h,T3CNT ;configure counter register
splk #00FFh,T3PER ;configure period register
splk #9870h,T3CON ;configure for QEP and enable Timer T3
splk #0E2F0h,CAPCON ;T3 is selected as Time base for QEP
*** END encoder/capture initialization
***********************************************************
* A/D initialization
***********************************************************
ldp #DP_PF1
splk #0003h,ADC_CNTL2 ;prescaler set for a 10MHz oscillator
*** END A/D initialization
****************************
* Variables initialization
****************************
ldp #ctrl_n ;control variable page
zac
sacl run
sacl Index
sacl xid
sacl xiq
sacl xin
sacl upi
sacl elpi
sacl Vref1
sacl Vref2
sacl Vref3
sacl da1
splk #1b9dh,VDC ;The DC voltage is 310V
;Vdc=1.726 in 4.12 with a Vbase=179.6V
splk #243h,VDCinvT ;T/(Vdc*2) or PWMPRD/VDC=579
;rescaled by 4.12
lacc #1
sacl da2
lacc #2
sacl da3
lacc #3
sacl da4
setc OVM
spm 0 ;no shift after multiplication
setc sxm ;sign extension mode
********************************
* END Variables initialization
********************************
****************************
* Enable Interrupts
****************************
;Clear EV IFR and IMR regs
ldp #DP_EV
splk #07FFh,IFRA
splk #00FFh,IFRB
splk #000Fh,IFRC
;Enable T1 Underflow Int
splk #0200h,IMRA ;PDPINT is disabled, with 0201h is enabled
splk #0000h,IMRB
splk #0000h,IMRC
;Set IMR for INT2 and clear any Flags
;INT2 (PWM interrupt) is used for motor control
;synchronization
ldp #0h
lacc #0FFh
sacl IFR
lacc #0000010b
sacl IMR
ldp #ctrl_n ;set the right control variable page
clrc INTM ;enable all interrupts, now we may
;serve interrupts
****************************
* END Enable Interrupts
****************************
***********************************************************
* Serial communication initialization
***********************************************************
ldp #DP_PF1
splk #00010111b,SCICCR ;one stop bit, no parity, 8bits
splk #0013h,SCICTL1 ;enable RX, TX, clk
splk #0000h,SCICTL2 ;disable SCI interrupts
splk #0000h,SCIHBAUD ;MSB |
splk #0082h,SCILBAUD ;LSB |9600 Baud for sysclk 10MHz
splk #0022h,SCIPC2 ;I/O setting
splk #0033h,SCICTL1 ;end initialization
***************
* Virtual Menu
***************
menu
clrc xf ;default mode (will be saved as context)
ldp #DP_PF1
bit SCIRXST,BIT6 ;is there any character available ?
bcnd menu,ntc ;if not repeat the cycle (polling)
lacc SCIRXBUF
and #0ffh ;only 8 bits !!!
ldp #option ;if yes, get it and store it in option
sacl option ;now in option we have the option
;number of the virtual menu
sub #031h ;is it option 1 ?
bcnd notone,neq ;if not branch to notone
*****************************
* Option 1): Speed reference
*****************************
navail11
ldp #DP_PF1
bit SCIRXST,BIT6 ;is there any character available (8 LSB)?
bcnd navail11,ntc ;if not repeat the cycle (polling)
lacc SCIRXBUF
and #0FFh ;take the 8 LSB
ldp #ctrl_n ;control variable page
sacl serialtmp ;if yes, get it and store it in serialtmp
navail12
ldp #DP_PF1
bit SCIRXST,BIT6 ;8 MSB available ?
bcnd navail12,ntc ;if not repeat the cycle (polling)
lacc SCIRXBUF,8 ;load ACC the upper byte
ldp #ctrl_n ;control variable page
add serialtmp ;add ACC with lower byte
sacl n_ref ;store it n_ref
b menu ;return to the main polling cycle
*** END Option 1): speed reference
notone
lacc option
sub #032h ;is it option 2 ?
bcnd nottwo,neq ;if not branch to nottwo
*****************************
* Option 2): DAC update
*****************************
navail21
ldp #DP_PF1
bit SCIRXST,BIT6 ;is there any character available (8 LSB)?
bcnd navail21,ntc ;if not repeat the cycle (polling)
lacc SCIRXBUF
and #0FFh ;take the 8 LSB
ldp #da1
sacl da1 ;if yes, get it and store it in da1
navail22
ldp #DP_PF1
bit SCIRXST,BIT6 ;is there any character available (8 LSB)?
bcnd navail22,ntc ;if not repeat the cycle (polling)
lacc SCIRXBUF
and #0FFh ;take the 8 LSB
ldp #da1
sacl da2 ;if yes, get it and store it in da2
navail23
ldp #DP_PF1
bit SCIRXST,BIT6 ;is there any character available (8 LSB)?
bcnd navail23,ntc ;if not repeat the cycle (polling)
lacc SCIRXBUF
and #0FFh ;take the 8 LSB
ldp #da1
sacl da3 ;if yes, get it and store it in da3
navail24
ldp #DP_PF1
bit SCIRXST,BIT6 ;is there any character available (8 LSB)?
bcnd navail24,ntc ;if not repeat the cycle (polling)
lacc SCIRXBUF
and #0FFh ;take the 8 LSB
ldp #da1
sacl da4 ;if yes, get it and store it in da4
b menu ;return to the main polling cycle
*** END Option 2): DAC update
nottwo
lacc option
sub #033h ;is it option 3 ?
bcnd notthree,neq ;if not branch to notthree
*****************************
* Option 3): flag run
*****************************
navail31
ldp #DP_PF1
bit SCIRXST,BIT6 ;is there any characteravailable (8 LSB)?
bcnd navail31,ntc ;if not repeat the cycle (polling)
lacc SCIRXBUF
and #0FFh ;take the 8 LSB
ldp #ctrl_n ;control variable page
sacl serialtmp ;if yes, get it and store it in serialtmp
navail32
ldp #DP_PF1
bit SCIRXST,BIT6 ;8 MSB available ?
bcnd navail32,ntc ;if not repeat the cycle (polling)
lacc SCIRXBUF,8 ;load ACC the upper byte
ldp #ctrl_n ;control variable page
add serialtmp ;add ACC with lower byte
sacl run ;store it in run
b menu ;return to the main polling cycle
*** END Option 3): iSdref
notthree
lacc option
sub #034h ;is it option 4 ?
bcnd notfour,neq ;if not branch to notthree
*****************************************************
* Option 4): current regulator parameters setting
*****************************************************
navail41
ldp #DP_PF1
bit SCIRXST,BIT6 ;is there any character available (8 LSB)?
bcnd navail41,ntc ;if not repeat the cycle (polling)
lacc SCIRXBUF
and #0FFh ;take the 8 LSB
ldp #ctrl_n ;control variable page
sacl serialtmp ;if yes, get it and store it in serialtmp
navail42
ldp #DP_PF1
bit SCIRXST,BIT6 ;8 MSB available ?
bcnd navail42,ntc ;if not repeat the cycle (polling)
lacc SCIRXBUF,8 ;load ACC the upper byte
ldp #ctrl_n ;control variable page
add serialtmp ;add ACC with lower byte
sacl Kpi ;store it in Kpi
navail43
ldp #DP_PF1
bit SCIRXST,BIT6 ;is there any character available (8 LSB)?
bcnd navail43,ntc ;if not repeat the cycle (polling)
lacc SCIRXBUF
and #0FFh ;take the 8 LSB
ldp #ctrl_n ;control variable page
sacl serialtmp ;if yes, get it and store it in serialtmp
navail44
ldp #DP_PF1
bit SCIRXST,BIT6 ;8 MSB available ?
bcnd navail44,ntc ;if not repeat the cycle (polling)
lacc SCIRXBUF,8 ;load ACC the upper byte
ldp #ctrl_n ;control variable page
add serialtmp ;add ACC with lower byte
sacl Ki ;store it in Ki
navail45
ldp #DP_PF1
bit SCIRXST,BIT6 ;is there any character available (8 LSB)?
bcnd navail45,ntc ;if not repeat the cycle (polling)
lacc SCIRXBUF
and #0FFh ;take the 8 LSB
ldp #ctrl_n ;control variable page
sacl serialtmp ;if yes, get it and store it in serialtmp
navail46
ldp #DP_PF1
bit SCIRXST,BIT6 ;8 MSB available ?
bcnd navail46,ntc ;if not repeat the cycle (polling)
lacc SCIRXBUF,8 ;load ACC the upper byte
ldp #ctrl_n ;control variable page
add serialtmp ;add ACC with lower byte
sacl Kcor ;store it in Kcor
b menu ;return to the main polling cycle
*** END Option 4): current regulator parameters setting
notfour
lacc option
sub #035h ;is it option 5 ?
bcnd notfive,neq ;if not branch to notfive
*****************************************************
* Option 5): speed regulator parameters setting
*****************************************************
navail51
ldp #DP_PF1
bit SCIRXST,BIT6 ;is there any available (8 LSB)?
bcnd navail51,ntc ;if not repeat the cycle (polling)
lacc SCIRXBUF
and #0FFh ;take the 8 LSB
ldp #ctrl_n ;control variable page
sacl serialtmp ;if yes, get it and store it in serialtmp
navail52
ldp #DP_PF1
bit SCIRXST,BIT6 ;8 MSB available ?
bcnd navail52,ntc ;if not repeat the cycle (polling)
lacc SCIRXBUF,8 ;load ACC the upper byte
ldp #ctrl_n ;control variable page
add serialtmp ;add ACC with lower byte
sacl Kpin ;store it in Kpin
navail53
ldp #DP_PF1
bit SCIRXST,BIT6 ;is there any character available (8 LSB)?
bcnd navail53,ntc ;if not repeat the cycle (polling)
lacc SCIRXBUF
and #0FFh ;take the 8 LSB
ldp #ctrl_n ;control variable page
sacl serialtmp ;if yes, get it and store it in serialtmp
navail54
ldp #DP_PF1
bit SCIRXST,BIT6 ;8 MSB available ?
bcnd navail54,ntc ;if not repeat the cycle (polling)
lacc SCIRXBUF,8 ;load ACC the upper byte
ldp #ctrl_n ;control variable page
add serialtmp ;add ACC with lower byte
sacl Kin ;store it in Kin
navail55
ldp #DP_PF1
bit SCIRXST,BIT6 ;is there any character available (8 LSB)?
bcnd navail55,ntc ;if not repeat the cycle (polling)
lacc SCIRXBUF
and #0FFh ;take the 8 LSB
ldp #ctrl_n ;control variable page
sacl serialtmp ;if yes, get it and store it in serialtmp
navail56
ldp #DP_PF1
bit SCIRXST,BIT6 ;8 MSB available ?
bcnd navail56,ntc ;if not repeat the cycle (polling)
lacc SCIRXBUF,8 ;load ACC the upper byte
ldp #ctrl_n ;control variable page
add serialtmp ;add ACC with lower byte
sacl Kcorn ;store it in Kcorn
b menu ;return to the main polling cycle
*** END Option 5): speed regulator parameters setting
notfive
B menu
******************************************************************
* END Sensored Speed FOC for AC three phase induction motor
******************************************************************