misc.c

uboot在arm处理器s3c2410的移植代码

		printf("OK\n");
	}

	if (eltec_board == 740)
	{
	    *(int *)&eerev.res[0] = 0;
	    sromSYM[20] = eerev.etheraddr[0];
	    sromSYM[21] = eerev.etheraddr[1];
	    sromSYM[22] = eerev.etheraddr[2];
	    sromSYM[23] = eerev.etheraddr[3];
	    sromSYM[24] = eerev.etheraddr[4];
	    sromSYM[25] = eerev.etheraddr[5];
	    printf("\nSRom:  Writing DEC21143 SYM info .. ");

	    if (dc_srom_store ((u_short *)sromSYM) == -1)
		printf("FAILED\n");
	    else
		printf("OK\n");
	}

	/* update CRC */
	eerev.crc = el_srom_checksum((u_char *)eerev.board, eerev.size);

	/* write new values */
	printf("\nSRom:  Writing revision info ...... ");
	if (el_srom_store((BLOCK_SIZE-sizeof(revinfo)), (u_char *)&eerev,
			    sizeof(revinfo), SECOND_DEVICE, FIRST_BLOCK) == -1)
	    printf("FAILED\n\n");
	else
	    printf("OK\n\n");

	/* write new values as shadow image to nvram */
	nvram_write (CFG_NV_SROM_COPY_ADDR, (void *)&eerev, CFG_SROM_SIZE);

    } /*if (initSrom) */

    /* copy current values as shadow image to nvram */
    if (initSrom == 0 && copyNv == 1)
	nvram_write (CFG_NV_SROM_COPY_ADDR, (void *)&eerev, CFG_SROM_SIZE);

    /* update environment */
    sprintf (buf, "%02x:%02x:%02x:%02x:%02x:%02x",
	    eerev.etheraddr[0], eerev.etheraddr[1],
	    eerev.etheraddr[2], eerev.etheraddr[3],
	    eerev.etheraddr[4], eerev.etheraddr[5]);
    setenv ("ethaddr", buf);

    /* print actual board identification */
    printf("Ident: %s  Ser %s  Rev %c%c\n",
	    eerev.board, (char *)&eerev.serial,
	    eerev.revision[0][0], eerev.revision[0][1]);

    /* global board ident */
    if (strstr ((char *)&eerev.board, "75") != NULL)
	eltec_board = 750;
    else
	eltec_board = 740;

   /*
    * L2 cache configuration
    */
#if defined(CFG_L2_BAB7xx)
    ptr = getenv("l2cache");
    if (*ptr == '0')
    {
	printf ("Cache: L2 NOT activated on BAB%d\n", eltec_board);
    }
    else
    {
	printf ("Cache: L2 activated on BAB%d\n", eltec_board);
	l2_cache_enable(*(int*)&eerev.res[0]);
    }
#endif

   /*
    * Reconfig ata reset timeout from environment
    */
    if ((ptr = getenv ("ata_reset_time")) != NULL)
    {
	ata_reset_time = (int)simple_strtoul (ptr, NULL, 10);
    }
    else
    {
	sprintf (buf, "%d", ata_reset_time);
	setenv ("ata_reset_time", buf);
    }

   /*
    * Reconfig scsi reset timeout from environment
    */
    if ((ptr = getenv ("scsi_reset_time")) != NULL)
    {
	scsi_reset_time = (int)simple_strtoul (ptr, NULL, 10);
    }
    else
    {
	sprintf (buf, "%d", scsi_reset_time);
	setenv ("scsi_reset_time", buf);
    }


    if ((bdf = pci_find_device(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_83C553, 0)) > 0)
    {
	if (pci_find_device(PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C860, 0) > 0)
	{
	    /* BAB740 with SCSI=IRQ 11; SCC=IRQ 9; no IDE; NCR860 at 80 Mhz */
	    scsi_dev_id = PCI_DEVICE_ID_NCR_53C860;
	    scsi_max_scsi_id = 7;
	    scsi_sym53c8xx_ccf = 0x15;
	    pci_write_config_byte (bdf, WINBOND_IDEIRCR, 0xb0);
	}

	if ((ptr = getenv ("ide_dma_off")) != NULL)
	{
	    u_long dma_off = simple_strtoul (ptr, NULL, 10);
	    /*
	    * setup user defined registers
	    * s.a. linux/drivers/ide/sl82c105.c
	    */
	    bdf |= PCI_BDF(0,0,1);            /* ide user reg at bdf function 1 */
	    if (dma_off & 1)
	    {
		pci_write_config_byte (bdf, 0x46, 1);
		printf("IDE:   DMA off flag set: Bus 0 : Dev 0\n");
	    }
	    if (dma_off & 2)
	    {
		pci_write_config_byte (bdf, 0x4a, 1);
		printf("IDE:   DMA off flag set: Bus 0 : Dev 1\n");
	    }
	    if (dma_off & 4)
	    {
		pci_write_config_byte (bdf, 0x4e, 1);
		printf("IDE:   DMA off flag set: Bus 1 : Dev 0\n");
	    }
	    if (dma_off & 8)
	    {
		pci_write_config_byte (bdf, 0x52, 1);
		printf("IDE:   DMA off flag set: Bus 1 : Dev 1\n");
	    }
	}
    }
    return (0);
}

/*----------------------------------------------------------------------------*/
/*
 * BAB740 uses KENDIN KS8761 modem chip with not common setup values
 */
#ifdef CONFIG_TULIP_SELECT_MEDIA

/* Register bits.
 */
#define BMR_SWR         0x00000001      /* Software Reset */
#define STS_TS          0x00700000      /* Transmit Process State */
#define STS_RS          0x000e0000      /* Receive Process State */
#define OMR_ST          0x00002000      /* Start/Stop Transmission Command */
#define OMR_SR          0x00000002      /* Start/Stop Receive */
#define OMR_PS          0x00040000      /* Port Select */
#define OMR_SDP         0x02000000      /* SD Polarity - MUST BE ASSERTED */
#define OMR_PM          0x00000080      /* Pass All Multicast */
#define OMR_PR          0x00000040      /* Promiscuous Mode */
#define OMR_PCS         0x00800000      /* PCS Function */
#define OMR_TTM         0x00400000      /* Transmit Threshold Mode */

/* Ethernet chip registers.
 */
#define DE4X5_BMR       0x000           /* Bus Mode Register */
#define DE4X5_TPD       0x008           /* Transmit Poll Demand Reg */
#define DE4X5_RRBA      0x018           /* RX Ring Base Address Reg */
#define DE4X5_TRBA      0x020           /* TX Ring Base Address Reg */
#define DE4X5_STS       0x028           /* Status Register */
#define DE4X5_OMR       0x030           /* Operation Mode Register */
#define DE4X5_SISR      0x060           /* SIA Status Register */
#define DE4X5_SICR      0x068           /* SIA Connectivity Register */
#define DE4X5_TXRX      0x070           /* SIA Transmit and Receive Register */
#define DE4X5_GPPR      0x078           /* General Purpose Port register */
#define DE4X5_APROM      0x048          /* Ethernet Address PROM */

/*----------------------------------------------------------------------------*/

static int INL(struct eth_device* dev, u_long addr)
{
    return le32_to_cpu(*(volatile u_long *)(addr + dev->iobase));
}

/*----------------------------------------------------------------------------*/

static void OUTL(struct eth_device* dev, int command, u_long addr)
{
    *(volatile u_long *)(addr + dev->iobase) = cpu_to_le32(command);
}

/*----------------------------------------------------------------------------*/

static void media_reg_init (
    struct eth_device* dev,
    u32 csr14,
    u32 csr15_dir,
    u32 csr15_v0,
    u32 csr15_v1,
    u32 csr6 )
{
    OUTL(dev, 0, DE4X5_OMR);            /* CSR6  */
    udelay(10 * 1000);
    OUTL(dev, 0, DE4X5_SICR);           /* CSR13 */
    OUTL(dev, 1, DE4X5_SICR);           /* CSR13 */
    udelay(10 * 1000);
    OUTL(dev, csr14, DE4X5_TXRX);       /* CSR14 */
    OUTL(dev, csr15_dir, DE4X5_GPPR);   /* CSR15 */
    OUTL(dev, csr15_v0,  DE4X5_GPPR);   /* CSR15 */
    udelay(10 * 1000);
    OUTL(dev, csr15_v1,  DE4X5_GPPR);   /* CSR15 */
    OUTL(dev, 0x00000301, DE4X5_SISR);  /* CSR12 */
    OUTL(dev, csr6, DE4X5_OMR);         /* CSR6 */
}

/*----------------------------------------------------------------------------*/

void dc21x4x_select_media(struct eth_device* dev)
{
    int i, status, ext;
    extern unsigned int eltec_board;

    if (eltec_board == 740)
    {
	printf("SYM media select "); /* BAB740 */
	/* start autoneg. with 10 mbit */
	media_reg_init (dev, 0x3ffff, 0x08af0008, 0x00a10008, 0x00a50008, 0x02400080);
	ext = status = 0;
	for (i=0; i<2000+ext; i++)
	{
	    status = INL(dev, DE4X5_SISR);
	    udelay(1000);
	    if (status & 0x2000) ext = 2000;
	    if ((status & 0x7000) == 0x5000) break;
	}

	/* autoneg. ok -> 100MB FD */
	if ((status & 0x0100f000) == 0x0100d000)
	{
	    media_reg_init (dev, 0x37f7f, 0x08270008, 0x00210008, 0x00250008, 0x03c40280);
	    printf("100baseTx-FD\n");
	}
	/* autoneg. ok -> 100MB HD */
	else if ((status & 0x0080f000) == 0x0080d000)
	{
	    media_reg_init (dev, 0x17f7f, 0x08270008, 0x00210008, 0x00250008, 0x03c40080);
	    printf("100baseTx\n");
	}
	/* autoneg. ok -> 10MB FD */
	else if ((status & 0x0040f000) == 0x0040d000)
	{
	    media_reg_init (dev, 0x07f7f, 0x08af0008, 0x00a10008, 0x00a50008, 0x02400280);
	    printf("10baseT-FD\n");
	}
	/* autoneg. fail -> 10MB HD */
	else
	{
	    media_reg_init (dev, 0x7f7f, 0x08af0008, 0x00a10008, 0x00a50008,
			(OMR_SDP | OMR_TTM | OMR_PM));
	    printf("10baseT\n");
	}
    }
    else
    {
	printf("MII media selected\n");                     /* BAB750 */
	OUTL(dev, OMR_SDP | OMR_PS | OMR_PM, DE4X5_OMR);    /* CSR6 */
    }
}
#endif /* CONFIG_TULIP_SELECT_MEDIA */

/*---------------------------------------------------------------------------*/