📄 ioman.lst
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549 2 ibuf=ioman_getPtr(ioman,bp);
550 2 memCpy(buf,ibuf,512);
551 2 ioman_resetCacheItem(ioman,bp);
552 2 ioman->sector[bp]=address;
553 2 ioman_setWritable(bp);
554 2 ioman_setValid(bp);
555 2 return(0);
556 2 }
557 1
558 1 if(ioman_writeSector(ioman,address,buf)){
559 2 return(-1);
560 2 }
561 1
562 1 return(0);
563 1 }
564 /*****************************************************************************/
565
566 void ioman_printStatus(IOManager *ioman)
567 {
568 1 euint16 c;
569 1
570 1 DBG((TXT("IO-Manager -- Report\n====================\n")));
571 1 DBG((TXT("Buffer is %i sectors, from %p to %p\n"),
572 1 ioman->numbuf,ioman->bufptr,ioman->bufptr+(ioman->numbuf*512)));
573 1 for(c=0;c<ioman->numbuf;c++){
574 2 if(ioman_isValid(c)){
575 3 DBG((TXT("BP %3i\t SC %8li\t\t US %i\t RF %i\t %s %s\n"),
578 3 c,ioman->sector[c],ioman_getUseCnt(ioman,c),ioman_getRefCnt(ioman,c),
578 3 ioman_isUserBuf(c) ? "USRBUF" : " ",
578 3 ioman_isWritable(c) ? "WRITABLE" : "READONLY"));
579 3 }
580 2 }
581 1 }
582 /*****************************************************************************/
583
ARM COMPILER V2.42, ioman 27/03/06 10:45:50 PAGE 10
ASSEMBLY LISTING OF GENERATED OBJECT CODE
*** EXTERNALS:
EXTERN CODE16 (lpc2000_debug_printf?T)
EXTERN CODE16 (if_readBuf?T)
EXTERN CODE16 (if_writeBuf?T)
EXTERN CODE16 (memCpy?T)
EXTERN CODE16 (memClr?T)
EXTERN CODE16 (?C?SDIV?T)
EXTERN CODE16 (?C?UDIV?T)
*** PUBLICS:
PUBLIC ioman_init?T
PUBLIC ioman_reset?T
PUBLIC ioman_getBuffer?T
PUBLIC ioman_setAttr?T
PUBLIC ioman_getAttr?T
PUBLIC ioman_getUseCnt?T
PUBLIC ioman_incUseCnt?T
PUBLIC ioman_decUseCnt?T
PUBLIC ioman_resetUseCnt?T
PUBLIC ioman_getRefCnt?T
PUBLIC ioman_incRefCnt?T
PUBLIC ioman_decRefCnt?T
PUBLIC ioman_resetRefCnt?T
PUBLIC ioman_pop?T
PUBLIC ioman_push?T
PUBLIC ioman_getPtr?T
PUBLIC ioman_getBp?T
PUBLIC ioman_readSector?T
PUBLIC ioman_writeSector?T
PUBLIC ioman_resetCacheItem?T
PUBLIC ioman_findSectorInCache?T
PUBLIC ioman_findFreeSpot?T
PUBLIC ioman_findUnusedSpot?T
PUBLIC ioman_findOverallocableSpot?T
PUBLIC ioman_putSectorInCache?T
PUBLIC ioman_flushSector?T
PUBLIC ioman_getSector?T
PUBLIC ioman_releaseSector?T
PUBLIC ioman_directSectorRead?T
PUBLIC ioman_directSectorWrite?T
PUBLIC ioman_flushRange?T
PUBLIC ioman_flushAll?T
PUBLIC ioman_printStatus?T
*** DATA SEGMENT '?CON?ioman':
00000000 ??S_7:
00000000 DB 'READONLY',0x00
00000009 ??S_6:
00000009 DB 'WRITABLE',0x00
00000012 ??S_5:
00000012 DB ' ',0x00
00000019 ??S_4:
00000019 DB 'USRBUF',0x00
00000020 ??S_3:
00000020 DB 'BP %3i',0x09,' SC %8li',0x09,0x09,' US'
00000034 DB ' %i',0x09,' RF %i',0x09,' %s %s',0x0A
00000046 DB 0x00
00000047 ??S_2:
00000047 DB 'Buffer is %i sectors, from %p to %p',0x0A
0000006B DB 0x00
0000006C ??S_1:
0000006C DB 'IO-Manager -- Report',0x0A,'=========='
0000008B DB '==========',0x0A,0x00
ARM COMPILER V2.42, ioman 27/03/06 10:45:50 PAGE 11
*** CODE SEGMENT '?PR?ioman_init?T?ioman':
30: esint8 ioman_init(IOManager *ioman, hwInterface *iface, euint8* bufferarea)
00000000 B510 PUSH {R4,LR}
00000002 ---- Variable 'bufferarea' assigned to Register 'R2' ----
00000002 1C0B MOV R3,R1 ; iface
00000004 ---- Variable 'iface' assigned to Register 'R3' ----
00000004 1C04 MOV R4,R0 ; ioman
00000006 ---- Variable 'ioman' assigned to Register 'R4' ----
32: ioman->iface=iface;
00000006 1C19 MOV R1,R3 ; iface
00000008 1C20 MOV R0,R4 ; ioman
0000000A 6001 STR R1,[R0,#0x0] ; ioman
34: ioman->bufptr = ioman_getBuffer(ioman,bufferarea);
0000000C 1C20 MOV R0,R4 ; ioman
0000000E 1C11 MOV R1,R2 ; bufferarea
00000010 F7FF BL ioman_getBuffer?T ; T=0x0001 (1)
00000012 FFF6 BL ioman_getBuffer?T ; T=0x0001 (2)
00000014 1C21 MOV R1,R4 ; ioman
00000016 6048 STR R0,[R1,#0x4]
35: ioman->numbuf = IOMAN_NUMBUFFER;
00000018 2106 MOV R1,#0x6
0000001A 1C20 MOV R0,R4 ; ioman
0000001C 8101 STRH R1,[R0,#0x8]
36: ioman->numit = IOMAN_NUMITERATIONS;
0000001E 2103 MOV R1,#0x3
00000020 1C20 MOV R0,R4 ; ioman
00000022 8141 STRH R1,[R0,#0xA]
38: ioman_reset(ioman);
00000024 1C20 MOV R0,R4 ; ioman
00000026 F7FF BL ioman_reset?T ; T=0x0001 (1)
00000028 FFEB BL ioman_reset?T ; T=0x0001 (2)
39: return(0);
0000002A 2000 MOV R0,#0x0
40: }
0000002C BC10 POP {R4}
0000002E BC08 POP {R3}
00000030 4718 BX R3
00000032 ENDP ; 'ioman_init?T'
*** CODE SEGMENT '?PR?ioman_reset?T?ioman':
43: void ioman_reset(IOManager *ioman)
00000000 B570 PUSH {R4-R6,LR}
00000002 1C04 MOV R4,R0 ; ioman
00000004 ---- Variable 'ioman' assigned to Register 'R4' ----
44: {
00000004 ; SCOPE-START
47: memClr(ioman->sector,sizeof(euint32)*ioman->numbuf);
00000004 1C20 MOV R0,R4 ; ioman
00000006 8900 LDRH R0,[R0,#0x8]
00000008 1C01 MOV R1,R0
0000000A 0089 LSL R1,R1,#0x2
0000000C 1C20 MOV R0,R4 ; ioman
0000000E 30A0 ADD R0,#0xA0
00000010 F7FF BL memClr?T ; T=0x0001 (1)
00000012 FFF6 BL memClr?T ; T=0x0001 (2)
48: memClr(ioman->status,sizeof(euint8) *ioman->numbuf);
00000014 1C20 MOV R0,R4 ; ioman
00000016 8900 LDRH R0,[R0,#0x8]
00000018 1C01 MOV R1,R0
0000001A 1C20 MOV R0,R4 ; ioman
0000001C 30B8 ADD R0,#0xB8
0000001E F7FF BL memClr?T ; T=0x0001 (1)
00000020 FFEF BL memClr?T ; T=0x0001 (2)
49: memClr(ioman->usage ,sizeof(euint8) *ioman->numbuf);
00000022 1C20 MOV R0,R4 ; ioman
00000024 8900 LDRH R0,[R0,#0x8]
00000026 1C01 MOV R1,R0
ARM COMPILER V2.42, ioman 27/03/06 10:45:50 PAGE 12
00000028 1C20 MOV R0,R4 ; ioman
0000002A 30BE ADD R0,#0xBE
0000002C F7FF BL memClr?T ; T=0x0001 (1)
0000002E FFE8 BL memClr?T ; T=0x0001 (2)
50: memClr(ioman->itptr ,sizeof(euint8) *ioman->numbuf);
00000030 1C20 MOV R0,R4 ; ioman
00000032 8900 LDRH R0,[R0,#0x8]
00000034 1C01 MOV R1,R0
00000036 1C20 MOV R0,R4 ; ioman
00000038 30CA ADD R0,#0xCA
0000003A F7FF BL memClr?T ; T=0x0001 (1)
0000003C FFE1 BL memClr?T ; T=0x0001 (2)
51: ioman_setError(ioman,IOMAN_NOERROR);
0000003E 2100 MOV R1,#0x0
00000040 1C20 MOV R0,R4 ; ioman
00000042 7301 STRB R1,[R0,#0xC]
53: for(nb=0;nb<ioman->numbuf;nb++){
00000044 2100 MOV R1,#0x0
00000046 ---- Variable 'nb' assigned to Register 'R1' ----
00000046 E039 B L_4 ; T=0x000000BC
54: for(ni=0;ni<ioman->numit;ni++){
00000048 L_11:
00000048 2200 MOV R2,#0x0
0000004A ---- Variable 'ni' assigned to Register 'R2' ----
0000004A E02C B L_9 ; T=0x000000A6
0000004C L_10:
55: ioman->stack[nb][ni].sector=0;
0000004C 2300 MOV R3,#0x0
0000004E 1C10 MOV R0,R2 ; ni
00000050 0400 LSL R0,R0,#0x10 ; ni
00000052 0C00 LSR R0,R0,#0x10
00000054 00C0 LSL R0,R0,#0x3
00000056 1C0D MOV R5,R1 ; nb
00000058 042D LSL R5,R5,#0x10 ; nb
0000005A 0C2D LSR R5,R5,#0x10
0000005C 2618 MOV R6,#0x18
0000005E 4375 MUL R5,R6
00000060 182D ADD R5,R0
00000062 1C20 MOV R0,R4 ; ioman
00000064 1940 ADD R0,R5 ; ioman
00000066 6103 STR R3,[R0,#0x10]
56: ioman->stack[nb][ni].status=0;
00000068 2300 MOV R3,#0x0
0000006A 1C10 MOV R0,R2 ; ni
0000006C 0400 LSL R0,R0,#0x10 ; ni
0000006E 0C00 LSR R0,R0,#0x10
00000070 00C0 LSL R0,R0,#0x3
00000072 1C0D MOV R5,R1 ; nb
00000074 042D LSL R5,R5,#0x10 ; nb
00000076 0C2D LSR R5,R5,#0x10
00000078 2618 MOV R6,#0x18
0000007A 4375 MUL R5,R6
0000007C 182D ADD R5,R0
0000007E 1C20 MOV R0,R4 ; ioman
00000080 1940 ADD R0,R5 ; ioman
00000082 7503 STRB R3,[R0,#0x14]
57: ioman->stack[nb][ni].usage =0;
00000084 2300 MOV R3,#0x0
00000086 1C10 MOV R0,R2 ; ni
00000088 0400 LSL R0,R0,#0x10 ; ni
0000008A 0C00 LSR R0,R0,#0x10
0000008C 00C0 LSL R0,R0,#0x3
0000008E 1C0D MOV R5,R1 ; nb
00000090 042D LSL R5,R5,#0x10 ; nb
00000092 0C2D LSR R5,R5,#0x10
00000094 2618 MOV R6,#0x18
ARM COMPILER V2.42, ioman 27/03/06 10:45:50 PAGE 13
00000096 4375 MUL R5,R6
00000098 182D ADD R5,R0
0000009A 1C20 MOV R0,R4 ; ioman
0000009C 1940 ADD R0,R5 ; ioman
0000009E 7543 STRB R3,[R0,#0x15]
58: }
000000A0 3201 ADD R2,#0x1
000000A2 0412 LSL R2,R2,#0x10
000000A4 0C12 LSR R2,R2,#0x10
000000A6 L_9:
000000A6 1C20 MOV R0,R4 ; ioman
000000A8 8940 LDRH R0,[R0,#0xA]
000000AA 1C03 MOV R3,R0
000000AC 1C10 MOV R0,R2 ; ni
000000AE 0400 LSL R0,R0,#0x10 ; ni
000000B0 0C00 LSR R0,R0,#0x10
000000B2 4298 CMP R0,R3
000000B4 D3CA BCC L_10 ; T=0x0000004C
59: }
000000B6 3101 ADD R1,#0x1
000000B8 0409 LSL R1,R1,#0x10
000000BA 0C09 LSR R1,R1,#0x10
000000BC L_4:
000000BC 1C20 MOV R0,R4 ; ioman
000000BE 8900 LDRH R0,[R0,#0x8]
000000C0 1C02 MOV R2,R0
000000C2 1C08 MOV R0,R1 ; nb
000000C4 0400 LSL R0,R0,#0x10 ; nb
000000C6 0C00 LSR R0,R0,#0x10
000000C8 4290 CMP R0,R2
000000CA D3BD BCC L_11 ; T=0x00000048
000000CC ; SCOPE-END
60: }
000000CC BC70 POP {R4-R6}
000000CE BC08 POP {R3}
000000D0 4718 BX R3
000000D2 ENDP ; 'ioman_reset?T'
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