s3c44b0x.h

aiji-s3c44b0在iar下的源码

/*
 * $Revision: 1.1 $
 */

// Cache
#define rNCACHBE0	(*(volatile unsigned *)0x1c00004)
#define rNCACHBE1	(*(volatile unsigned *)0x1c00008)

// Parallel I/O ports
#define rPCONC		(*(volatile unsigned *)0x1d20010)
#define rPDATC		(*(volatile unsigned *)0x1d20014)
#define rPUPC		(*(volatile unsigned *)0x1d20018)

#define rPCONE		(*(volatile unsigned *)0x1d20028)
#define rPDATE		(*(volatile unsigned *)0x1d2002c)
#define rPUPE		(*(volatile unsigned *)0x1d20030)

#define rPCONG		(*(volatile unsigned *)0x1d20040)
#define rPDATG		(*(volatile unsigned *)0x1d20044)
#define rPUPG		(*(volatile unsigned *)0x1d20048)

// Watchdog timer
#define rWTCON		(*(volatile unsigned *)0x1d30000)
#define rWTDAT		(*(volatile unsigned *)0x1d30004)
#define rWTCNT		(*(volatile unsigned *)0x1d30008)

// ADC
#define rADCCON		(*(volatile unsigned *)0x1d40000)
#define rADCPSR		(*(volatile unsigned *)0x1d40004)
#define rADCDAT		(*(volatile unsigned *)0x1d40008)

// LCD
#define rLCDCON1	(*(volatile unsigned *)0x1f00000)
#define rLCDCON2	(*(volatile unsigned *)0x1f00004)
#define rLCDCON3	(*(volatile unsigned *)0x1f00040)
#define rLCDSADDR1	(*(volatile unsigned *)0x1f00008)
#define rLCDSADDR2	(*(volatile unsigned *)0x1f0000c)
#define rLCDSADDR3	(*(volatile unsigned *)0x1f00010)
#define rREDLUT		(*(volatile unsigned *)0x1f00014)
#define rGREENLUT	(*(volatile unsigned *)0x1f00018)
#define rBLUELUT	(*(volatile unsigned *)0x1f0001c)
#define rDP1_2		(*(volatile unsigned *)0x1f00020)
#define rDP4_7		(*(volatile unsigned *)0x1f00024)
#define rDP3_5		(*(volatile unsigned *)0x1f00028)
#define rDP2_3		(*(volatile unsigned *)0x1f0002c)
#define rDP5_7		(*(volatile unsigned *)0x1f00030)
#define rDP3_4		(*(volatile unsigned *)0x1f00034)
#define rDP4_5		(*(volatile unsigned *)0x1f00038)
#define rDP6_7		(*(volatile unsigned *)0x1f0003c)
#define rDITHMODE	(*(volatile unsigned *)0x1f00044)