base.s

用来测试mcf5249的嵌入式测试程序

//*******************************************************************
//  File Name      : base.s
//  Abstract       : mcf5249 low code file
//  Modifications  :
//  Model   1.0
//  Rev.    Date       Coded by
//  0.0.1   03-05-29   K.H.Li         frist release
//*******************************************************************

;//********************************************************************
;//********************************************************************
;//********************************************************************

IDENTIFY_SIZE    .equ  62


    .global  _imm
    .global  _imm2
    .global  _DRAMBuffer

    .global  _Testflags
    .global  _Isrflags
    .global  _Keyflags
    .global  _Keyloop

    .global  _MP3Play_min
    .global  _MP3Play_sec

    .global  _AVol
    .global  _DVol

    .global  _IDEid
    .global  _IDEBuffer

    .global  _buffer0
    .global  _buffer1
    .global  _buffer2
    .global  _buffer3


	.section .myram

_imm:                .ds.l  1              ;//$20010000
_imm2:               .ds.l  1              ;//$20010004
_DRAMBuffer:         .ds.l  1              ;//$20000008

_Testflags:          .ds.w  1              ;//$20010008
_Isrflags:           .ds.w  1              ;//$2001000A
_Keyflags:           .ds.w  1              ;//$2001000C
_Keyloop:            .ds.w  1              ;//$2001000E

_MP3Play_min:        .ds.w  1              ;//$2001000E
_MP3Play_sec:        .ds.w  1              ;//$2001000E

_AVol:               .ds.b  1              ;//$20010010
_DVol:               .ds.b  1              ;//$20010011

_IDEid:              .ds.w  IDENTIFY_SIZE  ;//$20010012 - $2001008D
_IDEBuffer:          .ds.b  512            ;//$2001008E - $2001028D


_buffer0:      		 .ds.l  1
_buffer1:      		 .ds.l  1
_buffer2:      		 .ds.l  1
_buffer3:      		 .ds.l  1


;//********************************************************************
;//********************************************************************
;//********************************************************************

    .global _cpu_cache_flush
    .global _cpu_cache_disable
	.global _mcf5249_wr_cacr
	.global _mcf5249_wr_acr0
	.global _mcf5249_wr_acr1

	.section .text

/********************************************************************
 *	Routine to cleanly flush the cache, pushing all lines and 
 *	invalidating them.  This must be done to change the cache when 
 *	we have been operating in copyback mode (i.e. writes to a copyback 
 *	region are probably resident in the cache and not in the main store).
 */
_cpu_cache_flush:
	nop					/* synchronize - flush store buffer */
	moveq.l #0,d0		/* init line counter */
	moveq.l #0,d1		/* init set counter */
	move.l d0,a0		/* init An */

flushloop:

//	.dc.w	0xF4E8
	cpushl (a0)			/* push cache line a0 */

	add.l #0x0010,a0    /* increment setindex by 1 */
	addq.l #1,d1		/* increment set counter */
	cmpi.l #128,d1		/* are sets for this line done? */
	bne  flushloop

	moveq.l #0,d1		/* set counter to zero again */
	addq.l #1,d0		/* increment to next line */
	move.l d0,a0		/* set 0, line d0 into a0 as per cpushl */
	cmpi.l #4,d0
	bne  flushloop

	rts

/********************************************************************
 *	Routine to disable to cache completely
 *	THIS ROUTINE DISABLES IRQ's -- be warned
 */
_cpu_cache_disable:
	nop
	move.w #0x2700,SR		/* mask off IRQ's */
	jsr _cpu_cache_flush	/* flush the cache completely */
	clr.l d0
	movec d0,ACR0			/* ACR0 off */
	movec d0,ACR1			/* ACR1 off */
	move.l #0x01000000,d0   /* Invalidate and disable cache */
	movec d0,CACR			
	rts


/********************************************************************
 * These routines write to the special purpose registers in the ColdFire
 * core.  Since these registers are write-only in the supervisor model,
 * no corresponding read routines exist.
 */
_mcf5249_wr_cacr:
    move.l  4(sp),d0
	movec	d0,cacr
    rts

_mcf5249_wr_acr0:
    move.l  4(sp),d0
	movec	d0,acr0
    rts

_mcf5249_wr_acr1:
    move.l  4(sp),d0
	movec	d0,acr1
    rts

	.end