bootrom.asm

award bios 源代码,喜欢汇编程序及想研究主板BIOS程序的人可以参考哦.我是费了老大的劲才找到的哦.

		POST_CODE 0c0h
		mov	sp,0F80Bh
ifndef	Very_Very_Early_Init				;R132
		extrn	Ct_Very_Early_Init:Near
		jmp	Ct_Very_Early_Init
else	;Very_Very_Early_Init				;R132
		ret					;R132
endif	;Very_Very_Early_Init				;R132

REDO		ENDP

;R66 - start
;R74		ALIGN	8
;R74FLASH_ROUTINE_HEAD	db	'AWDFLASH'
;R74		extrn	KBC_12V_Control:near
;R74		extrn	Ct_ROM_Write_Enable:near
;R74		extrn	Ct_ROM_Write_Disable:near
;R74		extrn	Ct_Enable_ROM_Decode:near
;R74		extrn	Ct_Init:near
;R74		extrn	CT_Disable_ROM_Shadow:near
;R74		extrn	CT_Enable_ROM_Shadow:near
;R74		extrn	Ct_Special_REG_Save:near
;R74		extrn	Ct_After_Program:near
;R74		DW	Offset	DGROUP:KBC_12V_Control
;R74		DW	Offset	DGROUP:Ct_ROM_Write_Enable
;R74		DW	Offset	DGROUP:Ct_ROM_Write_Disable
;R74		DW	Offset	DGROUP:Ct_Enable_ROM_Decode
;R74		DW	Offset	DGROUP:Ct_Init
;R74		DW	Offset	DGROUP:CT_Disable_ROM_Shadow
;R74		DW	Offset	DGROUP:CT_Enable_ROM_Shadow
;R74		DW	Offset	DGROUP:Ct_Special_REG_Save
;R74		DW	Offset	DGROUP:Ct_After_Program
;R66 - end

		align	16
;R94 Chipboot_start:
ifndef	Chipboot_In_External_Boot_Block		     	;R151
		include	chipboot.asm
endif	;Chipboot_In_External_Boot_Block                ;R151

ifndef Reallocate_EarlyIO				;R78A
		include	earlyio.asm			;R78
endif ;Reallocate_EarlyIO				;R78A
		public	MEMORY_PRESENCE
MEMORY_PRESENCE:
ifdef	Special_Early_Init				;R134
		Rom_Call	Ct_Early_Init		;R134
endif	;Special_Early_Init				;R134
		rom_call	CPU_Init

;R73 - start
;R73A		mov	al,CMOS_AWARD_2 NMI_OFF
;R73A		Rom_Call Get_CMOS
;R73A		and	al,CPU_TYPE_MASK
;R73A		cmp	al,TYPE_M1
;R73A		jne	_Not_M1
;R73A
;R73A		Rom_Call	Enable_Linear_Burst
;R73A_Not_M1:
;R73 - end
;R77		mov	al,FALSE
;R77		rom_call	CPU_Cache

		mov	eax,cr0
		and	ax,NOT 4		;disable 80x87 emulation
		mov	cr0,eax

;-------- Original POST 3 -------------
;
;	Disable CMOS interrupts
;

;	CMOS REGISTER 0B: Default is all interrupts turned off,
;	date is in BCD format, time is in 24-hour mode, daylight savings
;	time is disabled.

		mov	al,0bh NMI_OFF
		mov	ah,10b
		rom_call	Set_CMOS		; set register B to its default

;	CMOS REGISTER 0A: Default is stage divider at 32.768 kHz, divider
;	output at 1.024 Khz, interrupting every 976.562 microseconds

		mov	al,0ah NMI_OFF		; set register A to its default
		mov	ah,26h
		rom_call	Set_Cmos

;R138A - start
;
;	Initialize various chips...
;

		mov	ax,0f000h
		mov	ds,ax

		mov	si,offset DGROUP:SYS_INITS
		mov	cx,SIZE_SYS_INITS
		cld

;
;	Initialize everything except for DMA page registers
;

ch0_dma_init:
		lodsw				; get the port
		mov	dx,ax			; put in correct reg

		lodsb				; get byte to ouput
		out	dx,al

		IODELAY

		loop	short ch0_dma_init

;
;	Initialize page registers
;

		mov	cx,0fh
		mov	dx,81h
		xor	ax,ax

init_pg_regs:
		IODELAY

		out	dx,al
		inc	dx

		loop	short init_pg_regs
;R138A - end

;R111 - start
ifdef	PCI_RESET_SUPPORT
;Don't destroy value of shutdown byte CMOS
		mov	al,0fh NMI_OFF
		Rom_call Get_Cmos
		cmp	al,0AAH		;warm booting
		je	short Not_Resume
endif;	PCI_RESET_SUPPORT
;R111 - end

		mov	al,0fh NMI_OFF
ifdef	Notebook_Power_Management			;R110
ZV_Resume_Byte	EQU	1Dh				;R110
		Rom_call	Get_Cmos		;R110
		cmp	al,ZV_Resume_Byte		;R110
		je	short Not_Resume		;R110
		mov	al,0fh NMI_OFF			;R110
endif	;Notebook_Power_Management			;R110
		xor	ah,ah
		rom_call	Set_Cmos
Not_Resume:						;R110
;--------------------------------------

;[]==============================================================[]
;	FORCE_COLDBOOT_ON_RESET: BIOS will force system to cold boot
;	if someone press the reset button during the warm boot. Since
;	warm boot flag will not be able to be cleared until POST_99,
;	this will provide a way to wipe out warm boot flag by
;	pressing reset button. The reason we have to use CMOS is
;	because memory is not initialized yet, we can not just
;	clear the warm boot flag. The warm boot flag will be cleared
;	until memory is initialized. Also, since we initial keyboard
;	in POST_5S, this is the latest place that keyboard status
;	flag remains valid.
;[]==============================================================[]

		mov	al, CMOS_OVERRIDE NMI_OFF
		rom_call	Get_CMOS
		mov	ah,al			; save CMOS info in ah

		in	al,STAT8042		; check if power on reset
		NEWIODELAY
		or	ah,COLD_BOOT		; assume not power on reset

		test	al,04			; cold boot?
		jnz	short p5_0		; no...

		and	ah,NOT COLD_BOOT	; power on reset, reset flag
p5_0:
		mov	al, CMOS_OVERRIDE NMI_OFF
		rom_call	Set_CMOS

		POST_CODE 0C1H

;R111B ;R111A - start
;R111B ifdef	PCI_RESET_SUPPORT
;R111B ;Clear warm boot flag stored in CMOS for next warm reset
;R111B 		mov	ax,G_RAM
;R111B 		mov	ds,ax
;R111B 		assume	ds:G_RAM
;R111B
;R111B 		mov	word ptr ds:USER_REBOOT, 0   	; not warm boot
;R111B
;R111B 		mov	al,0FH NMI_OFF
;R111B 		rom_call Get_Cmos
;R111B 		cmp	al,0AAH
;R111B 		jne	short Not_WarmBoot
;R111B
;R111B 		mov	word ptr ds:USER_REBOOT, CTRL_ALT_DEL	; warm boot
;R111B
;R111B 		;clear warm boot flag
;R111B 		mov	al,0FH NMI_OFF
;R111B 		xor	ah,ah
;R111B 		rom_call Set_Cmos
;R111B Not_WarmBoot:
;R111B endif;	PCI_RESET_SUPPORT
;R111B ;R111A - end

;R90		mov	ax,0fb00h
;R103		mov	ax,(0f000h+External_BootRom_Seg shr 4)	;R90
;R108		mov	ax,(0f000h+(External_BootRom_Seg and 0f000h) shr 4)	;R103
;R108 start
		rom_call	Search_BBSS_label	;Get BBSS table offset
		or	si,si				;have found?
		jz	short BootRom_MEMORY_PRESENCE	;No,jump to BootBlock memory sizing
		mov	bx,si				;save SI to BX
		mov	ax,cs:[si+BootExt_Off]		;Get BootExt code offset
		and	ax,0f000h			;-------------------
		shr	ax,4				;transfer to become segment
		add	ax,0f000h			;-------------------
;R108 end
		mov	ds,ax
		xor	ah,ah
		xor	si,si
		mov	cx,0fffh
@@:
		lodsb
		add	ah,al
		loop	@B
		cmp	ah,[si]
;R108		jne	short @F
		jne	short BootRom_MEMORY_PRESENCE		;R108
;R94		lea	si,DGROUP:CT_MEMORY_PRESENCE
;R94		sub	si,offset DGROUP:Chipboot_Start
;R94;R90		add	si,0b000h
;R94		add	si,External_BootRom_Seg			;R90
;R103		mov	si,External_BootRom_Seg			;R94
;R108		mov	si,External_BootRom_Seg and 0f000h	;R103
;R108 start
		mov	ax,cs:[bx+BootExt_Off]			;Get BootExt code offset
		and	ax,0f000h
		mov	si,ax					;store to SI
;R108 end
		add	si,MEMORY_PRESENCE_OFFSET		;R94
		mov	si,cs:[si]				;R94
		mov	sp,offset DGROUP:RTN_ADD
		jmp	si
		align	4					;R113
RTN_ADD:
		dw	offset DGROUP:Memory_Pres_Ret
;R108 @@:
BootRom_MEMORY_PRESENCE:				;R108
		ROM_CALL	CT_MEMORY_PRESENCE
		align	4					;R113
Memory_Pres_Ret:

;R138A;R138 - start
;R138A;
;R138A;	Initialize various chips...
;R138A;
;R138A
;R138A		mov	ax,0f000h
;R138A		mov	ds,ax
;R138A
;R138A		mov	si,offset DGROUP:SYS_INITS
;R138A		mov	cx,SIZE_SYS_INITS
;R138A		cld
;R138A
;R138A;
;R138A;	Initialize everything except for DMA page registers
;R138A;
;R138A
;R138Ach0_dma_init:
;R138A		lodsw				; get the port
;R138A		mov	dx,ax			; put in correct reg
;R138A
;R138A		lodsb				; get byte to ouput
;R138A		out	dx,al
;R138A
;R138A		IODELAY
;R138A
;R138A		loop	short ch0_dma_init
;R138A
;R138A;
;R138A;	Initialize page registers
;R138A;
;R138A
;R138A		mov	cx,0fh
;R138A		mov	dx,81h
;R138A		xor	ax,ax
;R138A
;R138Ainit_pg_regs:
;R138A		IODELAY
;R138A
;R138A		out	dx,al
;R138A		inc	dx
;R138A
;R138A		loop	short init_pg_regs
;R138A;R138 - end
;R111B - start
ifdef	PCI_RESET_SUPPORT
;Clear warm boot flag stored in CMOS for next warm reset
		mov	ax,G_RAM
		mov	ds,ax
		assume	ds:G_RAM

		mov	word ptr ds:USER_REBOOT, 0   	; not warm boot

		mov	al,0FH NMI_OFF
		rom_call Get_Cmos
		cmp	al,0AAH
		jne	short Not_WarmBoot

		mov	word ptr ds:USER_REBOOT, CTRL_ALT_DEL	; warm boot

		;clear warm boot flag
		mov	al,0FH NMI_OFF
		xor	ah,ah
		rom_call Set_Cmos
Not_WarmBoot:
endif;	PCI_RESET_SUPPORT
;R111B - end

;----------- Base memory test original in POST_8S -----------------
;Check first 64KB memory

		mov	ax,G_RAM
		mov	ds,ax
		ASSUME	DS:G_RAM
		mov	bx,word ptr ds:USER_REBOOT	;save flag

;R143ifdef	P6_BIOS_ONLY						;R112
;Test first 256Kb memory , Send endless beep if DRAM is bad

ifndef	beep_for_no_ram				;R145
		xor	eax,eax			;pattern to test
else;	beep_for_no_ram				;R145
		mov	eax,00ff55aah		;R145
endif;	beep_for_no_ram				;R145
		xor	dx,dx			;start from first 64k
Next_64K_Test:
		mov	es,dx			;segment to test
		cld

;R143A		mov	cx,4000H		;64k to write pattern
		mov	cx,2000h		;64k to read pattern	;R143A
		xor	di,di
		rep	stosd
		not	eax			;R143A
		mov	cx,2000H		;R143A
		rep	stosd			;R143A

		not	eax			;R143A
;R143A		mov	cx,4000h		;64k to read pattern
		mov	cx,2000h		;64k to read pattern	;R143A
		xor	di,di
		rep	scasd
		jnz	short Beep_Out		;error occured		;R143A

		not	eax			;R143A
		mov	cx,2000h		;R143A
		rep	scasd			;R143A

		jnz	short Beep_Out		;error occured		;R143A

		add	dh,10H			;next segment
		cmp	dh,40H			;256K address ?
		jne	short Next_64K_Test

		jmp	short Ok_256K

Beep_Out:
;Send beep thru speaker
		mov	bl,1			; beep on override
		ROM_CALL Snd_Spkr

		xor	cx,cx			; wait a moment
		loop	short $

		jmp	short Beep_Out		;endless loop

Ok_256K:
ifdef	beep_for_no_ram				;R145
		xor	eax,eax			;pattern to test
		xor	dx,dx			;start from first 64k

		mov	es,dx			;segment to test
		cld

		mov	cx,0ffffH		;64k to write pattern
		xor	di,di
		rep	stosd

endif;	beep_for_no_ram				;R145

;R143else;	P6_BIOS_ONLY						;R112
;R143
;R143		xor	di,di
;R143		mov	es,di
;R143		mov	cx,4000h
;R143		mov	eax,3c3cc3c3h
;R143		rep	stosd
;R143
;R143;Beep speaker if first 64k is bad
;R143
;R143		mov	cx,4000h
;R143		xor	di,di
;R143		rep	scasd
;R143		jnz	P8_9
;R143endif;	P6_BIOS_ONLY						;R112

		mov	word ptr ds:USER_REBOOT,bx	;restore flag

		mov	ax,G_RAM
		mov	ds,ax
		ASSUME	DS:G_RAM

;Clear setup and override flag						;R69
		and	byte ptr POST_FLAG,NOT (SETUP_ON+OVERRIDE_ON)	;R69

ifndef	PCI_RESET_SUPPORT					;R111A
;	Clear warm boot flag if reset button pressed

		mov	al, CMOS_OVERRIDE NMI_OFF	; al = CMOS index
		mov	ah,al				; ah = CMOS index
		rom_call	Get_Cmos

		test	al,COLD_BOOT			; cold boot?
		jnz	short p8_1			; no...

		mov	word ptr ds:[USER_REBOOT],0	; reset warm boot flag in RAM
p8_1:
;----- 11/25/94 RCH	Don't clear cold boot flag in CMOS
;		and	al,NOT COLD_BOOT		; clear warm boot flag
;
;		xchg	al,ah				; al = index, ah = value
;		rom_call	Set_Cmos
endif;	PCI_RESET_SUPPORT					;R111A

;	Here we both reset the parity flag as well as save
;	the reset flag after we have destroyed the 40: area.

		mov	si,word ptr ds:USER_REBOOT
		mov	word ptr ds:USER_REBOOT,si

;	Disable parity checking

		in	al,SYS1
		or	al,PARITY_CHECK_OFF
		NEWIODELAY
		out	SYS1,al

;R143ifndef	P6_BIOS_ONLY						;R112
;R143;	Clear 256K (4 x 64K) of memory.
;R143
;R143		xor	bx,bx			; bx = segment counter
;R143
;R143		ALIGN	4
;R143p8_2:
;R143		xor	di,di
;R143		mov	es,bx
;R143		mov	ecx,4000h
;R143		xor	eax,eax
;R143		rep	stosd			; clear using dwords
;R143
;R143		add	bx,1000h		; next 64k chunk
;R143		cmp	bx,4000h		; done with 256k?
;R143		jne	short p8_2			; no...
;R143
;R143;	Reenable parity
;R143;	Intensive parity checking the first 64K...
;R143;
;R143; Algorithm is:
;R143;
;R143; di = 0;					// beginning of segment
;R143; for (bx = 1; bx != 201h; bx +=100) {		// first we test low byte then high byte (0001h then 0100h)
;R143;	for (es = 0; es < 4000h; es += 1000h) {	// then we test first 256K
;R143;		es:[di] = 0;			// set background of 0000h
;R143;		es:[di] = bx;			// write test pattern
;R143;		bx = 5a5ah;			// reset to random in case bus transfer does nothing.
;R143;		bx = es:[di];			// read back
;R143;		if parity_error() halt_system();// port 61 bit 7 shows parity error
;R143;
;R143;		es:[di] = 0ffffh		// set background of 0ffffh
;R143;		es:[di] = bx;			// write test pattern
;R143;		bx = 5a5ah			// reset to random in case bus transfer does nothing.
;R143;		bx = es:[di];			// read test pattern
;R143;
;R143;		if parity_error() halt_system();// port 61 bit 7 shows parity
;R143;	}
;R143; }
;R143
;R143p8_3:
;R143		xor	di,di			; di = mem. pointer
;R143		mov	es,di			; es = test segment
;R143		mov	bx,1			; bx = test pattern
;R143
;R143		align	4
;R143
;R143;	First test on 0000h.
;R143
;R143p8_31:
;R143		mov	word ptr es:[di],0	; 0 background
;R143		mov	word ptr es:[di],bx	; write pattern
;R143
;R143		mov	bx,5a5ah		; reset bx
;R143		mov	bx,word ptr es:[di]
;R143
;R143;	Second test on 0ffffh
;R143
;R143p8_32:
;R143		mov	word ptr es:[di],0ffffh	; 1 background
;R143		mov	word ptr es:[di],bx	; write pattern
;R143
;R143		mov	bx,5a5ah		; reset bx
;R143		mov	bx,word ptr es:[di]
;R143
;R143		mov	es,di			; reset test segment
;R143
;R143		add	bx,100h			; next test high byte
;R143
;R143		cmp	bx,201h			; done?
;R143		jnz	short p8_31		; no
;R143
;R143p8_33:
;R143
;R143;	Test the validity of the first 64k of memory
;R143
;R143p8_4:
;R143		mov	eax,0aa55aa55h		; eax = test pattern
;R143		xor	ebx,ebx			; ebx = clear pattern
;R143		xor	dx,dx			; dx  = segment
;R143
;R143p8_40:
;R143		mov	es,dx
;R143
;R143		mov	ecx,4000h
;R143		ALIGN	4
;R143
;R143;	Test the validity of 64k of memory
;R143
;R143p8_41:
;R143		stosd				; save test pattern
;R143		mov	dword ptr es:[di],ebx	; change bus state
;R143		cmp	dword ptr es:[di-4],eax	; did it change?
;R143		jne	short p8_9		; yes, memory error...
;R143
;R143		mov	dword ptr es:[di-4],ebx	; clear	memory
;R143		loop	short p8_41
;R143
;R143		clc
;R143		jmp	short p8_91		; memory good
;R143
;R143p8_9:
;R143		mov	bl,1			; beep on override
;R143		ROM_CALL Snd_Spkr
;R143		xor	cx,cx
;R143		loop	short $
;R143		jmp	short P8_9
;R143
;R143p8_91:
;R143endif