e0post.asm

award bios 源代码,喜欢汇编程序及想研究主板BIOS程序的人可以参考哦.我是费了老大的劲才找到的哦.

;R85
;R85 		mov	al,0ffh 		; mask all interrupts on controller 2
;R85 		out	B8259+1,al		; tell controller
;R85 		NEWIODELAY
;R85 		dec	al			; mask all except timer (IRQ 8)
;R85 		out	A8259+1,al		; tell controller
;R85
;R85 ;
;R85 ;	Set up timer 0
;R85 ;
;R85
;R85 		mov	al,36h			; setup timer counter 0
;R85 		out	43h,al			; select counter 0
;R85 		NEWIODELAY
;R85
;R85 		xor	ax,ax			; INT every 1/18 seconds
;R85 		out	40h,al			; write lsb
;R85 		NEWIODELAY
;R85 		out	40h,al			; write msb
;R85
;R85 ;
;R85 ;	Wait for interrupts
;R85 ;
;R85
;R85 		xor	ax,ax			; clear interrupt flag
;R85 		sti				; enable interrupt
;R85 Wait_Irq0:
;R85 		cmp	byte ptr ds:[4f0h],0aaH	;second INT occured ?
;R85 		jne	short Wait_Irq0
;R85 		cli				; disable interrupts
;R85
;R85 ;
;R85 ;	Turn off all of the interrupts
;R85 ;
;R85 		mov	al,0ffh 		; mask all interrupts
;R85 		out	A8259+1,al		; tell controller
;R85 		NEWIODELAY
;R85
;R85 ;
;R85 ;	Restore INT 08h vector
;R85 ;
;R85
;R85 		mov	word ptr [int08],dx	; restore old vector
;R85 		mov	word ptr [int08+2],bx
;R85
;R85 ;Now , the content of 0:[4f8h] contain counter value
;R85 		mov	bx,1
;R85 		mov	eax,dword ptr ds:[4f8h]
;R85 		mov	ecx,55100		;factor to calculate
;R85 Next_Div:
;R85 		sub	eax,ecx
;R85 		jc	short Finish_Div
;R85 		inc	bx
;R85 		jmp	short Next_Div
;R85 Finish_Div:
;R85 		clc
;R85 No_Rdtsc:
;R85 		ret
;R85 New_CpuClk_Detection	endp
;R85
;R85 ;R79 - start
;R85 ;Table for CPU clock over 255Mhz
;R85 CPU_Over255MHz:
;R85 		db	333-256, 333-256-2,	CPU66		;66x5
;R85 		db	300-256, 300-256-2,	CPU60		;60x5
;R85 		db	266-256, 266-256-2,	CPU66		;66x4
;R85 		db	0					;end of table
;R85 ;R79 - end
;R85
;R85 ;Clock table for P5-class CPUs
;R85 NewCPU_Int_Clock_Tbl:
;R85
;R85 ;R34A ifdef	P6_BIOS_ONLY			       		;R34
;R85 		db	240,	238,	CPU60		;60x4	;R34
;R85 		db	233,	230,	CPU66		;66x3.5	;R34
;R85
;R85 		db	225,	223,	CPU66		;75x3	;R43
;R85
;R85 		db	210,	208,	CPU60		;60x3.5	;R34
;R85 ;R34A endif;	P6_BIOS_ONLY			       		;R34
;R85
;R85 ;R42A ifndef	NEW_P6_200_TBL				       	;R42
;R85 ;R42A 		db	200,	199,	CPU66		;66x3
;R85 ;R42A else;	NEW_P6_200_TBL				       	;R42
;R85 		db	200,	195,	CPU66		;66x3	;R42
;R85 ;R42A endif;	NEW_P6_200_TBL				       	;R42
;R85 		db	180,	179,	CPU60		;60x3
;R85 		db	166,	165,	CPU66		;66x2.5
;R85 		db	150,	149,	CPU60		;60x2.5
;R85 		db	133,	132,	CPU66		;66x2
;R85 		db	125,	124,	CPU50		;50x2.5
;R85 		db	120,	119,	CPU60		;60x2
;R85 		db	110,	109,	CPU50		;55x2
;R85 		db	100,   	 99,	CPU66		;66x1.5
;R85 ;R26A		db	 90,   	 89,	CPU60		;60x1.5
;R85 		db	 90,   	 88,	CPU60		;60x1.5	;R26A
;R85 		db	 83,   	 82,	CPU50		;55x1.5 ;R02-add
;R85 		db	 75,   	 74,	CPU50		;50x1.5
;R85 		db	 66,   	 65,	CPU66		;66x1
;R85 		db	 60,   	 59,	CPU66		;60x1
;R85 		db	 50,   	 49,	CPU66		;50x1
;R85 		db	 0		;end of table
;R85 ;R26 - ends
;R85
;R85 ;Clock detection for 386,486 & 586 CPUs
;R85
;R85 		ALIGN	16
;R85 MOV_SHAD_OFF	EQU	00000H
;R85 ;R22 MOV_SHAD_SEG	EQU	02000H
;R85 ;R57 MOV_SHAD_SEG	EQU	8000H			;R22
;R85 MOV_SHAD_SEG	EQU	4000h				;R57
;R85
;R85 Measure_CPU_Speed	proc	near
;R85
;R85 ;--------------------------------------
;R85 ;Copy code into RAM for speed detection
;R85 ;--------------------------------------
;R85
;R85 		mov	ax,cs			;GET THE SEGMENT
;R85 		mov	ds,ax			;AND SET UP SOURCE
;R85 		mov	ax,MOV_SHAD_SEG 	;SET THE SEGMENT FOR DEST
;R85 		mov	es,ax
;R85 		lea	si,S_Cpu		;GET THE OFFSET FOR SOURCE
;R85 		mov	di,MOV_SHAD_OFF 	;MOVE OFFSET IN FOR DEST
;R85 		lea	cx,LAST_S_Cpu		;GET SETUP FOR THE LENGTH
;R85 		sub	cx,si			;GET THE LENGTH OF THE CODE
;R85
;R85 		push	cx
;R85 		push	es
;R85 		push	di
;R85
;R85 		rep	movsb			;MOVE THE COPY CODE
;R85 		push	0f000h
;R85 		pop	ds
;R85
;R85 ;R26 - starts
;R85 ;Use new algorithm for CPU clock detection if CPU have RDTSC instruction
;R85 ;(0fh,31h)
;R85 		call	New_CpuClk_Detection	;use new method to check
;R85 		jc	short Cpu_NoRdtsc	;CPU clock ?
;R85 						;carry set, use old method
;R85
;R85 		mov	al,bl			;AL = Actual CPU clock found
;R85 		mov	dh,bl			;AL = Actual CPU clock found
;R85 		mov	CPU_INT_CLOCK[bp],bx	;actual internal CPU clock;R79
;R85 ;R79		mov	CPU_INT_CLOCK[bp],bl	;actual internal CPU clock
;R85 		mov	si,offset NewCPU_Int_Clock_Tbl	;new table for PENTIUM
;R85 ;R79 - start
;R85 		cmp	word ptr CPU_INT_CLOCK[bp],255	;over 255Mhz ?
;R85 		jbe	short Not_Over255Mhz
;R85
;R85 		mov	si,offset CPU_Over255MHz
;R85 Not_Over255Mhz:
;R85 ;R79 - end
;R85
;R85 		jmp	short R_Off_Clk
;R85 Cpu_NoRdtsc:
;R85 ;R26 - ends
;R85
;R85 ifndef	P6_BIOS_ONLY				;R71
;R85
;R85 ;--------------------------------------------------
;R85 ;Set KB high speed for test & save results(push bx)
;R85 ;--------------------------------------------------
;R85
;R85 ifdef	TOGGLE_8042_FOR_CPU_CLK_DETECT
;R85 		mov	al,1		;Set low speed for test
;R85 		call	F000_Out_8042_Pin
;R85 endif;	TOGGLE_8042_FOR_CPU_CLK_DETECT
;R85
;R85 		in	al,PORT61
;R85 		IODELAY
;R85 		push	ax 			;save PORT61 value
;R85
;R85 	;execute the CPU detection code in DRAM
;R85 		push	cs
;R85 		push	offset SHAD_ret_off
;R85 		push	MOV_SHAD_SEG
;R85 		push	MOV_SHAD_OFF
;R85 		retf
;R85 SHAD_ret_off:
;R85 	;return register values after calling S_CPU are
;R85 	; BH - CPU host clock
;R85 	; DL - CPU clock mode (x1, x2 ,x3 or x4)
;R85 		mov	al,bh
;R85 		mul	dl
;R85 		mov	si,ax
;R85
;R85 		pop	ax			;restore PORT61 value
;R85 		out	PORT61,al
;R85 		IODELAY
;R85
;R85 ifdef	TOGGLE_8042_FOR_CPU_CLK_DETECT
;R85 	;Save KB high speed result
;R85
;R85 		push	dx
;R85 		push	bx
;R85
;R85 ;-------------------------
;R85 ;Set KB low speed for test
;R85 ;-------------------------
;R85
;R85 		xor	al,al			;Set high speed for test
;R85 		call	F000_Out_8042_Pin
;R85
;R85 		in	al,PORT61		;save PORT61 value
;R85 		IODELAY
;R85 		push	ax
;R85
;R85 		push	cs
;R85 		push	offset SHAD_ret_off1
;R85 		push	MOV_SHAD_SEG
;R85 		push	MOV_SHAD_OFF
;R85 		retf
;R85 SHAD_ret_off1:
;R85
;R85 		pop	ax			;restore PORT61 value
;R85 		out	PORT61,al
;R85 		IODELAY
;R85
;R85 ;--------------------------------------------------------------
;R85 ;compare results of KB high & KB low speed, take the higher one
;R85 ;--------------------------------------------------------------
;R85
;R85 	;restore KB high speed results in ax, di
;R85
;R85 		mov	al,bh
;R85 		mul	dl
;R85 		cmp	ax,si
;R85 		pop	ax
;R85 		pop	di
;R85
;R85 		jae	short AUTO_CPUS_READY
;R85
;R85 	;use KB high speed result
;R85
;R85 		mov	bx,ax
;R85 		mov	dx,di
;R85
;R85 AUTO_CPUS_READY:
;R85 endif;	TOGGLE_8042_FOR_CPU_CLK_DETECT
;R85
;R85 	;write CPU_INTERNAL_CLOCK[bp] with tested value
;R85
;R85 		mov	al,bh			;system clock(integer) in AL
;R85 		mul	dl			;Sing/doub/treb value in DL
;R85 ;R79A		mov	CPU_INT_CLOCK[bp],al	;actual internal CPU clock
;R85 		mov	CPU_INT_CLOCK[bp],ax	;actual internal CPU clock;R79A
;R85
;R85 		mov	dl,FIXED_DISK_STEP[bp]	;get CPU type
;R85 		and	dl,CPU_TYPE_MASK	;get CPU type
;R85
;R85 	;special table for P24T , because the clock mode is x2.5
;R85 		cmp	dl,TYPE_P24T
;R85 		jne	short Not_P24T_2Point5
;R85 		test	byte ptr OVERRIDE[bp],DOUBLE_CLOCK
;R85 		jz	short Not_P24T_2Point5
;R85 		mov	si,offset P24T_Int_Clock_Tbl
;R85 		jmp	short R_Off_Clk
;R85 Not_P24T_2Point5:
;R85
;R85 ifdef	No_586_Support				;for 386 & 486 only
;R85 		jmp	short Not_Pentium
;R85 else	;No_586_Support
;R85
;R85 	;special table for P5 & M1 & K5
;R85 		mov	bh,byte ptr FIXED_DISK_STEP[bp]
;R85 		and	bh,CPU_TYPE_MASK
;R85 		mov	si,offset CPU_Int_Clock_Tbl	;table for PENTIUM
;R85 		cmp	bh,TYPE_586			;Pentium CPU?
;R85 		je	short Round_Off_It
;R85
;R85 		cmp	bh,TYPE_AMD5K86			;K5 CPU?
;R85 		je	short Round_Off_It
;R85
;R85 		mov	si,offset M1_Int_Clock_Tbl	;table for M1
;R85 		cmp	bh,TYPE_M1			;M1 CPU?
;R85 		je	short Round_Off_It
;R85
;R85 		jmp	short Not_Pentium
;R85
;R85 Round_Off_It:
;R85
;R85 		mov	al,dh
;R85 endif	;No_586_Support
;R85 endif;	P6_BIOS_ONLY				;R71
;R85
;R85 R_Off_Clk:
;R85
;R85 	;far call Round_Off_Clock
;R85
;R85 		FAR_CALL <offset Round_Off_Clock>,0E000h
;R85
;R85 		mov	CPU_INT_CLOCK[bp],bl	;actual internal CPU clock
;R85 		push	G_RAM
;R85 		pop	es
;R85
;R85 		mov	bl,cs:[si+2]			;SI+2 = system clock
;R85
;R85 ifndef	P6_BIOS_ONLY				;R71
;R85 ;R04A - start
;R85 ;There is two combination for 150Mhz , 75*2 and 50*3 , the default is 75*2
;R85 ;, we need to check the clock mode , if 3x , change host clock to 50Mhz
;R85 		mov	al,byte ptr FIXED_DISK_STEP[bp]
;R85 		and	al,CPU_TYPE_MASK
;R85 		cmp	al,TYPE_M1			;M1 CPU?
;R85 		jne	short NotM1_Cpu
;R85
;R85 		cmp	byte ptr CPU_INT_CLOCK[bp],150		;150Mhze ?
;R85 		jne	short NotM1_Cpu
;R85
;R85 		test	byte ptr OVERRIDE[bp],THREE_CLOCK	;3x mode ?
;R85 		jz	short NotM1_Cpu
;R85
;R85 	;set 50Mhz host clock if 3x mode
;R85 		mov	bl,CPU50				;set host clock
;R85
;R85 NotM1_Cpu:
;R85 ;R04A - end
;R85 endif;	P6_BIOS_ONLY				;R71
;R85
;R85 		mov	byte ptr es:[CPU_CLOCK],bl
;R85
;R85 	Not_P54C:
;R85 	Not_Pentium:
;R85
;R85 ;Show 100Mhz if 99Mhz
;R85 		cmp	byte ptr CPU_INT_CLOCK[bp],132
;R85 		je	short Set_133
;R85 		cmp	byte ptr CPU_INT_CLOCK[bp],99
;R85 		jne	short @F
;R85 Set_133:
;R85 		inc	byte ptr CPU_INT_CLOCK[bp]
;R85 	@@:
;R85
;R85 ifdef	TOGGLE_8042_FOR_CPU_CLK_DETECT
;R85 		mov	al,1
;R85 		call	F000_Out_8042_Pin
;R85 endif;	TOGGLE_8042_FOR_CPU_CLK_DETECT
;R85
;R85 ;-------------------
;R85 ;Clear temporary RAM
;R85 ;-------------------
;R85
;R85 		pop	di
;R85 		pop	es
;R85 		pop	cx
;R85 		xor	ax,ax
;R85 		rep	stosw			;clear ram
;R85
;R85 		mov	ax,G_RAM
;R85 		mov	es,ax
;R85 		assume	es:G_RAM
;R85
;R85 ;----------------------------
;R85 ;Special treatment for TI CPU
;R85 ;----------------------------
;R85
;R85 IF	BIOS_SUPPORT_TI_CPU
;R85 		cmp	bl,CPU33
;R85 		ja	short @F
;R85 		mov	al,FIXED_DISK_STEP[bp]
;R85 		and	al,CPU_TYPE_MASK
;R85 		cmp	al,TYPE_TI486SXL
;R85 		mov	dx,CPU_TI486SXL2
;R85 		je	short Set_TI_CPU
;R85 		cmp	al,TYPE_TI486SXLC
;R85 		jne	short @F
;R85 		mov	dx,CPU_TI486SXLC2
;R85 Set_TI_CPU:
;R85 		test	byte ptr FIXED_DISK_STEP[bp],01H;coprocess or exist
;R85 		jz	short No_Copro
;R85 		or	dl,01H				;restore copro. flag
;R85 No_Copro:
;R85
;R85 		mov	byte ptr FIXED_DISK_STEP[bp],dl
;R85 		mov	ah,FIXED_DISK_STEP[bp]
;R85 		mov	es:CPU_TYPE_FLAG,ah
;R85 		mov	al,CMOS_AWARD_2 NMI_OFF
;R85 		call	F000_Set_Cmos
;R85
;R85 		mov	ah,byte ptr OVERRIDE[bp]
;R85