📄 atbase.asm
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; []===========================================================[]
;
; NOTICE: THIS PROGRAM BELONGS TO AWARD SOFTWARE INTERNATIONAL(R)
; INC. IT IS CONSIDERED A TRADE SECRET AND IS NOT TO BE
; DIVULGED OR USED BY PARTIES WHO HAVE NOT RECEIVED
; WRITTEN AUTHORIZATION FROM THE OWNER.
;
; []===========================================================[]
;
;----------------------------------------------------------------------------
;Rev Date Name Description
;----------------------------------------------------------------------------
;R132A 12/20/97 MIL Add definition: SPECIAL_ISSUE_SYSTEM_RESET
; :
; Some chipset have no PCI_RESET_SUPPORT, so we can
; add a hook to reset some onboard chip, during system
; warm boot. About the code format ,please follow R132.
; ;
;R134 12/17/97 JSN Support ALADDIN 5 PCI hardware reset.
;R123D 12/15/97 BAR added detect pioneer 24x cdrom try more times.
; "Pioneer CD-ROM ATAPI Model DR-A24X 0102"
; Load data from shadow RAM 'CDROM_Boot_Delay'
;R133 12/08/97 DNL Added ACPI on/off option support
;R132 12/06/97 RAY Add definition: SPECIAL_ISSUE_SYSTEM_RESET
;
; If any chipset has a special design to reset the
; system, please add this definition in BIOS.CFG &
; add hook "Ct_Issue_System_Reset" in CHIPRUN.ASM.
;
; The purpose of this hook to let engineers to add
; customization codes in chipset dependent files but
; not in ATBASE.ASM !
;
;R131 12/06/97 MIL Added "Gx86_VSA_Final_Init" function before INT 19h.
;R130 12/05/97 PAL Added Trend_AntiVirus Support by Cbrom / vrs
;R121E 12/02/97 RIC Add a forever loop after PCI Reset routing to make system
; be stable. (VIA chip).
;R123C 11/27/97 STV Fixed some bootable CD diskette (from FIC) boot failure.
; The reason is our BIOS access CD use head is 16.So BIOS
; accessable maximum size is 1024*16*63 sectors(about 528MB)
; and CD diskette total space is large than 640MB.If data
; in CD are locate over 528MB then BIOS can not access it.
; Now we increase default head number to 255 for support
; access to 8.4GB
;R123B 11/26/97 BAR Fixed CD-ROM CDU571 can't boot
;R126A 11/10/97 AVN Fixed SiS 5591 pci reset to correct way.
;R129 11/07/97 RAY Kill some un-used external definitions
;R128A 11/04/97 RCH Fixed error coding for R128
;R121D 10/29/97 AVN Saving SiS5598 F000h Segment Code.
;R128 10/29/97 RCH Fixed system sometimes have no display if VGA's RAM
; is SGRAM while PCI reset is issued.
;R127 10/24/97 BAR Fixed boot sequence CD_ROM frist very slow
; if media is audio CD or can't bootable.
; This CDROM model list follow:
; Panasonic "MATSHITA CR_585"
;R123A 10/23/97 KVN Fixed CD-ROM CDU511 can't boot if connect it on slave
;R126 10/14/97 LAW Added SiS5591 PCI reset support
;R111B 10/09/97 RIC Fixed that OS/2 hang when BIOS define "ACPI_Support".
;R125 10/07/97 RCH Added boot from LAN option support
;R121C 10/06/97 AVN Fixed still hang in some custom like JETWAY when use
; AMD K6 166MHz.
;R121B 09/19/97 AVN Added PCI reset more delay time for SIS 5598, because
; still hang in some custom like JETWAY.
;R124 08/22/97 AVN Fixed SiS5598 with windows Memphis 98 cannot restart
; for gemlight, define 'Specail_align_for_Memphis98'
;R111A 08/08/97 DNL Fixed E820h function report error while memory hole enable
;R123 08/08/97 BAR Fixed CD-ROM CDU511 can't boot
;R122 08/05/97 RCH Added special diskette booting signature checking
;R121A 07/07/97 JKY Added PCI reset delay time for SIS_5598_PCI_RESET define
;R121 07/02/97 AVN Added SiS5598 PCI reset support, and rewrite PCI reset
; code for more readable.
;R116C 06/27/97 RCH The patch for SiS5571 is done by chipset dependent
; file(chippost.asm).
;R102C 06/24/97 RIC Add code to judge if VIA chip support PCI_RESET ?
;R116B 06/23/97 RCH Fixed system resource conflict if USB controller is
; enabled and Trident 9685 VGA card is plugged for
; SiS5571
;R120 06/13/97 KVN Support DriveA_Boot_Permit function by setup option
;r119 06/04/97 PTY Add code for RPB
;R118 05/29/97 KVN Added a new segment for store more BIOS code
;R116A 05/08/97 RCH The "unreport memory error" is caused by wrong memory
; sizing, kill the un-necessary code
;R115A 05/07/97 KVN Add ZIP100 bootable same as LS120
;R117 05/05/97 KVN Fix CDROM boot fail if system is SCO and emulate to floppy
;R116 05/02/97 RCH Added patch code to pass SCT test for M/B's not
; decode memory space properly. It's not a good idea
; but customer don't want to fix the hardware.
;R102B 05/02/97 RIC VIA 586B(ACPI) F version or later must clear
; VT586_ACPI+41h bit 7 before PCI RESET.
;R115 05/01/97 KVN Add LS120 bootable even floppy A exist
;R102A 05/01/97 RIC VIA 586B(ACPI) F version don't support PCI_RESET
;R113A 04/29/97 RAY The SW SMI issued for the VSA to finalize their own
; configuration should be moved from ATBASE.ASM before
; "INT 19h" to the chipset dependent routine: PM_FINAL_INIT
; in PMUPOST.ASM . This is somehow related to ECS's board
; which cannot boot up after ESCD is updated successfully !
;R114 04/18/97 KVN Added MP table for dynamic to built into shadow
;R113 04/01/97 KVN Added some code for Cyrix Gx86 & Cx5510
;R112 03/31/97 JSN Added ALiM153x_Hardware_RESET define.
;R111 03/03/97 KVN Added ACPI function support
;R110 02/20/97 KVN Add "A,CDROM,SCSI" and "C,CDROM,SCSI" 2 item choise
; for WINCOM customer when define "WINCOM_boot_item" switch
;R109A 01/24/97 AVN Fixed if dual CPU board and only single CPU plug will
; hang at wait CPU2 init
;R109 01/24/97 AVN Fixed if CPU2 ID match in CPUCODE.ASM and time is not
; enough to update micro code at sometime.
;R108 01/22/97 RAY Use 8000h as temp address for initializing the second
; CPU which is confict with the new architechure of
; decompressing combined stuffs.
;
; Note: 8000h is defined in COMMON.EQU as
; "CPU2_SEGMENT EQU 8000h"
;
;R107 01/22/97 RAY Delete the unnecessary codes
;R106 01/14/97 RCH Temporary patch for MP with 5 PCI slots
;R105 01/10/97 RCH Report correct L2 cache size for multiple Klamath
; CPU platform due to the cache is initiated just after
; INIT_MTRR , the old code is too early to read L2 size.
;R101A 01/09/97 KVN Cancel "No_Support_HiScan" parameter define for auto
; support EMM386.EXE 'HIGHSCAN'
;R104 12/24/96 AVN Support MP Secondary Update Code For 1M/2M EEPROM
;R103 12/05/96 RAY Do not try to issue any command to change the SMBASE
; of the second CPU if there is only one CPU installed.
; If we do so, it will cause this commnad left on the
; APIC bus waiting for response and thus decrease the
; performance a little bit.
;R102 11/25/96 RIC Support special PCI reset for VIA/VT680 chipset
;R101 11/25/96 KVN Ignore EMM386.EXE 'HIGHSCAN' parameter even added in
; config.sys
;R98A 11/19/96 KVN Fixed R98 cause CD boot NT4.0 can't install to SCSI
;R100 11/14/96 AVN Fixed Pass for AMIDIAG.EXE PnP BIOS test.
;R99 11/09/96 RCH BESTKEY+PS2 MOUSE+PENTUM 133Mhz cause installing
; WIN v3.11 sometimes hang up.
;R98 11/06/96 KVN Fixed some PCMCIA ROM card emulate boot to C error
;R97 11/01/96 KVN Added LS-120 support
;R96 10/21/96 KVN Fixed Toshiba CDROM (Model:XM-5522B booting failure if
; POST too fast
;R95 10/18/96 KEN Added F0DATA_DT for F000 descriptor as data segment.
;R94 10/17/96 DNL Added "E000_SMI_SUPPORT" definition to save F-segment
;R88A 10/16/96 KVN Fixed error of R88,this will cause don,t boot from A:
; when boot sequence chose "SCSI,A,C" but no SCSI drive
;R93A 10/16/96 STV Support only C boot be standard function
;R93 10/14/96 KVN Added "support_only_C_boot" definition for support only
; drive C boot
;R91A 10/11/96 RCH Fixed error coding of R91 , this will lose warm boot
; flag and only detect one CPU for MP system while
; warm booting
;R84A 10/09/96 RAY Problem in P5 Multi-P system:
; Sometimes fail to detect the 2nd CPU
; Solution:
; Change SMbase for the 2nd CPU after invoking.
;R92 10/08/96 KEN Add label USB_STATUS to record "USB Keyboard Support"
; enabled/disabled status.
;R91 10/08/96 RCH Fixed some 430HX M/Bs can not issue system reset
;R90A 10/05/96 RIC Lose external define.
;R90 10/04/96 RCH Rewrite routine Do_F000_Shadow to save codes
;R89 10/04/96 RCH Add SMI support for P6 multi-processor system
;R88 10/04/96 KVN Added boot HDD selectable function
;R81A 09/26/96 KVN Fixed R81 cause SCSI HDD can't boot because it is
; always replace INT 13h even no bootable CD
;R87 09/26/96 LRY 'Skip_HDD_Type_1_To_46', removed HD type table
;R86 09/24/96 RAY Fix P6 Multi-Processor system cannot boot from
; SCO-Unix:
;
; Change the Bus no. for PCI bus & ISA bus from
; 1-->0 & 0-->1 in the MP-table
;
;R85A 09/24/96 KEN Fixed coding mistake.
;R85 09/23/96 RCH Program local & I/O APIC ID to get proper non-conflict
; ID for P6 MP system.
;R84 09/20/96 RAY Add SMI support for 586 multi-processor system
;R83 09/20/96 KEN Add label USB_RAM_SEG for supporting USB_RAM with
; shadow RAM.
;R82 09/17/96 RCH Change memory size report method to get memory hole
; size table for function E820H
;R81 09/17/96 KVN Add bootable CDROM no emulation support for NT 4.0
;R80 09/07/96 RCH Move part of codes to ATORGS.ASM to save F-segment
; space
;R79 09/03/96 RCH Get boot sequence from BIOS data area instead of
; reading CMOS value
;R78 08/17/96 JASON No mesage when boot from CD_ROM
;R77A 07/11/96 RCH Should qualify E000_USED_BY_PCI due to non-PCI system
; otherwise compile failure
;R77 07/05/96 RAY In PCIPOST.ASM, we release the E0000-E7FFF shadow RAM
; for PCI ROM.
;
; If this area is assigned for PCI ROM, the E shadow
; cannot be disabled any more.
;
; Also, we have to clear the shadow RAM according to
; the shadow RAM used in order that the EMM386 can use
; this area as UMB. In PCIPOST.ASM, it can only clear
; the RAM before E8000h. Therefore, we have to modify
; the routine PREINT_19(ATBASE.ASM) to kill code from
; E8000 onward (which originally responsible for
; clearing E0000-E7FFF)
;
;R76 07/02/96 RAY Modify the devnode reporting the EXT memory size
; according to SCT 5.10
;R75 06/21/96 RCH Added a switch to scan option in E0000H while system
; BIOS only occupied 64K before booting
;R74 06/10/96 RCH Save both CPUIDs for DP system for INT 15H , function
; 0D042H to update P6 micro-code
;R73 06/07/96 RCH Don't build MP table entry 20,21 & 22 due to MPS test
; program failure for new IOAPIC
;R72 06/01/96 KVN Disable interrupt flag (CLI) to prevent SP or BP be
; destroy by any interrupt to fix system hang at POST_82S
; (80h port is 52h) sometimes
;R71 05/29/96 RCH Support special PCI reset for VLSI/LYNX chipset
;R70 05/23/96 RCH Record P6 L2 cache in temporary are for POST to show
; size
;R69 05/23/96 RCH Fixed system shutdown hang for P6/MP under NT 3.51
; server version.
;R68 05/10/96 KVN Don't display CDROM model at CDROM booting.because POST
; already show it
;R67 05/09/96 RCH Support PCI reset function for warm boot by using
; I/O 0CF9H to reset system.
;R66 05/07/96 KVN Fixed still display CDROM boot message if CDROM boot
; not be selected(i.e. BootSeq_Item value below 2)
;R65A 05/02/96 DNL Fixed coding mistake
;R65 04/23/96 DNL Added codes for Notebook Power Management
;R64A 04/18/96 RCH Fixed NT can not 2 P6 CPUs for Natoma DP system
;R64 03/26/96 RCH Added extra table for INTEL new APIC chip for PCI
; interrupt routing of MP table
;R63 03/21/96 KVN Support Floppy B drive bootable when drive A is error
; (use software swap floppy function)
;R62 03/04/96 RCH Disable MP table and local APIC initial if no IO APIC
; installed for P6 system. This can use the same BIOS
; to support both MP and Non-MP M/B.
;R61 02/13/96 KVN Fixed BIOS hang at 0C5h when old versio only shadowed
; E8000h-EFFFFh then update new version BIOS
;R60 01/30/96 KVN Ignore floppy boot sequence if floppy A type is none
; and INT13/INT40 not redirect
;R59 01/20/96 RCH Move the MP table to here , because it can be located
; at any where in 0E0000-FFFFF.
;R58 01/19/96 RCH Fixed P6 CPU can not execute NMI handler while the
; local APIC is enabled.according to MP v1.4 spec.
;R57 01/18/96 RCH Fixed system can not boot from CD-ROM if there is only
; one SCSI hard drive installed.
;R56A 01/15/96 KEN Reserve original updating ESCD method.
;R56 01/12/96 KEN Support updating ESCD with high memory (below 4GB).
;R55 01/10/96 RCH IBM real time coprocessor interface card always use
; E0000-EFFFF area, BIOS have to disable shadow and
; ROMCS# of this region.
;R50A 12/15/95 KVN Added "AVIDEO_AT_F000" option for Release full E000 segment
;R54 12/04/95 KVN Fixed system hang if run AZTECH sound card on VIA mother
; board
;R51A 11/28/95 RCH "Init_Mtrr" only available for P6 CPUs
;R53 11/22/95 KVN Fixed OAK 6x CD-ROM accerr error
;R52A 11/16/95 KVN Fixed R52 error
;R52 11/15/95 KVN Fixed GCD-R520B CD-ROM can't boot
;R51 11/09/95 RCH BIOS have to initial MTRR for all P6 CPUs , the BSP
; is programmed in POST , the AP CPUs are programmed
; here.
;R49A 11/07/95 RCH The P6 local APIC is different with P6, so don't read
; ID for P5
;R50 11/01/95 KVN Release full E000 segment size for none PNP bios
;R49 11/01/95 RCH The local APIC ID for P6/MP system is not zero for
; BSP, so BIOS have to modify the local APIC ID in MP
; table, otherwise system can not boot from NT
;R48 10/21/95 RCH Change MP detection method for P6 , I don't know
; this method is workable for P5 or not, so use ifdef
; to select different codes for P5 & P6
;R47 08/24/95 KVN Adjust E000 segment start offset at 0
;R46 08/22/95 RCH Move GDT table from pcipost.asm to atbase.asm
;R44A 08/04/95 KVN Fixed CD_ROM can't boot because R44
;R40A 08/03/95 RAY No_Support_4_IDE should placed after "include bios.cfg"
;R45 07/21/95 KVN Added HDD access AUTO mode
;R44 07/18/95 KVN Clear E000h shadow before call int 19h for emm386.exe
;R42A 07/17/95 KVN Fixed HDD CHS/LBA/LRG mode auto set function bug when
; not support 4 drive
;R43 07/11/95 KVN Added CD-ROM multi bootable function
;R42 07/08/95 KVN Added HDD CHS/LBA/LRG mode auto set function
;R41 06/15/95 KVN Fixed HDD can't boot if only 1 drive and bios include
; CD-ROM bootable drive
;R40 06/14/95 KVN Open Support_4_IDE feature become standard feature
;R39 06/13/95 KVN Reduce Post_func_call and F000_call code size
;R38 06/12/95 DNL Modify some codes to save more registers value
;R37 05/30/95 KVN Add display CD-ROM Model Number string
;R36 05/25/95 KVN Move MP POST codes from MULTISER.ASM
;R35 05/19/95 DNL Modify some codes to save more registers value
;R26A 05/12/95 KVN Fix R26 mistake
;R28 05/08/95 KVN Add CD-ROM bootable feature
;R27A 04/20/95 RCH Fixed error coding of R27
;R27 04/11/95 RCH Fixed OS2 intstallation failure if PS2 mouse not plug
;R26 03/30/95 KVN Fix HDD parameter wrong when drive1 is absent
;R25 03/28/95 RCH Set PARA instead of DWORD to make aligment available
;R24 03/18/95 RCH Pass PCI bus,device & function information for video
; ROM intialiation for PCI/VGA
;R23 09/10/94 RCH Move power on codes from atbase.asm to multiser.asm
;R22A 09/10/94 RCH Let override function be non-standard .
;R22 09/06/94 RAY Add No_Override_Key Option
;R21 07/09/94 RCH Upgrade EISA BIOS into v4.50G
;R20 07/06/94 RCH Added MP(Multi-processor) support
;R19 06/02/94 KVN Support 4 IDEs
;R18 05/24/94 RCH Give up some unused codes
;R17 05/20/94 KVN Open IDE LBA MODE function.
;R16 04/28/94 KVN Added IDE Logical Block Address (LBA) mode.
;R15 04/22/94 DNL Don't check AMD CPU SMI occured or not if system warm boot
;R14B 04/18/94 RAY R14 becomes invlid
;R14A 03/21/94 RAY Ct_Restore_Cyrix_Reg
;R14 03/19/94 RAY Lock Cyrix registers after restoring
;R13 03/19/94 RAY Don't include .EXT files any more
;R12 03/10/94 RCH Changed POST stack from 0FFFH to 1000H, because the
; Adaptec/7870 adaptor ROM can not accept odd stack
;R11 03/04/94 DNL Reinit IBM CPU register druing CPU reset.
;R10 03/01/94 KVN Fixed up PCMCIA drive can't boot when A drive is none.
;R09 02/21/94 DNL Fixed TI 486SXL2 CPU clock detection incorrect bug
;R08 02/05/94 KVN Referance atorgs.asm R19
;R07 01/12/94 RAY Add AMD/U5 SMI support
;R06A 12/13/93 RCH Change some codes for CYRIX CPU for write back cache
;R06 09/15/93 DNL Restore CYRIX CPU register druing system shutdown
;R05 08/26/93 RCH Don't turn on cache except system shutdown occured
;R04 05/31/93 DNL Restore CPU CLOCK mode from G_RAM if warm boot
;R03 05/17/93 RAY Restore CPU type from G_RAM only if CMOS failure.
;R02 05/13/93 RAY Add Power Management for resuming
;R01 02/15/93 RCH Restore CPU type from G_RAM if warm boot
PAGE 56,132
TITLE ATBASE -- 386 ROM/BIOS BASE
.386P
;[]-----------------------------------[]
;
; Award Software 386/486 BIOS
; Base + Initialization Rtns
; Initial Revision 17-Apr-1990
;
;[]-----------------------------------[]
IDE_LBA_MODE_SUPPORT EQU 1 ;R17
;R40A ifndef No_Support_4_IDE ;R40
;R40A Support_4_IDE EQU 1 ;R40
;R40A endif ;No_Support_4_IDE ;R40
.XLIST
INCLUDE BIOS.CFG
ifndef No_Support_4_IDE ;R40A
Support_4_IDE EQU 1 ;R40A
endif ;No_Support_4_IDE ;R40A
;R50A start
ifndef PNP_BIOS
AVIDEO_AT_F000 EQU 1
endif ;PNP_BIOS
;R50A end
.list
INCLUDE COMMON.EQU
INCLUDE POST.EQU
INCLUDE 8042.EQU
INCLUDE 8259.EQU
INCLUDE MATHCOP.EQU
INCLUDE CT_TABLE.EQU
INCLUDE COMMON.MAC
INCLUDE POST.MAC
include cd_rom.equ ;R81
;R13 INCLUDE ATORGS.EXT
;R13 INCLUDE CACHE.EXT
;R13 INCLUDE CHIPSET.EXT
;R13 INCLUDE CPU.EXT ;R12
;R13 INCLUDE CT_TABLE.EXT
INCLUDE PNP.EQU ;R100
;R114ifdef MP_SUPPORT ;R51
;R114ifdef P6_BIOS_ONLY ;R51A
;R114 extrn Init_Mtrr:near ;R51
;R114endif; P6_BIOS_ONLY ;R51A
;R114 extrn If_MP_PLUGGED:Near ;R103
;R114endif; MP_SUPPORT ;R51
extrn WAIT_REFRESH:near ;R123A
extrn HRDSKIO:far ;R57
extrn DSK_VECT:near ;R60
ifdef Trend_AntiVirus ;R130
extrn Ct_Shadow_R:Near ;R130
endif; Trend_AntiVirus ;R130
;R24 - start
ifdef PCI_BUS
;Pass PCI parameters for ROM initialization
extrn PCI_VGA_INFO:ABS
endif; PCI_BUS
;R24 - end
EXTRN CODE_END:NEAR ;R19
EXTRN INT_INITS:WORD ;R13
EXTRN SIZE_INT_INITS:ABS ;R13
EXTRN ENABLE_PARITY:NEAR ;R13
EXTRN GET_CMOS:NEAR ;R13
EXTRN SET_CMOS:NEAR ;R13
EXTRN FDC_PARS:BYTE ;R13
EXTRN INT18_HDLR:NEAR ;R13
;R99 EXTRN BAD_DISK_MSG:BYTE ;R13
EXTRN WR_STR_TTY:NEAR ;R13
EXTRN DRV0:NEAR ;R13
EXTRN DRV1:NEAR ;R13
EXTRN DRV2:NEAR ;R13
EXTRN DRV3:NEAR ;R13
extrn HDDC_ITEM:Near
extrn HDDD_ITEM:Near
ifdef Support_4_IDE
extrn HDDE_ITEM:Near
extrn HDDF_ITEM:Near
endif ;Support_4_IDE
extrn Get_HDD_CMOS_Info:Near
extrn Set_HDD_parm:Near
extrn POST_func_end:Near
extrn POST_VECT:Near
EXTRN CPU_CACHE:NEAR ;R13
EXTRN CT_VERY_EARLY_INIT:NEAR ;R13
EXTRN SND_SPKR:NEAR ;R13
EXTRN SYS_INITS:WORD ;R13
EXTRN SIZE_SYS_INITS:ABS ;R13
;R129 EXTRN PRG_CHIPSET_DEFAULT:NEAR ;R13
EXTRN BUFFER_8042_FULL:NEAR ;R13
EXTRN OUT_8042_FULL:NEAR ;R13
extrn Ct_Restore_Cyrix_Reg:Near ;R14A
;R21 - start
IF BUS_TYPE EQ EISA_BUS
extrn Ct_EISA_ID:near
extrn EISA_MOTHERBOARD_ID:byte
extrn Init_EISA_reg:near
ENDIF ;BUS_TYPE
;R21 - end
;r1000 start
;R13 include akbrd.ext
include port61.equ
;r1000 end
extrn POST_func_end:Near ;128k
extrn POST_VECT:Near ;128k
extrn Init_Cyrix_Reg:near ;R21
extrn IntCache_Item:near
extrn Exc9hdlr:near
extrn A20_On:near
extrn Normal_Post_Tests:near
EXTRN POST_3S:NEAR
EXTRN POST_4S:NEAR
EXTRN POST_5S:NEAR
EXTRN POST_6S:NEAR
EXTRN POST_7S:NEAR
EXTRN POST_8S:NEAR
EXTRN POST_9S:NEAR
EXTRN POST_10S:NEAR
EXTRN POST_11S:NEAR
EXTRN POST_12S:NEAR
EXTRN POST_13S:NEAR
EXTRN POST_14S:NEAR
EXTRN POST_15S:NEAR
EXTRN POST_16S:NEAR
EXTRN POST_17S:NEAR
EXTRN POST_18S:NEAR
EXTRN POST_19S:NEAR
EXTRN POST_20S:NEAR
EXTRN POST_21S:NEAR
EXTRN POST_22S:NEAR
EXTRN POST_23S:NEAR
EXTRN POST_24S:NEAR
EXTRN POST_25S:NEAR
EXTRN POST_26S:NEAR
EXTRN POST_27S:NEAR
EXTRN POST_28S:NEAR
EXTRN POST_29S:NEAR
EXTRN POST_30S:NEAR
EXTRN POST_48S:NEAR
EXTRN POST_49S:NEAR
EXTRN POST_50S:NEAR
EXTRN POST_51S:NEAR
EXTRN POST_52S:NEAR
EXTRN POST_53S:NEAR
EXTRN POST_54S:NEAR
EXTRN POST_55S:NEAR
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