📄 cstartup.lst
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20 #line 21 "C:\\AT91_Microcontroller\\AT91M55800A-LedSwing-GHS3_6-1_1\\AT91M55800A-LedSwing\\src\\Cstartup.arm"
21
22 ;--------------------------------
23 ;- ARM Core Mode and Status Bits
24 ;--------------------------------
25
26 ARM_MODE_USER EQU 0x10
27 ARM_MODE_FIQ EQU 0x11
28 ARM_MODE_IRQ EQU 0x12
29 ARM_MODE_SVC EQU 0x13
30 ARM_MODE_ABORT EQU 0x17
31 ARM_MODE_UNDEF EQU 0x1B
32 ARM_MODE_SYS EQU 0x1F
33
34 I_BIT EQU 0x80
35 F_BIT EQU 0x40
36 T_BIT EQU 0x20
37
38
39 ;------------------------------------------------------------------------------
40 ;- Area Definition
41 ;------------------------------------------------------------------------------
42 .section ".reset", .text
43 .align 4
44 ;------------------------------------------------------------------------------
45 ;- Exception vectors ( before Remap )
46 ;------------------------------------
47 ;- These vectors can be read at address 0 or at RAM address
48 ;- They ABSOLUTELY requires to be in relative addresssing mode in order to
49 ;- guarantee a valid jump. For the moment, all are just looping.
50 ;- If an exception occurs before remap, this would result in an infinite loop.
51 ;- To ensure if a exeption occurs before start application to infinite loop.
52 ;------------------------------------------------------------------------------
53 .globl __reset
54 __reset:
00000000 ea000006* 55 B InitReset ; Reset handler
56 undefvec:
00000004 eafffffe* 57 B undefvec ; Undefined Instruction
58 swivec:
00000008 eafffffe* 59 B swivec ; Software Interrupt
60 pabtvec:
0000000c eafffffe* 61 B pabtvec ; Prefetch Abort
62 dabtvec:
00000010 eafffffe* 63 B dabtvec ; Data Abort
64 rsvdvec:
00000014 eafffffe* 65 B rsvdvec ; reserved
66 irqvec:
00000018 eafffffe* 67 B irqvec ; IRQ
68 fiqvec:
0000001c eafffffe* 69 B fiqvec ; FIQ
70
71 .type __reset,$function
72 .size __reset,.-__reset
73
74 ;--------------------
75 ;- The reset handler
76 ;--------------------
77 InitReset:
78 ;------------------------------------------------------------------------------
79 ;- Low level Init (APMC, AIC, EBI, ....) by C function AT91F_LowLevelInit
80 ;------------------------------------------------------------------------------
81 .import AT91F_LowLevelInit
82 .import __iramend
83 .import __iramstart
84 .import __ghsbegin_picbase
85
86 ;- minumum C initialization
87 ;- call AT91_REG * AT91F_LowLevelInit( unsigned int * Vector,unsigned int * InternalRam)
88 ; r0 = AT91F_LowLevelInit(&VectorTable,&InternalRAM)
00000020 e51f9008* 89 ldr r9,= __ghsbegin_picbase
00000024 e51fd008* 90 ldr r13,=__iramend ; temporary stack in iram
91
00000028 e28f008c 92 add r0, pc,VectorTable-8-. ; @ where to read values (relative)
0000002c e51f1008* 93 ldr r1,=__iramstart
94
00000030 eb000000* 95 bl AT91F_LowLevelInit
96
97 ;--------------------------------------------
98 ;- Remap Command and jump on ABSOLUT address
99 ;--------------------------------------------
100
00000034 e59fc008* 101 ldr r12, PtInitRemap ; Get the real jump address ( after remap )
00000038 e3a01001 102 mov r1,#(0x1 << 0) ; Get the REMAP value
0000003c e5801000 103 str r1, [r0] ; Store the complete image with the remap command
104
105 ;- Jump to LINK address at its absolut address
00000040 e1a0f00c 106 mov pc, r12 ; Jump and break the pipeline
107
108 PtInitRemap:
00000044 00000000* 109 DCD InitRemap ; Address where to jump after REMAP
110 ;------------------------------------------------------------------------------
111 ;- The Reset Handler after Remap
112 ;-------------------------------
113 ;- From here, the code is executed from its link address, ie. 0x100 0000.
114 ;------------------------------------------------------------------------------
115 InitRemap:
116
117 ;------------------------------------------------------------------------------
118 ;- Stack Sizes Definition
119 ;------------------------
120 ;- Interrupt Stack requires 2 words x 8 priority level x 4 bytes when using
121 ;- the vectoring. This assume that the IRQ_ENTRY/IRQ_EXIT macro are used.
122 ;- The Interrupt Stack must be adjusted depending on the interrupt handlers.
123 ;- Fast Interrupt not requires stack If in your application it required you must
124 ;- be definehere.
125 ;- Other stacks are defined by default to save one word each.
126 ;- The System stack size is not defined and is limited by the free internal
127 ;- SRAM.
128 ;- User stack size is not defined and is limited by the free external SRAM.
129 ;------------------------------------------------------------------------------
130
131 IRQ_STACK_SIZE EQU (2*8*4) ; 2 words per interrupt priority level
132 FIQ_STACK_SIZE EQU (0*4) ; 0 words
133 ABT_STACK_SIZE EQU (1*4) ; 1 word
134 UND_STACK_SIZE EQU (1*4) ; 1 word
135
136 ;------------------------------------------------------------------------------
137 ;- Top of Stack Definition
138 ;-------------------------
139 ;- Fast Interrupt, Interrupt, Abort, Undefined and Supervisor Stack are located
140 ;- at the top of internal memory in order to speed the exception handling
141 ;- context saving and restoring.
142 ;- User (Application, C) Stack is located at the top of the external memory.
143 ;------------------------------------------------------------------------------
144
145
146
147 ;------------------------------------------------------------------------------
148 ;- Setup the stack for each mode
149 ;-------------------------------
00000048 e3a00d80 150 ldr r0, =((0x00000000)+(0x00002000))
151
152 ;- Set up Fast Interrupt Mode and set FIQ Mode Stack
0000004c e321f0d1 153 msr CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT
00000050 e1a0d000 154 mov r13, r0 ; Init stack FIQ
00000054 e2400000 155 sub r0, r0, #FIQ_STACK_SIZE
156
157 ;- Set up Interrupt Mode and set IRQ Mode Stack
00000058 e321f0d2 158 msr CPSR_c, #ARM_MODE_IRQ | I_BIT | F_BIT
0000005c e1a0d000 159 mov r13, r0 ; Init stack IRQ
00000060 e2400040 160 sub r0, r0, #IRQ_STACK_SIZE
161
162 ;- Set up Abort Mode and set Abort Mode Stack
00000064 e321f0d7 163 msr CPSR_c, #ARM_MODE_ABORT | I_BIT | F_BIT
00000068 e1a0d000 164 mov r13, r0 ; Init stack Abort
0000006c e2400004 165 sub r0, r0, #ABT_STACK_SIZE
166
167 ;- Set up Undefined Instruction Mode and set Undef Mode Stack
00000070 e321f0db 168 msr CPSR_c, #ARM_MODE_UNDEF | I_BIT | F_BIT
00000074 e1a0d000 169 mov r13, r0 ; Init stack Undef
00000078 e2400004 170 sub r0, r0, #UND_STACK_SIZE
171
172 ;- Set up Supervisor Mode and set Supervisor Mode Stack
0000007c e321f093 173 msr CPSR_c, #ARM_MODE_SVC | I_BIT
00000080 e1a0d000 174 mov r13, r0 ; Init stack Undef
175
176 ;------------------------------------------------------------------------------
177 ;- Before Init C Initialise C variables you can copy the from FLASH to RAM
178 ;------------------------------------------------------------------------------
179
180 ;- Enable interrupt
00000084 e321f053 181 msr CPSR_c, #ARM_MODE_SVC | F_BIT
182
183 ;------------------------------------------------------------------------------
184 ;- Branch on C code Main function (with interworking)
185 ;----------------------------------------------------
186 ;- Branch must be performed by an interworking call as either an ARM or Thumb
187 ;- _start function must be supported. This makes the code not position-
188 ;- independant. A Branch with link would generate errors
189 ;------------------------------------------------------------------------------
190 ;- Get Green Hills Linker Values
191 .import _start
192 .import __ghsend_stack
193 .import __ghsbegin_picbase
194 ;- Get Value for Rom/Copy
195 .weak __ghs_rambootcodestart ; 0 for RAM and Rom/run
196 .weak __ghs_rombootcodestart ; 0 for RAM and Rom/run
197
198
199 ;- minumum C initialization
200 ;- Calculate the _start address for diferents mode RAM or Rom/run or Rom copy
201 ;- minumum C initialization
00000088 e51f1008* 202 ldr r1,= __ghs_rambootcodestart
0000008c e51f4008* 203 ldr r4, = _start
00000090 e3510000 204 cmp r1, #0 ; if (rambootcodestart == 0)
00000094 0a000000* 205 beq done ; do nothing
00000098 e51f4008* 206 ldr r4, =__ghs_rombootcodestart ;else r4 = rombootcodestart
207 done:
208 ;-
0000009c e3a00000 209 mov r0,0
000000a0 e1a01000 210 mov r1,r0
000000a4 e1a02000 211 mov r2,r0
212 ;- Load The Green Hills register
000000a8 e51f9008* 213 ldr r9,= __ghsbegin_picbase
000000ac e51fd008* 214 ldr r13,= __ghsend_stack
215 ;- Branch to _start by interworking
000000b0 e1a0e00f 216 mov lr, pc
000000b4 e12fff14* 217 bx r4
218
219 ;------------------------------------------------------------------------------
220 ;- Loop for ever
221 ;---------------
222 ;- End of application. Normally, never occur.
223 ;- Could jump on Software Reset ( B 0x0 ).
224 ;------------------------------------------------------------------------------
225 End
000000b8 eafffffe* 226 b End
227
228 .type InitReset,$function
229 .size InitReset,.-InitReset
230
231 ;------------------------------------------------------------------------------
232 ;- Exception vectors ( after cstartup execution )
233 ;------------------------------------
234 ;- These vectors are read at RAM address after the remap command is performed in
235 ;- the EBI. As they will be relocated at address 0x0 to be effective, a
236 ;- RELATIVE addressing is FORBIDDEN. The only possibility to get an absolute
237 ;- addressing for an ARM vector is to read a PC relative value at a defined
238 ;- offset. It is easy to reserve the locations 0x20 to 0x3C (the 8 next
239 ;- vectors) for storing the absolute exception handler address.
240 ;- The AIC vectoring access vectors are saved in the interrupt and fast
241 ;- interrupt ARM vectors. So, only 5 offsets are required ( reserved vector
242 ;- offset is never used).
243 ;- The provisory handler addresses are defined on infinite loop and can be
244 ;- modified at any time.
245 ;- Note also that the reset is only accessible by a jump from the application
246 ;- to 0. It is an actual software reset.
247 ;- As the 13 (8+5) first location are used by the vectors, the read/write link
248 ;- address must be defined from 0x34 if internal data mapping is required.
249 ;- (use for that the option -rw- base=0x34
250 ;------------------------------------------------------------------------------
251 .globl VectorTable
252
253 VectorTable:
000000bc e59ff018 254 ldr pc, [pc, #&18] ; SoftReset
000000c0 e59ff018 255 ldr pc, [pc, #&18] ; UndefHandler
000000c4 e59ff018 256 ldr pc, [pc, #&18] ; SWIHandler
000000c8 e59ff018 257 ldr pc, [pc, #&18] ; PrefetchAbortHandler
000000cc e59ff018 258 ldr pc, [pc, #&18] ; DataAbortHandler
000000d0 e1a00000 259 nop ; Reserved
000000d4 e51fff20 260 ldr pc, [pc,#-0xF20] ; IRQ : read the AIC
000000d8 e51fff20 261 ldr pc, [pc,#-0xF20] ; FIQ : read the AIC
262
263 ;- There are only 5 offsets as the vectoring is used.
000000dc 00000000* 264 DCD SoftReset
000000e0 00000000* 265 DCD UndefHandler
000000e4 00000000* 266 DCD SWIHandler
000000e8 00000000* 267 DCD PrefetchAbortHandler
000000ec 00000000* 268 DCD DataAbortHandler
269
270 ;- Vectoring Execution function run at absolute addresss
271 SoftReset
000000f0 eafffffe* 272 b SoftReset
273 UndefHandler
000000f4 eafffffe* 274 b UndefHandler
275 SWIHandler
000000f8 eafffffe* 276 b SWIHandler
277 PrefetchAbortHandler
000000fc eafffffe* 278 b PrefetchAbortHandler
279 DataAbortHandler
00000100 eafffffe* 280 b DataAbortHandler
281
282 .type VectorTable,$function
283 .size VectorTable,.-VectorTable
284
285 ;------------------------------------------------------------------------------
286 ;- Manage exception
287 ;---------------
288 ;- The exception must be ensure in ARM mode
289 ;------------------------------------------------------------------------------
290 .align 4
291
292 .global AT91F_Default_FIQ_handler
293
294 AT91F_Default_FIQ_handler
00000104 eafffffe* 295 b AT91F_Default_FIQ_handler
296
297 .type AT91F_Default_FIQ_handler,$function
298 .size AT91F_Default_FIQ_handler,.-AT91F_Default_FIQ_handler
299
300 .global AT91F_Default_IRQ_handler
301
302 AT91F_Default_IRQ_handler
00000108 eafffffe* 303 b AT91F_Default_IRQ_handler
304
305 .type AT91F_Default_IRQ_handler,$function
306 .size AT91F_Default_IRQ_handler,.-AT91F_Default_IRQ_handler
307
308 .global AT91F_Spurious_handler
309
310 AT91F_Spurious_handler
0000010c eafffffe* 311 b AT91F_Spurious_handler
312
313 .type AT91F_Spurious_handler,$function
314 .size AT91F_Spurious_handler,.-AT91F_Spurious_handler
315
316 END
317
00000110 010a0688* 318 00000114 010a0688*
00000118 010a0688*
0000011c 010a0688*
00000120 010a0688*
00000124 010a0688*
00000128 010a0688*
0000012c 010a0688*
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