📄 hpi_epp.rpt
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Number of function block inputs used/remaining: 17/37
Number of signals used by logic mapping into function block: 17
Signal Total Imp Exp Unused Loc Pwr Pin Pin Pin
Name Pt Pt Pt Pt Mode # Type Use
(unused) 0 0 0 5 FB2_1 (b)
(unused) 0 0 0 5 FB2_2 99 GSR/I/O
(unused) 0 0 0 5 FB2_3 (b)
(unused) 0 0 0 5 FB2_4 (b)
(unused) 0 0 0 5 FB2_5 1 GTS/I/O
(unused) 0 0 0 5 FB2_6 2 GTS/I/O
(unused) 0 0 0 5 FB2_7 (b)
(unused) 0 0 0 5 FB2_8 3 GTS/I/O
read_data_mtridata_pd<4>/read_data_mtridata_pd<4>_SETF
2 0 0 3 FB2_9 STD 4 GTS/I/O (b)
read_data_mtridata_pd<3>/read_data_mtridata_pd<3>_SETF
2 0 0 3 FB2_10 STD (b) (b)
read_data_mtridata_pd<2>/read_data_mtridata_pd<2>_SETF
2 0 0 3 FB2_11 STD 6 I/O (b)
read_data_mtridata_pd<1>/read_data_mtridata_pd<1>_SETF
2 0 0 3 FB2_12 STD 7 I/O I
read_data_bufferdata<5>
3 0 0 2 FB2_13 STD (b) (b)
read_data_bufferdata<4>
3 0 0 2 FB2_14 STD 8 I/O I
read_data_bufferdata<3>
3 0 0 2 FB2_15 STD 9 I/O I
read_data_bufferdata<2>
3 0 0 2 FB2_16 STD (b) (b)
read_data_bufferdata<1>
3 0 0 2 FB2_17 STD 10 I/O (b)
read_data_bufferdata<10>
3 0 0 2 FB2_18 STD (b) (b)
Signals Used by Logic in Function Block
1: byteflage 7: hd<10>.PIN 13: read_data_bufferdata<1>
2: hd<1>.PIN 8: ndstrb 14: read_data_bufferdata<2>
3: hd<2>.PIN 9: nwrite 15: read_data_bufferdata<3>
4: hd<3>.PIN 10: read_data_bufferdata<10>
16: read_data_bufferdata<4>
5: hd<4>.PIN 11: read_data_bufferdata<11>
17: read_data_bufferdata<9>
6: hd<5>.PIN 12: read_data_bufferdata<12>
Signal 1 2 3 4 Signals FB
Name 0----+----0----+----0----+----0----+----0 Used Inputs
read_data_mtridata_pd<4>/read_data_mtridata_pd<4>_SETF
X......XX..X...X........................ 5 5
read_data_mtridata_pd<3>/read_data_mtridata_pd<3>_SETF
X......XX.X...X......................... 5 5
read_data_mtridata_pd<2>/read_data_mtridata_pd<2>_SETF
X......XXX...X.......................... 5 5
read_data_mtridata_pd<1>/read_data_mtridata_pd<1>_SETF
X......XX...X...X....................... 5 5
read_data_bufferdata<5>
X....X.XX............................... 4 4
read_data_bufferdata<4>
X...X..XX............................... 4 4
read_data_bufferdata<3>
X..X...XX............................... 4 4
read_data_bufferdata<2>
X.X....XX............................... 4 4
read_data_bufferdata<1>
XX.....XX............................... 4 4
read_data_bufferdata<10>
X.....XXX............................... 4 4
0----+----1----+----2----+----3----+----4
0 0 0 0
Legend:
Total Pt - Total product terms used by the macrocell signal
Imp Pt - Product terms imported from other macrocells
Exp Pt - Product terms exported to other macrocells
in direction shown
Unused Pt - Unused local product terms remaining in macrocell
Loc - Location where logic was mapped in device
Pwr Mode - Macrocell power mode
Pin Type/Use - I - Input GCK - Global Clock
O - Output GTS - Global Output Enable
(b) - Buried macrocell GSR - Global Set/Reset
X(@) - Signal used as input (wire-AND input) to the macrocell logic.
The number of Signals Used may exceed the number of FB Inputs Used due
to wire-ANDing in the switch matrix.
*********************************** FB3 ***********************************
Number of function block inputs used/remaining: 17/37
Number of signals used by logic mapping into function block: 17
Signal Total Imp Exp Unused Loc Pwr Pin Pin Pin
Name Pt Pt Pt Pt Mode # Type Use
(unused) 0 0 0 5 FB3_1 (b)
(unused) 0 0 0 5 FB3_2 23 GCK/I/O
(unused) 0 0 0 5 FB3_3 (b)
(unused) 0 0 0 5 FB3_4 (b)
write_data_mtridata_qint<1>
2 0 0 3 FB3_5 STD 24 I/O (b)
write_data_mtridata_qint<0>
2 0 0 3 FB3_6 STD 25 I/O (b)
write_data_mtridata_q<9>/write_data_mtridata_q<9>_RSTF
2 0 0 3 FB3_7 STD (b) (b)
write_data_mtridata_q<8>/write_data_mtridata_q<8>_RSTF
2 0 0 3 FB3_8 STD 27 GCK/I/O (b)
write_data_mtridata_q<15>/write_data_mtridata_q<15>_RSTF
2 0 0 3 FB3_9 STD 28 I/O (b)
write_data_mtridata_q<14>/write_data_mtridata_q<14>_RSTF
2 0 0 3 FB3_10 STD (b) (b)
write_data_mtridata_q<13>/write_data_mtridata_q<13>_RSTF
2 0 0 3 FB3_11 STD 29 I/O (b)
write_data_mtridata_q<12>/write_data_mtridata_q<12>_RSTF
2 0 0 3 FB3_12 STD 30 I/O (b)
write_data_mtridata_q<11>/write_data_mtridata_q<11>_RSTF
2 0 0 3 FB3_13 STD (b) (b)
write_data_mtridata_q<10>/write_data_mtridata_q<10>_RSTF
2 0 0 3 FB3_14 STD 32 I/O (b)
read_data_bufferdata<9>
3 0 0 2 FB3_15 STD 33 I/O (b)
read_data_bufferdata<8>
3 0 0 2 FB3_16 STD (b) (b)
read_data_bufferdata<7>
3 0 0 2 FB3_17 STD 34 I/O (b)
read_data_bufferdata<6>
3 0 0 2 FB3_18 STD (b) (b)
Signals Used by Logic in Function Block
1: byteflage 7: hd<9>.PIN 13: write_data_mtridata_qint<3>
2: pd<0>.PIN 8: ndstrb 14: write_data_mtridata_qint<4>
3: pd<1>.PIN 9: nwrite 15: write_data_mtridata_qint<5>
4: hd<6>.PIN 10: write_data_mtridata_qint<0>
16: write_data_mtridata_qint<6>
5: hd<7>.PIN 11: write_data_mtridata_qint<1>
17: write_data_mtridata_qint<7>
6: hd<8>.PIN 12: write_data_mtridata_qint<2>
Signal 1 2 3 4 Signals FB
Name 0----+----0----+----0----+----0----+----0 Used Inputs
write_data_mtridata_qint<1>
..X....X................................ 2 2
write_data_mtridata_qint<0>
.X.....X................................ 2 2
write_data_mtridata_q<9>/write_data_mtridata_q<9>_RSTF
X.......X.X............................. 3 3
write_data_mtridata_q<8>/write_data_mtridata_q<8>_RSTF
X.......XX.............................. 3 3
write_data_mtridata_q<15>/write_data_mtridata_q<15>_RSTF
X.......X.......X....................... 3 3
write_data_mtridata_q<14>/write_data_mtridata_q<14>_RSTF
X.......X......X........................ 3 3
write_data_mtridata_q<13>/write_data_mtridata_q<13>_RSTF
X.......X.....X......................... 3 3
write_data_mtridata_q<12>/write_data_mtridata_q<12>_RSTF
X.......X....X.......................... 3 3
write_data_mtridata_q<11>/write_data_mtridata_q<11>_RSTF
X.......X...X........................... 3 3
write_data_mtridata_q<10>/write_data_mtridata_q<10>_RSTF
X.......X..X............................ 3 3
read_data_bufferdata<9>
X.....XXX............................... 4 4
read_data_bufferdata<8>
X....X.XX............................... 4 4
read_data_bufferdata<7>
X...X..XX............................... 4 4
read_data_bufferdata<6>
X..X...XX............................... 4 4
0----+----1----+----2----+----3----+----4
0 0 0 0
Legend:
Total Pt - Total product terms used by the macrocell signal
Imp Pt - Product terms imported from other macrocells
Exp Pt - Product terms exported to other macrocells
in direction shown
Unused Pt - Unused local product terms remaining in macrocell
Loc - Location where logic was mapped in device
Pwr Mode - Macrocell power mode
Pin Type/Use - I - Input GCK - Global Clock
O - Output GTS - Global Output Enable
(b) - Buried macrocell GSR - Global Set/Reset
X(@) - Signal used as input (wire-AND input) to the macrocell logic.
The number of Signals Used may exceed the number of FB Inputs Used due
to wire-ANDing in the switch matrix.
*********************************** FB4 ***********************************
Number of function block inputs used/remaining: 7/47
Number of signals used by logic mapping into function block: 7
Signal Total Imp Exp Unused Loc Pwr Pin Pin Pin
Name Pt Pt Pt Pt Mode # Type Use
(unused) 0 0 0 5 FB4_1 (b)
(unused) 0 0 0 5 FB4_2 87 I/O
(unused) 0 0 0 5 FB4_3 (b)
(unused) 0 0 0 5 FB4_4 (b)
(unused) 0 0 0 5 FB4_5 89 I/O
(unused) 0 0 0 5 FB4_6 90 I/O
(unused) 0 0 0 5 FB4_7 (b)
(unused) 0 0 0 5 FB4_8 91 I/O
(unused) 0 0 0 5 FB4_9 92 I/O
(unused) 0 0 0 5 FB4_10 (b)
(unused) 0 0 0 5 FB4_11 93 I/O
(unused) 0 0 0 5 FB4_12 94 I/O
write_data_mtridata_qint<7>
2 0 0 3 FB4_13 STD (b) (b)
write_data_mtridata_qint<6>
2 0 0 3 FB4_14 STD 95 I/O (b)
write_data_mtridata_qint<5>
2 0 0 3 FB4_15 STD 96 I/O (b)
write_data_mtridata_qint<4>
2 0 0 3 FB4_16 STD (b) (b)
write_data_mtridata_qint<3>
2 0 0 3 FB4_17 STD 97 I/O (b)
write_data_mtridata_qint<2>
2 0 0 3 FB4_18 STD (b) (b)
Signals Used by Logic in Function Block
1: pd<2>.PIN 4: pd<5>.PIN 6: pd<7>.PIN
2: pd<3>.PIN 5: pd<6>.PIN 7: ndstrb
3: pd<4>.PIN
Signal 1 2 3 4 Signals FB
Name 0----+----0----+----0----+----0----+----0 Used Inputs
write_data_mtridata_qint<7>
.....XX................................. 2 2
write_data_mtridata_qint<6>
....X.X................................. 2 2
write_data_mtridata_qint<5>
...X..X................................. 2 2
write_data_mtridata_qint<4>
..X...X................................. 2 2
write_data_mtridata_qint<3>
.X....X................................. 2 2
write_data_mtridata_qint<2>
X.....X................................. 2 2
0----+----1----+----2----+----3----+----4
0 0 0 0
Legend:
Total Pt - Total product terms used by the macrocell signal
Imp Pt - Product terms imported from other macrocells
Exp Pt - Product terms exported to other macrocells
in direction shown
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