📄 hour1.twr
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Release 6.2i Trace G.28
Copyright (c) 1995-2004 Xilinx, Inc. All rights reserved.
C:/Xilinx/bin/nt/trce.exe -intstyle ise -e 3 -l 3 -xml hour1 hour1.ncd -o
hour1.twr hour1.pcf
Design file: hour1.ncd
Physical constraint file: hour1.pcf
Device,speed: xc2s50e,-6 (PRODUCTION 1.17 2003-12-13)
Report level: error report
Environment Variable Effect
-------------------- ------
NONE No environment variables were set
--------------------------------------------------------------------------------
INFO:Timing:2698 - No timing constraints found, doing default enumeration.
INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths
option. All paths that are not constrained will be reported in the
unconstrained paths section(s) of the report.
Data Sheet report:
-----------------
All values displayed in nanoseconds (ns)
Clock clkh to Pad
------------+------------+------------------+--------+
| clk (edge) | | Clock |
Destination | to PAD |Internal Clock(s) | Phase |
------------+------------+------------------+--------+
Hour1<0> | 8.613(R)|clkh_BUFGP | 0.000|
Hour1<1> | 8.038(R)|clkh_BUFGP | 0.000|
Hour1<2> | 8.233(R)|clkh_BUFGP | 0.000|
Hour1<3> | 8.132(R)|clkh_BUFGP | 0.000|
hour2<0> | 7.567(R)|clkh_BUFGP | 0.000|
hour2<1> | 8.323(R)|clkh_BUFGP | 0.000|
hour2<2> | 8.093(R)|clkh_BUFGP | 0.000|
hour2<3> | 8.259(R)|clkh_BUFGP | 0.000|
------------+------------+------------------+--------+
Clock to Setup on destination clock clkh
---------------+---------+---------+---------+---------+
| Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
---------------+---------+---------+---------+---------+
clkh | 8.348| | | |
---------------+---------+---------+---------+---------+
Analysis completed Sun Dec 07 12:18:13 2008
--------------------------------------------------------------------------------
Peak Memory Usage: 46 MB
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