44binit.s

本代码包含已经移植好的UCGUI代码,控制器是S3C44B0,通过UCGUI,在LCD上图片显示.

;****************************************************************************
;44binit.s
;Initialization for S3C44B0X
;****************************************************************************
 
	GET inc/option.inc
	GET inc/memcfg.inc

;****************************************************************************
;Memory Space
;GCS6 64M 16bit(16MB) DRAM/SDRAM(0xc000000-0xc7fffff)
;APP        RAM=0xc000000~0xc7effff 
;44BMON     RAM=0xc7f0000-0xc7fffff
;STACK         =0xc7ffa00      

;****************************************************************************
;Interrupt control
INTPND      EQU 0x01e00004
INTMOD      EQU 0x01e00008
INTMSK      EQU 0x01e0000c
I_ISPR      EQU 0x01e00020
I_CMST      EQU 0x01e0001c

;****************************************************************************
;Watch Dog
WTCON       EQU 0x01d30000

;****************************************************************************
;System clock
PLLCON      EQU 0x01d80000
CLKCON      EQU 0x01d80004
LOCKTIME    EQU 0x01d8000c
  
;****************************************************************************
;Fresh control
REFRESH     EQU 0x01c80024

;****************************************************************************
;BDMA destination
BDIDES0     EQU 0x1f80008
BDIDES1     EQU 0x1f80028

;****************************************************************************
;const definition
USERMODE    EQU 0x10
FIQMODE     EQU 0x11
IRQMODE     EQU 0x12
SVCMODE     EQU 0x13
ABORTMODE   EQU 0x17
UNDEFMODE   EQU 0x1b
MODEMASK    EQU 0x1f
NOINT       EQU 0xc0

;****************************************************************************
;Compiler check
    GBLL    THUMBCODE
    [ {CONFIG} = 16 
THUMBCODE SETL  {TRUE}
    CODE32
    |   
THUMBCODE SETL  {FALSE}
    ]

    [ THUMBCODE
    CODE32   ;for start-up code for Thumb mode
    ]

    MACRO
$HandlerLabel HANDLER $HandleLabel

;****************************************************************************
$HandlerLabel
    sub     sp,sp,#4            ;decrement sp(to store jump address)
    stmfd   sp!,{r0}            ;PUSH the work register to stack(lr does't push because it return to original address)
    ldr     r0,=$HandleLabel    ;load the address of HandleXXX to r0
    ldr     r0,[r0]             ;load the contents(service routine start address) of HandleXXX
    str     r0,[sp,#4]          ;store the contents(ISR) of HandleXXX to stack
    ldmfd   sp!,{r0,pc}         ;POP the work register and pc(jump to ISR)
    MEND

    IMPORT  |Image$$RO$$Limit|  ; End of ROM code (=start of ROM data)
    IMPORT  |Image$$RW$$Base|   ; Base of RAM to initialise
    IMPORT  |Image$$ZI$$Base|   ; Base and limit of area
    IMPORT  |Image$$ZI$$Limit|  ; to zero initialise

    IMPORT  Main                ; The main entry of mon program 

    AREA    Init,CODE,READONLY

;****************************************************************************
    ENTRY     ;Asm Entry
    b      ResetHandler                      ;    Reset        
    ldr    pc, =(_IRQ_BASEADDRESS + 0x04)    ;    HandlerUndef 
    ldr    pc, =(_IRQ_BASEADDRESS + 0x08)    ;    HandlerSWI 
    ldr    pc, =(_IRQ_BASEADDRESS + 0x0C)    ;    HandlerPabort 
    ldr    pc, =(_IRQ_BASEADDRESS + 0x10)    ;    HandlerDAbort
    ldr    pc, =(_IRQ_BASEADDRESS + 0x14)    ;    HandlerReserved
    ldr    pc, =(_IRQ_BASEADDRESS + 0x18)    ;    HandlerIRQ
    ldr    pc, =(_IRQ_BASEADDRESS + 0x1C)    ;    HandlerFIQ
    
  ;***IMPORTANT NOTE***
  ;If the H/W vectored interrutp mode is enabled, The above two instructions should
  ;be changed like below, to work-around with H/W bug of S3C44B0X interrupt controller. 
  ; b HandlerIRQ  ->  subs pc,lr,#4
  ; b HandlerIRQ  ->  subs pc,lr,#4

;****************************************************************************
VECTOR_BRANCH
    ldr    pc, =HandlerEINT0    ;mGA    H/W interrupt vector table
    ldr    pc, =HandlerEINT1    ; 
    ldr    pc, =HandlerEINT2    ;
    ldr    pc, =HandlerEINT3    ;
    ldr    pc, =HandlerEINT4567 ;
    ldr    pc, =HandlerTICK     ;mGA
    b .
    b .
    ldr    pc, =HandlerZDMA0    ;mGB
    ldr    pc, =HandlerZDMA1    ;
    ldr    pc, =HandlerBDMA0    ;
    ldr    pc, =HandlerBDMA1    ;
    ldr    pc, =HandlerWDT      ;
    ldr    pc, =HandlerUERR01   ;mGB
    b .
    b .
    ldr    pc, =HandlerTIMER0   ;mGC
    ldr    pc, =HandlerTIMER1   ;
    ldr    pc, =HandlerTIMER2   ;
    ldr    pc, =HandlerTIMER3   ;
    ldr    pc, =HandlerTIMER4   ;
    ldr    pc, =HandlerTIMER5   ;mGC
    b .
    b .
    ldr    pc, =HandlerURXD0    ;mGD
    ldr    pc, =HandlerURXD1    ;
    ldr    pc, =HandlerIIC      ;
    ldr    pc, =HandlerSIO      ;
    ldr    pc, =HandlerUTXD0    ;
    ldr    pc, =HandlerUTXD1    ;mGD
    b .
    b .
    ldr    pc, =HandlerRTC      ;mGKA
    b .           ;
    b .           ;
    b .           ;
    b .           ;
    b .           ;mGKA
    b .
    b .
    ldr    pc, =HandlerADC      ;mGKB
    b .           ;
    b .           ;
    b .           ;
    b .           ;
    b .           ;mGKB
    b .
    b .
          

    LTORG 

;****************************************************************************
HandlerFIQ    HANDLER HandleFIQ
HandlerIRQ    HANDLER HandleIRQ
HandlerUndef  HANDLER HandleUndef
HandlerSWI    HANDLER HandleSWI
HandlerDabort HANDLER HandleDabort
HandlerPabort HANDLER HandlePabort

HandlerADC    HANDLER HandleADC
HandlerRTC    HANDLER HandleRTC
HandlerUTXD1  HANDLER HandleUTXD1
HandlerUTXD0  HANDLER HandleUTXD0
HandlerSIO    HANDLER HandleSIO
HandlerIIC    HANDLER HandleIIC
HandlerURXD1  HANDLER HandleURXD1
HandlerURXD0  HANDLER HandleURXD0
HandlerTIMER5 HANDLER HandleTIMER5
HandlerTIMER4 HANDLER HandleTIMER4
HandlerTIMER3 HANDLER HandleTIMER3
HandlerTIMER2 HANDLER HandleTIMER2
HandlerTIMER1 HANDLER HandleTIMER1
HandlerTIMER0 HANDLER HandleTIMER0
HandlerUERR01 HANDLER HandleUERR01
HandlerWDT    HANDLER HandleWDT
HandlerBDMA1  HANDLER HandleBDMA1
HandlerBDMA0  HANDLER HandleBDMA0
HandlerZDMA1  HANDLER HandleZDMA1
HandlerZDMA0  HANDLER HandleZDMA0
HandlerTICK   HANDLER HandleTICK
HandlerEINT4567 HANDLER HandleEINT4567
HandlerEINT3  HANDLER HandleEINT3
HandlerEINT2  HANDLER HandleEINT2
HandlerEINT1  HANDLER HandleEINT1
HandlerEINT0  HANDLER HandleEINT0

;IRQ 

ExceptionHanlderBegin
    b      .
    ldr    pc, MyHandleUndef           ;    HandlerUndef 
    ldr    pc, MyHandleSWI              ;    HandlerSWI 
    ldr    pc, MyHandlePabort           ;    HandlerPabort 
    ldr    pc, MyHandleDabort           ;    HandlerDAbort
    b .                                 ;    HandlerReserved
    ldr    pc, MyHandleIRQ              ;    HandlerIRQ
    ldr    pc, MyHandleFIQ              ;    HandlerFIQ
    
MyHandleUndef  DCD  HandleUndef
MyHandleSWI    DCD  HandleSWI 
MyHandlePabort DCD  HandlePabort
MyHandleDabort DCD  HandleDabort
MyHandleIRQ    DCD  HandleIRQ
MyHandleFIQ    DCD  HandleFIQ

ExceptionHanlderEnd

;****************************************************************************
;Non-vector interrupt

IsrIRQ  ;using I_ISPR register.
    sub     sp,sp,#4       ;reserved for PC
    stmfd   sp!,{r8-r9}   

    ;IMPORTANT CAUTION
    ;if I_ISPC isn't used properly, I_ISPR can be 0 in this routine.

    ldr     r9, AddrISPR
    ldr     r9,[r9]

    cmp     r9, #0x0  ;If the IDLE mode work-around is used,
            ;r9 may be 0 sometimes.
    beq     %F2

    mov     r8,#0x0
0
    movs    r9,r9,lsr #1
    bcs     %F1
    add     r8,r8,#4
    b       %B0

1
    ldr     r9, AddrHandleADC
    add     r9,r9,r8
    ldr     r9,[r9]
    str     r9,[sp,#8]
    ldmfd   sp!,{r8-r9,pc}

2
    ldmfd   sp!,{r8-r9}
    add     sp,sp,#4
    subs    pc,lr,#4

AddrISPR
    DCD     I_ISPR
AddrHandleADC    
    DCD     HandleADC
IsrIRQEnd  

;****************************************************************************
; Reset handler, start point

ResetHandler
    ldr     r0,=WTCON       ;Disable watchdog
    ldr     r1,=0x0     
    str     r1,[r0]

    ldr     r0,=INTMSK
    ldr     r1,=0x07ffffff  ;Disable all interrupt
    str     r1,[r0]

    ;Setup clock register
    ldr r0,=LOCKTIME
    ldr r1,=0xfff
    str r1,[r0]

    ldr r0,=PLLCON      
    ldr r1,=((M_DIV<<12)+(P_DIV<<4)+S_DIV)    ;Set system clock
;	ldr r1,=0x48021
    str r1,[r0]


    ldr     r0,=CLKCON