📄 test1.lst
字号:
220 00:4111: 85 99 sta <CursorX
221 00:4113: C9 14 cmp #LCD_SEG/8
222 00:4115: D0 0D bne ?5
223 00:4117: 64 99 stz <CursorX
224 00:4119: A5 9A lda <CursorY
225 00:411B: 1A inc a
226 00:411C: 85 9A sta <CursorY
227 00:411E: C9 0A cmp #LCD_COM/8
228 00:4120: D0 02 bne ?5
229 00:4122: 64 9A stz <CursorY
230 ?5
231
232 PULL_ALL
+ 232 00:4124: 68 pla
+ 232 00:4125: 85 93 sta <TmpL
+ 232 00:4127: 68 pla
+ 232 00:4128: 85 94 sta <TmpH
+ 232 00:412A: 68 pla
+ 232 00:412B: 85 91 sta <PtrL
+ 232 00:412D: 68 pla
+ 232 00:412E: 85 92 sta <PtrH
+ 232 00:4130: 7A ply
+ 232 00:4131: FA plx
+ 232 00:4132: 68 pla
233 00:4133: 60 rts
234
235 ;--------------------------------SHOW LCD(Sitronix Mark).
236 TEST_LCD_160X80:
237 00:4134: 20 5E 40 JSR INITIAL_LCD
238
239 00:4137: 64 36 STZ <DMR
240 00:4139: A9 42 lda #>GL_Bar
241 00:413B: 85 29 sta <DMSH
242 00:413D: A9 37 lda #<GL_Bar
243 00:413F: 85 28 sta <DMSL
244 00:4141: A9 02 LDA #>LCD_START
245 00:4143: 85 2B STA <DMDH
246 00:4145: A9 00 LDA #<LCD_START
247 00:4147: 85 2A STA <DMDL
248 00:4149: A9 06 LDA #>LCD_SEG*LCD_COM/8
249 00:414B: 85 2D STA <DCNTH
250 00:414D: A9 3F LDA #<LCD_SEG*LCD_COM/8-1
251 00:414F: 85 2C STA <DCNTL
252 00:4151: 60 rts
253
254
255
256 TEST_LCD_160X801:
257 ;; JSR INITIAL_LCD
258
259 00:4152: 64 36 STZ <DMR
Wed Nov 5 2003 14:52 Page 6
260 00:4154: A9 48 lda #>GL_Bar1
261 00:4156: 85 29 sta <DMSH
262 00:4158: A9 77 lda #<GL_Bar1
263 00:415A: 85 28 sta <DMSL
264 00:415C: A9 02 LDA #>LCD_START
265 00:415E: 85 2B STA <DMDH
266 00:4160: A9 00 LDA #<LCD_START
267 00:4162: 85 2A STA <DMDL
268 00:4164: A9 06 LDA #>LCD_SEG*LCD_COM/8
269 00:4166: 85 2D STA <DCNTH
270 00:4168: A9 3F LDA #<LCD_SEG*LCD_COM/8-1
271 00:416A: 85 2C STA <DCNTL
272 00:416C: 60 rts
273
274 QQQ:
275 CourierFont8x8:
276 ;; .include D:\zardos\adpcm\8x8_01.hex
277 ;; .include D:\zardos\adpcm\8x8_11.hex
278 ;; .include D:\zardos\adpcm\8x8_21.hex
279 ;; .include D:\zardos\adpcm\8x8_31.hex
280 ;; .include D:\zardos\adpcm\8x8_41.hex
281 ;; .include D:\zardos\adpcm\8x8_51.hex
282 ;; .include D:\zardos\adpcm\8x8_61.hex
283 ;; .include D:\zardos\adpcm\8x8_71.hex
284 ;; .include D:\zardos\adpcm\8x8_81.hex
285 ;; .include D:\zardos\adpcm\8x8_91.hex
286 ;; .include D:\zardos\adpcm\8x8_A1.hex
287 ;; .include D:\zardos\adpcm\8x8_B1.hex
288 ;; .include D:\zardos\adpcm\8x8_C1.hex
289 ;; .include D:\zardos\adpcm\8x8_D1.hex
290 ;; .include D:\zardos\adpcm\8x8_E1.hex
291 ;; .include D:\zardos\adpcm\8x8_F1.hex
292
293 ;;********************Delay time*********************************************
294 DELAY_TIME: ;delay time=0.05s X a
295 ?aa
296 00:416D: 20 74 41 jsr DELAY
297 00:4170: 3A dec a
298 00:4171: D0 FA bne ?aa
299 00:4173: 60 rts
300 ;;--------------------------------------------------------------------------
301 DELAY: ;delay time=0.05s(clock=4M)
302 00:4174: DA phx ;3 cycles
303 00:4175: 5A phy ;3 cycles
304 00:4176: A2 14 ldx #20 ;2 cycles
305 00:4178: A0 C2 ldy #194 ;2 cycles
306 ?aa
307 00:417A: CA dex ;2 cycles
308 00:417B: D0 FD bne ?aa ;if jumping,need 2 cycles,else 1 cycle
309 00:417D: 88 dey ;2 cycles
310 00:417E: D0 FA bne ?aa ;if jumping,need 2 cycles,else 1 cycle
311 00:4180: 7A ply ;4 cycles
312 00:4181: FA plx ;4 cycles
313 00:4182: 60 rts ;6 cycles
314 ;jsr: 6 cycles
315 ;when x,y=1,time=6+3+3+2+2+2+1+2+1+4+4+6=36 cycles
316 ;when x increase one,time adds 4 cycles(2+2)
317 ;when y increse one,time adds 1027 cycles(4+255*4+3)
Wed Nov 5 2003 14:52 Page 7
318 ;when x,y=0,max delay time=262941(36+255*4+1027*255)
319 ;clock=4M,delay time=0.06573525(262941*1/4000000)
320 ;when x=20,y=194 delay time=0.05s(clock=4M)
321
322 ;----------------------------------------------------
323 ;; (0 ... 29) x 112
324 Mul112Tab
325 00:4183: 00 00 dw 0
326 00:4185: 70 00 dw 112
327 00:4187: E0 00 dw 224
328 00:4189: 50 01 dw 336
329 00:418B: C0 01 dw 448
330 00:418D: 30 02 dw 560
331 00:418F: A0 02 dw 672
332 00:4191: 10 03 dw 784
333 00:4193: 80 03 dw 896
334 00:4195: F0 03 dw 1008
335 00:4197: 60 04 dw 1120
336 00:4199: D0 04 dw 1232
337 00:419B: 40 05 dw 1344
338 00:419D: B0 05 dw 1456
339 00:419F: 20 06 dw 1568
340 00:41A1: 90 06 dw 1680
341 00:41A3: 00 07 dw 1792
342 00:41A5: 70 07 dw 1904
343 00:41A7: E0 07 dw 2016
344 00:41A9: 50 08 dw 2128
345 00:41AB: C0 08 dw 2240
346 00:41AD: 30 09 dw 2352
347 00:41AF: A0 09 dw 2464
348 00:41B1: 10 0A dw 2576
349 00:41B3: 80 0A dw 2688
350 00:41B5: F0 0A dw 2800
351 00:41B7: 60 0B dw 2912
352 00:41B9: D0 0B dw 3024
353 00:41BB: 40 0C dw 3136
354 00:41BD: B0 0C dw 3248
355 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
356 ;; (0 ... 29) x 160
357 Mul160Tab
358 00:41BF: 00 00 dw 0
359 00:41C1: A0 00 dw 160
360 00:41C3: 40 01 dw 320
361 00:41C5: E0 01 dw 480
362 00:41C7: 80 02 dw 640
363 00:41C9: 20 03 dw 800
364 00:41CB: C0 03 dw 960
365 00:41CD: 60 04 dw 1120
366 00:41CF: 00 05 dw 1280
367 00:41D1: A0 05 dw 1440
368 00:41D3: 40 06 dw 1600
369 00:41D5: E0 06 dw 1760
370 00:41D7: 80 07 dw 1920
371 00:41D9: 20 08 dw 2080
372 00:41DB: C0 08 dw 2240
373 00:41DD: 60 09 dw 2400
374 00:41DF: 00 0A dw 2560
375 00:41E1: A0 0A dw 2720
Wed Nov 5 2003 14:52 Page 8
376 00:41E3: 40 0B dw 2880
377 00:41E5: E0 0B dw 3040
378 00:41E7: 80 0C dw 3200
379 00:41E9: 20 0D dw 3360
380 00:41EB: C0 0D dw 3520
381 00:41ED: 60 0E dw 3680
382 00:41EF: 00 0F dw 3840
383 00:41F1: A0 0F dw 4000
384 00:41F3: 40 10 dw 4160
385 00:41F5: E0 10 dw 4320
386 00:41F7: 80 11 dw 4480
387 00:41F9: 20 12 dw 4640
388 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
389 ;; (0 ... 29) x 320
390 Mul320Tab
391 00:41FB: 00 00 dw 0
392 00:41FD: 40 01 dw 320
393 00:41FF: 80 02 dw 640
394 00:4201: C0 03 dw 960
395 00:4203: 00 05 dw 1280
396 00:4205: 40 06 dw 1600
397 00:4207: 80 07 dw 1920
398 00:4209: C0 08 dw 2240
399 00:420B: 00 0A dw 2560
400 00:420D: 40 0B dw 2880
401 00:420F: 80 0C dw 3200
402 00:4211: C0 0D dw 3520
403 00:4213: 00 0F dw 3840
404 00:4215: 40 10 dw 4160
405 00:4217: 80 11 dw 4480
406 00:4219: C0 12 dw 4800
407 00:421B: 00 14 dw 5120
408 00:421D: 40 15 dw 5440
409 00:421F: 80 16 dw 5760
410 00:4221: C0 17 dw 6080
411 00:4223: 00 19 dw 6400
412 00:4225: 40 1A dw 6720
413 00:4227: 80 1B dw 7040
414 00:4229: C0 1C dw 7360
415 00:422B: 00 1E dw 7680
416 00:422D: 40 1F dw 8000
417 00:422F: 80 20 dw 8320
418 00:4231: C0 21 dw 8640
419 00:4233: 00 23 dw 8960
420 00:4235: 40 24 dw 9280
421
422 GL_Bar: .include T3D.B0
423 GL_Bar1 .include .\01d.B0
424 ;;-------------------------------------- VECTOR BEGIN.
425
426 ;IV0 .SECTION
427 ORG $7FE0
428 00:7FE0: 1E 40 .WORD IR14 ;14;4;FFE0
429 00:7FE2: 21 40 .WORD URX_VT ;13;4;FFE2
430 00:7FE4: 24 40 .WORD UTX_VT ;12;4;FFE4
431 00:7FE6: 27 40 .WORD SRX_VT ;11;4;FFE6
432 00:7FE8: 2A 40 .WORD STX_VT ;10;4;FFE8
433 00:7FEA: 2D 40 .WORD IR07 ;07;5;FFEA
Wed Nov 5 2003 14:52 Page 9
434 00:7FEC: 1B 40 .WORD LCDFR_VT ;06;6;FFEC LCD Frame interupt
435 00:7FEE: 00 40 .WORD BASETIMER_VT ;BASE TIMER OVERFLOW.
436 00:7FF0: 03 40 .WORD PORT_VT ;PORTA[7-0] VECTOR.
437 00:7FF2: 06 40 .WORD TIMER1_VT ;TIMER 1 OVERFLOW.
438 00:7FF4: 09 40 .WORD TIMER0_VT ;TIMER 0 OVERFLOW.
439 00:7FF6: 0C 40 .WORD DAC_VT ;RELOAD DAC DATA.
440 00:7FF8: 0F 40 .WORD INTX_VT ;PORTA[0]/INTX VECTOR.
441 00:7FFA: 12 40 .WORD NMI_VT ;NMI VECTOR. (RESERVED)
442 00:7FFC: 15 40 .WORD RESET_VT ;RESET VECTOR. (SAME 6502)
443 00:7FFE: 18 40 .WORD BRK_VT ;BREAK VECTOR. (SAME 6502)
444
445 .END
Lines assembled: 1953
Errors: 0
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -