st2202.def

Sitronix电子词典ST2202芯片的Zardoz汇编程序。

;;=====================================================
;;          *****  Sitronix ST2100 define *****
;;            ------------------------------
;;               Written by : Jesse Chang
;;               -----------------------
;;=====================================================

        chip     w65c02s
;;   >>> Internal I/O define <<<
;;       -------------------
        .page0
PA      equ     00h             ; I/O port A.
PB      equ     01h             ; I/O port B.
PC      equ     02h             ; I/O port C.
PD      equ     03h             ; I/O port D.
PE      equ     04h             ; I/O port E.
PL      equ     4ch             ; I/O port L.

PSC     equ     05h             ; Port C I/O type selection

PCA     equ     08h             ; Port A direction control register.
PCB     equ     09h             ; Port B direction control register.
PCC     equ     0ah             ; Port C direction control register.
PCD     equ     0bh             ; Port D direction control register.
PCE     equ     0ch             ; Port E direction control register.
PCL     equ     4eh             ; Port L direction control register.

PFC     equ     0dh             ; Port C function selection
PFD     equ     0eh             ; Port D function selection

PMCR    equ     0fh             ; Port mode control register.

PSG0L   equ     10h             ; PSG channel 0 control register 0.
PSG0H   equ     11h             ; PSG channel 0 control register 1.
PSG1L   equ     12h             ; PSG channel 1 control register 2.
PSG1H   equ     13h             ; PSG channel 1 control register 3.
DAC     equ     14h             ; PWM DAC output.

PSGC    equ     16h             ; PWM DAC control , when DACE=1
VOL     equ     17h             ; Volume control.

BTEN    equ     20h             ; Base timer enable
BTSR    equ     21h             ; Base timer status
PRS     equ     23h             ; Prescaler (PRE11)
T0M     equ     24h             ; Timer 1 mode control.
T0C     equ     25h             ; Timer 1 .
T1M     equ     26h             ; Timer 2 mode control.
T1C     equ     27h             ; Timer 2 .

DMSL    equ     28h             ; DMA source register low order.
DMSH    equ     29h             ; DMA source register high order.
DMDL    equ     2ah             ; DMA desitination register low order.
DMDH    equ     2bh             ; DMA desitination register high order.
DCNTL   equ     2ch             ; DMA counter low order.
DCNTH   equ     2dh             ; DMA counter high order.

SYS     equ     30h             ; System control.
IRR     equ     31h             ; Interrupt program ROM bank pointer Register.

PRR     equ     32h             ; Program ROM bank pointer Register.
PRRL    equ     32h             ; Program ROM bank pointer Register.
PRRH    equ     33h             ; Program ROM bank pointer Register.

DRR     equ     34h             ; Data ROM bank pointer Register.
DRRL    equ     34h             ; Data ROM bank pointer Register.
DRRH    equ     35h             ; Data ROM bank pointer Register.

DMR     equ     36h             ; RMA Mode control Register.
DMRL    equ     36h             ; RMA Mode control Register.
DMRH    equ     37h             ; RMA Mode control Register.

MISC    equ     38h             ; Miscellaneous register

IREQ    equ     3ch             ; Interrupt request register.
IREQL   equ     3ch             ; Interrupt request register.
IREQH   equ     3dh             ; Interrupt request register.
IENA    equ     3eh             ; Interrupt enable.
IENAL   equ     3eh             ; Interrupt enable.
IENAH   equ     3fh             ; Interrupt enable.

;;; LCD ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
LSSAL   equ     40h
LSSAH   equ     41h
LVPW    equ     42h
LXMAX   equ     43h
LYMAX   equ     44h
LPAN    equ     45h
LCTR    equ     47h
LCKR    equ     48h
LFRA    equ     49h
LAC     equ     4Ah
LPWM    equ     4Bh

;;; SPI ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
SDATA   equ     50h
SDATAL  equ     50h
SDATAH  equ     51h
SCTR    equ     52h
SCKR    equ     53h
SSR     equ     54h

;;; UART(IrDA) , Baud rate generator ;;;;;;;
UCTR    equ     60h
USTR    equ     61h
IRCTR   equ     62h
BCTR    equ     63h
UDATA   equ     64h
BRS     equ     66h
BDIV    equ     67h
        .ends