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<!-- Copyright (C) 2003 Red Hat, Inc.                                -->
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>Interrupt Handling</TITLE
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><H1
><A
NAME="KERNEL-INTERRUPTS">Interrupt Handling</H1
><DIV
CLASS="REFNAMEDIV"
><A
NAME="AEN1834"
></A
><H2
>Name</H2
>cyg_interrupt_create, cyg_interrupt_delete, cyg_interrupt_attach, cyg_interrupt_detach, cyg_interrupt_configure, cyg_interrupt_acknowledge, cyg_interrupt_enable, cyg_interrupt_disable, cyg_interrupt_mask, cyg_interrupt_mask_intunsafe, cyg_interrupt_unmask, cyg_interrupt_unmask_intunsafe, cyg_interrupt_set_cpu, cyg_interrupt_get_cpu, cyg_interrupt_get_vsr, cyg_interrupt_set_vsr&nbsp;--&nbsp;Manage interrupt handlers</DIV
><DIV
CLASS="REFSYNOPSISDIV"
><A
NAME="AEN1852"><H2
>Synopsis</H2
><DIV
CLASS="FUNCSYNOPSIS"
><A
NAME="AEN1853"><P
></P
><TABLE
BORDER="5"
BGCOLOR="#E0E0F0"
WIDTH="70%"
><TR
><TD
><PRE
CLASS="FUNCSYNOPSISINFO"
>#include &lt;cyg/kernel/kapi.h&gt;
        </PRE
></TD
></TR
></TABLE
><P
><CODE
><CODE
CLASS="FUNCDEF"
>void cyg_interrupt_create</CODE
>(cyg_vector_t vector, cyg_priority_t priority, cyg_addrword_t data, cyg_ISR_t* isr, cyg_DSR_t* dsr, cyg_handle_t* handle, cyg_interrupt* intr);</CODE
></P
><P
><CODE
><CODE
CLASS="FUNCDEF"
>void cyg_interrupt_delete</CODE
>(cyg_handle_t interrupt);</CODE
></P
><P
><CODE
><CODE
CLASS="FUNCDEF"
>void cyg_interrupt_attach</CODE
>(cyg_handle_t interrupt);</CODE
></P
><P
><CODE
><CODE
CLASS="FUNCDEF"
>void cyg_interrupt_detach</CODE
>(cyg_handle_t interrupt);</CODE
></P
><P
><CODE
><CODE
CLASS="FUNCDEF"
>void cyg_interrupt_configure</CODE
>(cyg_vector_t vector, cyg_bool_t level, cyg_bool_t up);</CODE
></P
><P
><CODE
><CODE
CLASS="FUNCDEF"
>void cyg_interrupt_acknowledge</CODE
>(cyg_vector_t vector);</CODE
></P
><P
><CODE
><CODE
CLASS="FUNCDEF"
>void cyg_interrupt_disable</CODE
>(void);</CODE
></P
><P
><CODE
><CODE
CLASS="FUNCDEF"
>void cyg_interrupt_enable</CODE
>(void);</CODE
></P
><P
><CODE
><CODE
CLASS="FUNCDEF"
>void cyg_interrupt_mask</CODE
>(cyg_vector_t vector);</CODE
></P
><P
><CODE
><CODE
CLASS="FUNCDEF"
>void cyg_interrupt_mask_intunsafe</CODE
>(cyg_vector_t vector);</CODE
></P
><P
><CODE
><CODE
CLASS="FUNCDEF"
>void cyg_interrupt_unmask</CODE
>(cyg_vector_t vector);</CODE
></P
><P
><CODE
><CODE
CLASS="FUNCDEF"
>void cyg_interrupt_unmask_intunsafe</CODE
>(cyg_vector_t vector);</CODE
></P
><P
><CODE
><CODE
CLASS="FUNCDEF"
>void cyg_interrupt_set_cpu</CODE
>(cyg_vector_t vector, cyg_cpu_t cpu);</CODE
></P
><P
><CODE
><CODE
CLASS="FUNCDEF"
>cyg_cpu_t cyg_interrupt_get_cpu</CODE
>(cyg_vector_t vector);</CODE
></P
><P
><CODE
><CODE
CLASS="FUNCDEF"
>void cyg_interrupt_get_vsr</CODE
>(cyg_vector_t vector, cyg_VSR_t** vsr);</CODE
></P
><P
><CODE
><CODE
CLASS="FUNCDEF"
>void cyg_interrupt_set_vsr</CODE
>(cyg_vector_t vector, cyg_VSR_t* vsr);</CODE
></P
><P
></P
></DIV
></DIV
><DIV
CLASS="REFSECT1"
><A
NAME="KERNEL-INTERRUPTS-DESCRIPTION"
></A
><H2
>Description</H2
><P
>The kernel provides an interface for installing interrupt handlers and
controlling when interrupts occur. This functionality is used
primarily by eCos device drivers and by any application code that
interacts directly with hardware. However in most cases it is better
to avoid using this kernel functionality directly, and instead the
device driver API provided by the common HAL package should be used.
Use of the kernel package is optional, and some applications such as
RedBoot work with no need for multiple threads or synchronization
primitives. Any code which calls the kernel directly rather than the
device driver API will not function in such a configuration. When the
kernel package is present the device driver API is implemented as
<TT
CLASS="LITERAL"
>#define</TT
>'s to the equivalent kernel calls, otherwise
it is implemented inside the common HAL package. The latter
implementation can be simpler than the kernel one because there is no
need to consider thread preemption and similar issues.
      </P
><P
>The exact details of interrupt handling vary widely between
architectures. The functionality provided by the kernel abstracts away
from many of the details of the underlying hardware, thus simplifying
application development. However this is not always successful. For
example, if some hardware does not provide any support at all for
masking specific interrupts then calling
<TT
CLASS="FUNCTION"
>cyg_interrupt_mask</TT
> may not behave as intended:
instead of masking just the one interrupt source it might disable all
interrupts, because that is as close to the desired behaviour as is
possible given the hardware restrictions. Another possibility is that
masking a given interrupt source also affects all lower-priority
interrupts, but still allows higher-priority ones. The documentation
for the appropriate HAL packages should be consulted for more
information about exactly how interrupts are handled on any given
hardware. The HAL header files will also contain useful information. 
      </P
></DIV
><DIV
CLASS="REFSECT1"
><A
NAME="KERNEL-INTERRUPTS-HANDLERS"
></A
><H2
>Interrupt Handlers</H2
><P
>Interrupt handlers are created by a call to
<TT
CLASS="FUNCTION"
>cyg_interrupt_create</TT
>. This takes the following
arguments: 
      </P
><P
></P
><DIV
CLASS="VARIABLELIST"
><DL
><DT
>cyg_vector_t <TT
CLASS="PARAMETER"
><I
>vector</I
></TT
></DT
><DD
><P
>The interrupt vector, a small integer, identifies the specific
interrupt source. The appropriate hardware documentation or HAL header
files should be consulted for details of which vector corresponds to
which device.
          </P
></DD
><DT
>cyg_priority_t <TT
CLASS="PARAMETER"
><I
>priority</I
></TT
></DT
><DD
><P
>Some hardware may support interrupt priorities, where a low priority
interrupt handler can in turn be interrupted by a higher priority one.
Again hardware-specific documentation should be consulted for details
about what the valid interrupt priority levels are.
          </P
></DD
><DT
>cyg_addrword_t <TT
CLASS="PARAMETER"
><I
>data</I
></TT
></DT
><DD
><P
>When an interrupt occurs eCos will first call the associated
interrupt service routine or ISR, then optionally a deferred service
routine or DSR. The <TT
CLASS="PARAMETER"
><I
>data</I
></TT
> argument to
<TT
CLASS="FUNCTION"
>cyg_interrupt_create</TT
> will be passed to both these
functions. Typically it will be a pointer to some data structure.
          </P
></DD
><DT
>cyg_ISR_t <TT
CLASS="PARAMETER"
><I
>isr</I
></TT
></DT
><DD
><P
>When an interrupt occurs the hardware will transfer control to the
appropriate vector service routine or VSR, which is usually provided
by eCos. This performs any appropriate processing, for example to work
out exactly which interrupt occurred, and then as quickly as possible
transfers control the installed ISR. An ISR is a C function which
takes the following form:
          </P
><TABLE
BORDER="5"
BGCOLOR="#E0E0F0"
WIDTH="70%"
><TR
><TD
><PRE
CLASS="PROGRAMLISTING"
>cyg_uint32
isr_function(cyg_vector_t vector, cyg_addrword_t data)
{
    cyg_bool_t dsr_required = 0;

    &#8230;

    return dsr_required ? CYG_ISR_CALL_DSR : CYG_ISR_HANDLED;
}
          </PRE
></TD
></TR
></TABLE
><P
>The first argument identifies the particular interrupt source,
especially useful if there multiple instances of a given device and a
single ISR can be used for several different interrupt vectors. The
second argument is the <TT
CLASS="PARAMETER"
><I
>data</I
></TT
> field passed to
<TT
CLASS="FUNCTION"
>cyg_interrupt_create</TT
>, usually a pointer to some
data structure. The exact conditions under which an ISR runs will
depend partly on the hardware and partly on configuration options.
Interrupts may currently be disabled globally, especially if the
hardware does not support interrupt priorities. Alternatively
interrupts may be enabled such that higher priority interrupts are
allowed through. The ISR may be running on a separate interrupt stack,
or on the stack of whichever thread was running at the time the
interrupt happened.
          </P
><P
>A typical ISR will do as little work as possible, just enough to meet
the needs of the hardware and then acknowledge the interrupt by
calling <TT
CLASS="FUNCTION"
>cyg_interrupt_acknowledge</TT
>. This ensures
that interrupts will be quickly reenabled, so higher priority devices
can be serviced. For some applications there may be one device which
is especially important and whose ISR can take much longer than
normal. However eCos device drivers usually will not assume that they
are especially important, so their ISRs will be as short as possible.

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