📄 smart_ci.asm
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; D12CI.ASM generated and modified from: D12CI.C
$NOMOD51
NAME D12CI
P0 DATA 080H
P1 DATA 090H
P2 DATA 0A0H
P3 DATA 0B0H
T0 BIT 0B0H.4
AC BIT 0D0H.6
T1 BIT 0B0H.5
EA BIT 0A8H.7
IE DATA 0A8H
RD BIT 0B0H.7
ES BIT 0A8H.4
IP DATA 0B8H
RI BIT 098H.0
INT0 BIT 0B0H.2
CY BIT 0D0H.7
TI BIT 098H.1
INT1 BIT 0B0H.3
PS BIT 0B8H.4
SP DATA 081H
OV BIT 0D0H.2
WR BIT 0B0H.6
SBUF DATA 099H
PCON DATA 087H
MCU_HOSTDREQ BIT 0A0H.0
SCON DATA 098H
TMOD DATA 089H
TCON DATA 088H
IE0 BIT 088H.1
IE1 BIT 088H.3
B DATA 0F0H
ACC DATA 0E0H
ET0 BIT 0A8H.1
ET1 BIT 0A8H.3
TF0 BIT 088H.5
TF1 BIT 088H.7
RB8 BIT 098H.2
TH0 DATA 08CH
EX0 BIT 0A8H.0
IT0 BIT 088H.0
TH1 DATA 08DH
TB8 BIT 098H.3
EX1 BIT 0A8H.2
IT1 BIT 088H.2
P BIT 0D0H.0
SM0 BIT 098H.7
TL0 DATA 08AH
SM1 BIT 098H.6
TL1 DATA 08BH
SM2 BIT 098H.5
PT0 BIT 0B8H.1
PT1 BIT 0B8H.3
RS0 BIT 0D0H.3
TR0 BIT 088H.4
RS1 BIT 0D0H.4
TR1 BIT 088H.6
PX0 BIT 0B8H.0
PX1 BIT 0B8H.2
DPH DATA 083H
DPL DATA 082H
REN BIT 098H.4
RXD BIT 0B0H.0
TXD BIT 0B0H.1
F0 BIT 0D0H.5
PSW DATA 0D0H
?PR?_D12_SetAddressEnable?D12CI SEGMENT CODE
?DT?_D12_SetAddressEnable?D12CI SEGMENT DATA OVERLAYABLE
?PR?_D12_SetEndpointEnable?D12CI SEGMENT CODE
?DT?_D12_SetEndpointEnable?D12CI SEGMENT DATA OVERLAYABLE
?PR?_D12_SetMode?D12CI SEGMENT CODE
?DT?_D12_SetMode?D12CI SEGMENT DATA OVERLAYABLE
?PR?_D12_SetDMA?D12CI SEGMENT CODE
?DT?_D12_SetDMA?D12CI SEGMENT DATA OVERLAYABLE
?PR?D12_GetDMA?D12CI SEGMENT CODE
?PR?D12_ReadInterruptRegister?D12CI SEGMENT CODE
?DT?D12_ReadInterruptRegister?D12CI SEGMENT DATA OVERLAYABLE
?PR?_D12_SelectEndpoint?D12CI SEGMENT CODE
?PR?_D12_ReadLastTransactionStatus?D12CI SEGMENT CODE
?PR?_D12_ReadEndpointStatus?D12CI SEGMENT CODE
?PR?_D12_SetEndpointStatus?D12CI SEGMENT CODE
?DT?_D12_SetEndpointStatus?D12CI SEGMENT DATA OVERLAYABLE
?PR?D12_SendResume?D12CI SEGMENT CODE
?PR?D12_ReadCurrentFrameNumber?D12CI SEGMENT CODE
?DT?D12_ReadCurrentFrameNumber?D12CI SEGMENT DATA OVERLAYABLE
?PR?D12_ReadChipID?D12CI SEGMENT CODE
?DT?D12_ReadChipID?D12CI SEGMENT DATA OVERLAYABLE
?PR?_D12_ReadEndpoint?D12CI SEGMENT CODE
?DT?_D12_ReadEndpoint?D12CI SEGMENT DATA OVERLAYABLE
?PR?_D12_WriteEndpoint?D12CI SEGMENT CODE
?DT?_D12_WriteEndpoint?D12CI SEGMENT DATA OVERLAYABLE
?PR?_D12_AcknowledgeEndpoint?D12CI SEGMENT CODE
?DT?_D12_AcknowledgeEndpoint?D12CI SEGMENT DATA OVERLAYABLE
EXTRN DATA (bEPPflags)
EXTRN CODE (?C_CSTOPTR)
EXTRN CODE (?C_CLDOPTR)
PUBLIC _D12_AcknowledgeEndpoint
PUBLIC ?_D12_WriteEndpoint?BYTE
PUBLIC _D12_WriteEndpoint
PUBLIC ?_D12_ReadEndpoint?BYTE
PUBLIC _D12_ReadEndpoint
PUBLIC D12_ReadChipID
PUBLIC D12_ReadCurrentFrameNumber
PUBLIC D12_SendResume
PUBLIC _D12_SetEndpointStatus
PUBLIC _D12_ReadEndpointStatus
PUBLIC _D12_ReadLastTransactionStatus
PUBLIC _D12_SelectEndpoint
PUBLIC D12_ReadInterruptRegister
PUBLIC _D12_SetDMA
PUBLIC D12_GetDMA
PUBLIC _D12_SetMode
PUBLIC _D12_SetEndpointEnable
PUBLIC _D12_SetAddressEnable
RSEG ?DT?_D12_SetAddressEnable?D12CI
?_D12_SetAddressEnable?BYTE:
bAddress?00: DS 1
bEnable?00: DS 1
RSEG ?DT?_D12_SetEndpointEnable?D12CI
?_D12_SetEndpointEnable?BYTE:
bEnable?10: DS 1
RSEG ?DT?_D12_SetMode?D12CI
?_D12_SetMode?BYTE:
bConfig?20: DS 1
bClkDiv?20: DS 1
RSEG ?DT?_D12_SetDMA?D12CI
?_D12_SetDMA?BYTE:
bMode?30: DS 1
RSEG ?DT?D12_ReadInterruptRegister?D12CI
?D12_ReadInterruptRegister?BYTE:
b1?41: DS 1
RSEG ?DT?_D12_SetEndpointStatus?D12CI
?_D12_SetEndpointStatus?BYTE:
bStalled?80: DS 1
RSEG ?DT?D12_ReadCurrentFrameNumber?D12CI
?D12_ReadCurrentFrameNumber?BYTE:
i?101: DS 2
RSEG ?DT?D12_ReadChipID?D12CI
?D12_ReadChipID?BYTE:
i?111: DS 2
RSEG ?DT?_D12_ReadEndpoint?D12CI
?_D12_ReadEndpoint?BYTE:
endp?120: DS 1
len?120: DS 1
buf?120: DS 3
ORG 5
i?121: DS 1
j?121: DS 1
RSEG ?DT?_D12_WriteEndpoint?D12CI
?_D12_WriteEndpoint?BYTE:
endp?140: DS 1
len?140: DS 1
buf?140: DS 3
ORG 5
i?141: DS 1
RSEG ?DT?_D12_AcknowledgeEndpoint?D12CI
?_D12_AcknowledgeEndpoint?BYTE:
endp?150: DS 1
; //*************************************************************************
; //
; // P H I L I P S P R O P R I E T A R Y
; //
; // COPYRIGHT (c) 1997 BY PHILIPS SINGAPORE.
; // -- ALL RIGHTS RESERVED --
; //
; // File Name: D12CI.C
; // Author: Wenkai Du
; // Created: 8 Jun 98
; // Modified:
; // Revision: 2.2
; //
; //*************************************************************************
; //
; // 98/11/27 I/O mode Main endpoints read/write update (WK)
; // 98/12/2 Added D12_ReadMainEndpoint (WK)
; //*************************************************************************
;
; void D12_SetAddressEnable(unsigned char bAddress, unsigned char bEnable)
RSEG ?PR?_D12_SetAddressEnable?D12CI
USING 0
_D12_SetAddressEnable:
MOV bAddress?00,R7
MOV bEnable?00,R5
; SOURCE LINE # 33
; {
; SOURCE LINE # 34
; if(bEPPflags.bits.in_isr == 0)
; SOURCE LINE # 35
MOV R7,bEPPflags
MOV A,R7
SWAP A
RRC A
ANL A,#07H
JB ACC.0,?C0001
; DISABLE;
; SOURCE LINE # 36
CLR EA
?C0001:
;
; outportb(D12_COMMAND, 0xD0);
; SOURCE LINE # 38
MOV R7,#03H
MOV R5,#0D0H
; LCALL _outportb
MOV DPTR,#0FF03H
MOV A,R5
MOVX @DPTR,A
; if(bEnable)
; SOURCE LINE # 39
MOV A,bEnable?00
JZ ?C0002
; bAddress |= 0x80;
; SOURCE LINE # 40
ORL bAddress?00,#080H
?C0002:
; outportb(D12_DATA, bAddress);
; SOURCE LINE # 41
MOV R7,#02H
MOV R5,bAddress?00
; LCALL _outportb
MOV DPTR,#0FF02H
MOV A,R5
MOVX @DPTR,A
;
; if(bEPPflags.bits.in_isr == 0)
; SOURCE LINE # 43
MOV R7,bEPPflags
MOV A,R7
SWAP A
RRC A
ANL A,#07H
JB ACC.0,?C0004
; ENABLE;
; SOURCE LINE # 44
SETB EA
; }
; SOURCE LINE # 45
?C0004:
RET
; END OF _D12_SetAddressEnable
;
; void D12_SetEndpointEnable(unsigned char bEnable)
RSEG ?PR?_D12_SetEndpointEnable?D12CI
USING 0
_D12_SetEndpointEnable:
MOV bEnable?10,R7
; SOURCE LINE # 47
; {
; SOURCE LINE # 48
; if(bEPPflags.bits.in_isr == 0)
; SOURCE LINE # 49
MOV R7,bEPPflags
MOV A,R7
SWAP A
RRC A
ANL A,#07H
JB ACC.0,?C0005
; DISABLE;
; SOURCE LINE # 50
CLR EA
?C0005:
;
; outportb(D12_COMMAND, 0xD8);
; SOURCE LINE # 52
MOV R7,#03H
MOV R5,#0D8H
; LCALL _outportb
MOV DPTR,#0FF03H
MOV A,R5
MOVX @DPTR,A
; if(bEnable)
; SOURCE LINE # 53
MOV A,bEnable?10
JZ ?C0006
; outportb(D12_DATA, 1);
; SOURCE LINE # 54
MOV R7,#02H
MOV R5,#01H
; LCALL _outportb
MOV DPTR,#0FF02H
MOV A,R5
MOVX @DPTR,A
SJMP ?C0007
?C0006:
; else
; outportb(D12_DATA, 0);
; SOURCE LINE # 56
MOV R7,#02H
CLR A
MOV R5,A
; LCALL _outportb
MOV DPTR,#0FF02H
MOV A,R5
MOVX @DPTR,A
?C0007:
;
; if(bEPPflags.bits.in_isr == 0)
; SOURCE LINE # 58
MOV R7,bEPPflags
MOV A,R7
SWAP A
RRC A
ANL A,#07H
JB ACC.0,?C0009
; ENABLE;
; SOURCE LINE # 59
SETB EA
; }
; SOURCE LINE # 60
?C0009:
RET
; END OF _D12_SetEndpointEnable
;
; void D12_SetMode(unsigned char bConfig, unsigned char bClkDiv)
RSEG ?PR?_D12_SetMode?D12CI
USING 0
_D12_SetMode:
MOV bConfig?20,R7
MOV bClkDiv?20,R5
; SOURCE LINE # 62
; {
; SOURCE LINE # 63
; if(bEPPflags.bits.in_isr == 0)
; SOURCE LINE # 64
MOV R7,bEPPflags
MOV A,R7
SWAP A
RRC A
ANL A,#07H
JB ACC.0,?C0010
; DISABLE;
; SOURCE LINE # 65
CLR EA
?C0010:
;
; outportb(D12_COMMAND, 0xF3);
; SOURCE LINE # 67
MOV R7,#03H
MOV R5,#0F3H
; LCALL _outportb
MOV DPTR,#0FF03H
MOV A,R5
MOVX @DPTR,A
; outportb(D12_DATA, bConfig);
; SOURCE LINE # 68
MOV R7,#02H
MOV R5,bConfig?20
; LCALL _outportb
MOV DPTR,#0FF02H
MOV A,R5
MOVX @DPTR,A
; outportb(D12_DATA, bClkDiv);
; SOURCE LINE # 69
MOV R7,#02H
MOV R5,bClkDiv?20
; LCALL _outportb
MOV DPTR,#0FF02H
MOV A,R5
MOVX @DPTR,A
;
; if(bEPPflags.bits.in_isr == 0)
; SOURCE LINE # 71
MOV R7,bEPPflags
MOV A,R7
SWAP A
RRC A
ANL A,#07H
JB ACC.0,?C0012
; ENABLE;
; SOURCE LINE # 72
SETB EA
; }
; SOURCE LINE # 73
?C0012:
RET
; END OF _D12_SetMode
;
; void D12_SetDMA(unsigned char bMode)
RSEG ?PR?_D12_SetDMA?D12CI
USING 0
_D12_SetDMA:
MOV bMode?30,R7
; SOURCE LINE # 75
; {
; SOURCE LINE # 76
; if(bEPPflags.bits.in_isr == 0)
; SOURCE LINE # 77
MOV R7,bEPPflags
MOV A,R7
SWAP A
RRC A
ANL A,#07H
JB ACC.0,?C0013
; DISABLE;
; SOURCE LINE # 78
CLR EA
?C0013:
;
; outportb(D12_COMMAND, 0xFB);
; SOURCE LINE # 80
MOV R7,#03H
MOV R5,#0FBH
; LCALL _outportb
MOV DPTR,#0FF03H
MOV A,R5
MOVX @DPTR,A
; outportb(D12_DATA, bMode);
; SOURCE LINE # 81
MOV R7,#02H
MOV R5,bMode?30
; LCALL _outportb
MOV DPTR,#0FF02H
MOV A,R5
MOVX @DPTR,A
;
; if(bEPPflags.bits.in_isr == 0)
; SOURCE LINE # 83
MOV R7,bEPPflags
MOV A,R7
SWAP A
RRC A
ANL A,#07H
JB ACC.0,?C0015
; ENABLE;
; SOURCE LINE # 84
SETB EA
; }
; SOURCE LINE # 85
?C0015:
RET
; END OF _D12_SetDMA
;
; unsigned short D12_ReadInterruptRegister(void)
RSEG ?PR?D12_ReadInterruptRegister?D12CI
USING 0
D12_ReadInterruptRegister:
; SOURCE LINE # 87
; {
; SOURCE LINE # 88
; unsigned char b1;
; unsigned int j;
;
; outportb(D12_COMMAND, 0xF4);
; SOURCE LINE # 92
MOV R7,#03H
MOV R5,#0F4H
; LCALL _outportb
MOV DPTR,#0FF03H
MOV A,R5
MOVX @DPTR,A
; b1 = inportb(D12_DATA);
; SOURCE LINE # 93
MOV R7,#02H
; LCALL _inportb
MOV DPTR,#0FF02H
MOVX A,@DPTR
MOV R7,A
MOV b1?41,R7
; j = inportb(D12_DATA);
; SOURCE LINE # 94
MOV R7,#02H
; LCALL _inportb
MOV DPTR,#0FF02H
MOVX A,@DPTR
MOV R7,A
;---- Variable 'j?41' assigned to Register 'R4/R5' ----
MOV R5,AR7
MOV R4,#00H
;
; j <<= 8;
; SOURCE LINE # 96
MOV A,R5
MOV R5,#00H
MOV R4,A
; j += b1;
; SOURCE LINE # 97
MOV A,R5
ADD A,b1?41
MOV R5,A
CLR A
ADDC A,R4
MOV R4,A
;
; return j;
; SOURCE LINE # 99
MOV R6,A
MOV R7,AR5
; }
; SOURCE LINE # 100
?C0016:
RET
; END OF D12_ReadInterruptRegister
;
; unsigned char D12_SelectEndpoint(unsigned char bEndp)
RSEG ?PR?_D12_SelectEndpoint?D12CI
USING 0
_D12_SelectEndpoint:
;---- Variable 'bEndp?50' assigned to Register 'R5' ----
MOV R5,AR7
; SOURCE LINE # 102
; {
; SOURCE LINE # 103
; unsigned char c;
;
; if(bEPPflags.bits.in_isr == 0)
; SOURCE LINE # 106
MOV R7,bEPPflags
MOV A,R7
SWAP A
RRC A
ANL A,#07H
JB ACC.0,?C0017
; DISABLE;
; SOURCE LINE # 107
CLR EA
?C0017:
;
; outportb(D12_COMMAND, bEndp);
; SOURCE LINE # 109
MOV R7,#03H
; LCALL _outportb
MOV DPTR,#0FF03H
MOV A,R5
MOVX @DPTR,A
; c = inportb(D12_DATA);
; SOURCE LINE # 110
MOV R7,#02H
; LCALL _inportb
MOV DPTR,#0FF02H
MOVX A,@DPTR
MOV R7,A
;---- Variable 'c?51' assigned to Register 'R7' ----
;
; if(bEPPflags.bits.in_isr == 0)
; SOURCE LINE # 112
MOV R6,bEPPflags
MOV A,R6
SWAP A
RRC A
ANL A,#07H
JB ACC.0,?C0018
; ENABLE;
; SOURCE LINE # 113
SETB EA
?C0018:
;
; return c;
; SOURCE LINE # 115
; }
; SOURCE LINE # 116
?C0019:
RET
; END OF _D12_SelectEndpoint
;
; unsigned char D12_GetDMA(void)
RSEG ?PR?D12_GetDMA?D12CI
USING 0
D12_GetDMA:
CLR EA
;
MOV R7,#03H
MOV R5,#0FBH
MOV DPTR,#0FF03H
MOV A,R5
MOVX @DPTR,A
;
MOV R7,#02H
MOV DPTR,#0FF02H
MOVX A,@DPTR
MOV R7,A
;
SETB EA
RET
; END OF D12_GetDMA
;
; unsigned char D12_ReadLastTransactionStatus(unsigned char bEndp)
RSEG ?PR?_D12_ReadLastTransactionStatus?D12CI
USING 0
_D12_ReadLastTransactionStatus:
;---- Variable 'bEndp?60' assigned to Register 'R6' ----
MOV R6,AR7
; SOURCE LINE # 118
; {
; SOURCE LINE # 119
; outportb(D12_COMMAND, 0x40 + bEndp);
; SOURCE LINE # 120
MOV R7,#03H
MOV A,R6
ADD A,#040H
MOV R5,A
; LCALL _outportb
MOV DPTR,#0FF03H
MOV A,R5
MOVX @DPTR,A
; return inportb(D12_DATA);
; SOURCE LINE # 121
MOV R7,#02H
; LCALL _inportb
MOV DPTR,#0FF02H
MOVX A,@DPTR
MOV R7,A
; }
; SOURCE LINE # 122
?C0020:
RET
; END OF _D12_ReadLastTransactionStatus
;
; unsigned char D12_ReadEndpointStatus(unsigned char bEndp)
RSEG ?PR?_D12_ReadEndpointStatus?D12CI
USING 0
_D12_ReadEndpointStatus:
;---- Variable 'bEndp?70' assigned to Register 'R6' ----
MOV R6,AR7
; SOURCE LINE # 124
; {
; SOURCE LINE # 125
; unsigned char c;
;
; if(bEPPflags.bits.in_isr == 0)
; SOURCE LINE # 128
MOV R7,bEPPflags
MOV A,R7
SWAP A
RRC A
ANL A,#07H
JB ACC.0,?C0021
; DISABLE;
; SOURCE LINE # 129
CLR EA
?C0021:
;
; outportb(D12_COMMAND, 0x80 + bEndp);
; SOURCE LINE # 131
MOV R7,#03H
MOV A,R6
ADD A,#080H
MOV R5,A
; LCALL _outportb
MOV DPTR,#0FF03H
MOV A,R5
MOVX @DPTR,A
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