📄 stm32f10x_gpio.lst
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# #
# IAR ARM ANSI C/C++ Compiler V4.42A/W32 15/May/2008 12:06:31 #
# Copyright 1999-2005 IAR Systems. All rights reserved. #
# #
# Cpu mode = thumb #
# Endian = little #
# Stack alignment = 4 #
# Source file = C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM #
# Encoder\example\FWLib\src\stm32f10x_gpio.c #
# Command line = "C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM #
# Encoder\example\FWLib\src\stm32f10x_gpio.c" -D #
# VECT_TAB_FLASH -lcN "C:\David JIANG\ST #
# MCU\Docs\STM32\AN_JIANG\TIM #
# Encoder\example\project\EWARM\BOOT_FLASH\List\" -lb #
# "C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM #
# Encoder\example\project\EWARM\BOOT_FLASH\List\" -o #
# "C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM #
# Encoder\example\project\EWARM\BOOT_FLASH\Obj\" -z3 #
# --no_cse --no_unroll --no_inline --no_code_motion #
# --no_tbaa --no_clustering --no_scheduling --debug #
# --cpu_mode thumb --endian little --cpu cortex-M3 #
# --stack_align 4 --require_prototypes --fpu None #
# --dlib_config "C:\Program Files\IAR #
# Systems\Embedded Workbench #
# 4.0\arm\LIB\dl7mptnnl8f.h" -I "C:\David JIANG\ST #
# MCU\Docs\STM32\AN_JIANG\TIM #
# Encoder\example\project\EWARM\" -I "C:\David #
# JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM #
# Encoder\example\project\EWARM\..\include\" -I #
# "C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM #
# Encoder\example\project\EWARM\..\..\FWLib\inc\" -I #
# "C:\Program Files\IAR Systems\Embedded Workbench #
# 4.0\arm\INC\" #
# List file = C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM #
# Encoder\example\project\EWARM\BOOT_FLASH\List\stm32f #
# 10x_gpio.lst #
# Object file = C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM #
# Encoder\example\project\EWARM\BOOT_FLASH\Obj\stm32f1 #
# 0x_gpio.r79 #
# #
# #
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C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM Encoder\example\FWLib\src\stm32f10x_gpio.c
1 /******************** (C) COPYRIGHT 2007 STMicroelectronics ********************
2 * File Name : stm32f10x_gpio.c
3 * Author : MCD Application Team
4 * Date First Issued : 09/29/2006
5 * Description : This file provides all the GPIO firmware functions.
6 ********************************************************************************
7 * History:
8 * 05/21/2007: V0.3
9 * 04/02/2007: V0.2
10 * 02/05/2007: V0.1
11 * 09/29/2006: V0.01
12 ********************************************************************************
13 * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
14 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
15 * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
16 * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
17 * CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
18 * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
19 *******************************************************************************/
20
21 /* Includes ------------------------------------------------------------------*/
22 #include "stm32f10x_gpio.h"
23 #include "stm32f10x_rcc.h"
24
25 /* Private typedef -----------------------------------------------------------*/
26 /* Private define ------------------------------------------------------------*/
27 /* ------------ RCC registers bit address in the alias region ----------- */
28 #define AFIO_OFFSET (AFIO_BASE - PERIPH_BASE)
29
30 /* --- EVENTCR Register ---*/
31 /* Alias word address of EVOE bit */
32 #define EVCR_OFFSET (AFIO_OFFSET + 0x00)
33 #define EVOE_BitNumber ((u8)0x07)
34 #define EVCR_EVOE_BB (PERIPH_BB_BASE + (EVCR_OFFSET * 32) + (EVOE_BitNumber * 4))
35
36 #define EVCR_PORTPINCONFIG_MASK ((u16)0xFF80)
37 #define LSB_MASK ((u16)0xFFFF)
38 #define DBGAFR_POSITION_MASK ((u32)0x000F0000)
39 #define DBGAFR_SWJCFG_MASK ((u32)0xF8FFFFFF)
40 #define DBGAFR_LOCATION_MASK ((u32)0x00200000)
41 #define DBGAFR_NUMBITS_MASK ((u32)0x00100000)
42
43 /* Private macro -------------------------------------------------------------*/
44 /* Private variables ---------------------------------------------------------*/
45 /* Private function prototypes -----------------------------------------------*/
46 /* Private functions ---------------------------------------------------------*/
47
48 /*******************************************************************************
49 * Function Name : GPIO_DeInit
50 * Description : Deinitializes the GPIOx peripheral registers to their default
51 * reset values.
52 * Input : - GPIOx: where x can be (A..E) to select the GPIO peripheral.
53 * Output : None
54 * Return : None
55 *******************************************************************************/
56 void GPIO_DeInit(GPIO_TypeDef* GPIOx)
57 {
58 switch (*(u32*)&GPIOx)
59 {
60 case GPIOA_BASE:
61 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, ENABLE);
62 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, DISABLE);
63 break;
64
65 case GPIOB_BASE:
66 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, ENABLE);
67 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, DISABLE);
68 break;
69
70 case GPIOC_BASE:
71 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, ENABLE);
72 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, DISABLE);
73 break;
74
75 case GPIOD_BASE:
76 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, ENABLE);
77 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, DISABLE);
78 break;
79
80 case GPIOE_BASE:
81 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, ENABLE);
82 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, DISABLE);
83 break;
84
85 default:
86 break;
87 }
88 }
89
90 /*******************************************************************************
91 * Function Name : GPIO_AFIODeInit
92 * Description : Deinitializes the Alternate Functions (remap, event control
93 * and EXTI configuration) registers to their default reset
94 * values.
95 * Input : None
96 * Output : None
97 * Return : None
98 *******************************************************************************/
99 void GPIO_AFIODeInit(void)
100 {
101 RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, ENABLE);
102 RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, DISABLE);
103 }
104
105 /*******************************************************************************
106 * Function Name : GPIO_Init
107 * Description : Initializes the GPIOx peripheral according to the specified
108 * parameters in the GPIO_InitStruct.
109 * Input : - GPIOx: where x can be (A..E) to select the GPIO peripheral.
110 * - GPIO_InitStruct: pointer to a GPIO_InitTypeDef structure that
111 * contains the configuration information for the specified GPIO
112 * peripheral.
113 * Output : None
114 * Return : None
115 *******************************************************************************/
116 void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct)
117 {
118 u32 currentmode = 0x00, currentpin = 0x00, pinpos = 0x00, pos = 0x00;
119 u32 tmpreg = 0x00, pinmask = 0x00;
120
121 /* Check the parameters */
122 assert(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode));
123 assert(IS_GPIO_PIN(GPIO_InitStruct->GPIO_Pin));
124
125 /*---------------------------- GPIO Mode Configuration -----------------------*/
126 currentmode = ((u32)GPIO_InitStruct->GPIO_Mode) & ((u32)0x0F);
127
128 if ((((u32)GPIO_InitStruct->GPIO_Mode) & ((u32)0x10)) != 0x00)
129 {
130 /* Check the parameters */
131 assert(IS_GPIO_SPEED(GPIO_InitStruct->GPIO_Speed));
132 /* Output mode */
133 currentmode |= (u32)GPIO_InitStruct->GPIO_Speed;
134 }
135
136 /*---------------------------- GPIO CRL Configuration ------------------------*/
137 /* Configure the eight low port pins */
138 if (((u32)GPIO_InitStruct->GPIO_Pin & ((u32)0x00FF)) != 0x00)
139 {
140 tmpreg = GPIOx->CRL;
141
142 for (pinpos = 0x00; pinpos < 0x08; pinpos++)
143 {
144 pos = ((u32)0x01) << pinpos;
145 /* Get the port pins position */
146 currentpin = (GPIO_InitStruct->GPIO_Pin) & pos;
147
148 if (currentpin == pos)
149 {
150 pos = pinpos << 2;
151 /* Clear the corresponding low control register bits */
152 pinmask = ((u32)0x0F) << pos;
153 tmpreg &= ~pinmask;
154
155 /* Write the mode configuration in the corresponding bits */
156 tmpreg |= (currentmode << pos);
157
158 /* Reset the corresponding ODR bit */
159 if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
160 {
161 GPIOx->BRR = (((u32)0x01) << pinpos);
162 }
163 /* Set the corresponding ODR bit */
164 if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
165 {
166 GPIOx->BSRR = (((u32)0x01) << pinpos);
167 }
168 }
169 }
170 GPIOx->CRL = tmpreg;
171 tmpreg = 0;
172 }
173
174 /*---------------------------- GPIO CRH Configuration ------------------------*/
175 /* Configure the eight high port pins */
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