stm32f10x_can.s79

STM32利用正交编码器实现电机的控制

//////////////////////////////////////////////////////////////////////////////
//                                                                           /
// IAR ARM ANSI C/C++ Compiler V4.42A/W32              15/May/2008  12:06:30 /
// Copyright 1999-2005 IAR Systems. All rights reserved.                     /
//                                                                           /
//    Cpu mode        =  thumb                                               /
//    Endian          =  little                                              /
//    Stack alignment =  4                                                   /
//    Source file     =  C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM       /
//                       Encoder\example\FWLib\src\stm32f10x_can.c           /
//    Command line    =  "C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM      /
//                       Encoder\example\FWLib\src\stm32f10x_can.c" -D       /
//                       VECT_TAB_FLASH -lcN "C:\David JIANG\ST              /
//                       MCU\Docs\STM32\AN_JIANG\TIM                         /
//                       Encoder\example\project\EWARM\BOOT_FLASH\List\"     /
//                       -lb "C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM  /
//                       Encoder\example\project\EWARM\BOOT_FLASH\List\" -o  /
//                       "C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM      /
//                       Encoder\example\project\EWARM\BOOT_FLASH\Obj\" -z3  /
//                       --no_cse --no_unroll --no_inline --no_code_motion   /
//                       --no_tbaa --no_clustering --no_scheduling --debug   /
//                       --cpu_mode thumb --endian little --cpu cortex-M3    /
//                       --stack_align 4 --require_prototypes --fpu None     /
//                       --dlib_config "C:\Program Files\IAR                 /
//                       Systems\Embedded Workbench                          /
//                       4.0\arm\LIB\dl7mptnnl8f.h" -I "C:\David JIANG\ST    /
//                       MCU\Docs\STM32\AN_JIANG\TIM                         /
//                       Encoder\example\project\EWARM\" -I "C:\David        /
//                       JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM                /
//                       Encoder\example\project\EWARM\..\include\" -I       /
//                       "C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM      /
//                       Encoder\example\project\EWARM\..\..\FWLib\inc\" -I  /
//                       "C:\Program Files\IAR Systems\Embedded Workbench    /
//                       4.0\arm\INC\"                                       /
//    List file       =  C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM       /
//                       Encoder\example\project\EWARM\BOOT_FLASH\List\stm32 /
//                       f10x_can.s79                                        /
//                                                                           /
//                                                                           /
//////////////////////////////////////////////////////////////////////////////

        NAME stm32f10x_can

        RSEG CSTACK:DATA:NOROOT(2)

??DataTable0 EQU 0
??DataTable1 EQU 0
??DataTable100 EQU 0
??DataTable101 EQU 0
??DataTable102 EQU 0
??DataTable103 EQU 0
??DataTable104 EQU 0
??DataTable105 EQU 0
??DataTable107 EQU 0
??DataTable108 EQU 0
??DataTable109 EQU 0
??DataTable11 EQU 0
??DataTable110 EQU 0
??DataTable111 EQU 0
??DataTable112 EQU 0
??DataTable113 EQU 0
??DataTable114 EQU 0
??DataTable116 EQU 0
??DataTable117 EQU 0
??DataTable118 EQU 0
??DataTable119 EQU 0
??DataTable12 EQU 0
??DataTable120 EQU 0
??DataTable121 EQU 0
??DataTable122 EQU 0
??DataTable123 EQU 0
??DataTable124 EQU 0
??DataTable125 EQU 0
??DataTable126 EQU 0
??DataTable127 EQU 0
??DataTable128 EQU 0
??DataTable129 EQU 0
??DataTable13 EQU 0
??DataTable130 EQU 0
??DataTable131 EQU 0
??DataTable132 EQU 0
??DataTable133 EQU 0
??DataTable134 EQU 0
??DataTable135 EQU 0
??DataTable136 EQU 0
??DataTable137 EQU 0
??DataTable138 EQU 0
??DataTable139 EQU 0
??DataTable14 EQU 0
??DataTable140 EQU 0
??DataTable141 EQU 0
??DataTable143 EQU 0
??DataTable145 EQU 0
??DataTable146 EQU 0
??DataTable147 EQU 0
??DataTable148 EQU 0
??DataTable149 EQU 0
??DataTable15 EQU 0
??DataTable150 EQU 0
??DataTable151 EQU 0
??DataTable152 EQU 0
??DataTable153 EQU 0
??DataTable154 EQU 0
??DataTable155 EQU 0
??DataTable156 EQU 0
??DataTable157 EQU 0
??DataTable159 EQU 0
??DataTable16 EQU 0
??DataTable160 EQU 0
??DataTable161 EQU 0
??DataTable162 EQU 0
??DataTable163 EQU 0
??DataTable164 EQU 0
??DataTable165 EQU 0
??DataTable166 EQU 0
??DataTable167 EQU 0
??DataTable168 EQU 0
??DataTable169 EQU 0
??DataTable17 EQU 0
??DataTable170 EQU 0
??DataTable171 EQU 0
??DataTable172 EQU 0
??DataTable18 EQU 0
??DataTable19 EQU 0
??DataTable2 EQU 0
??DataTable20 EQU 0
??DataTable21 EQU 0
??DataTable22 EQU 0
??DataTable23 EQU 0
??DataTable24 EQU 0
??DataTable25 EQU 0
??DataTable26 EQU 0
??DataTable27 EQU 0
??DataTable28 EQU 0
??DataTable29 EQU 0
??DataTable3 EQU 0
??DataTable30 EQU 0
??DataTable31 EQU 0
??DataTable32 EQU 0
??DataTable33 EQU 0
??DataTable34 EQU 0
??DataTable35 EQU 0
??DataTable36 EQU 0
??DataTable37 EQU 0
??DataTable38 EQU 0
??DataTable39 EQU 0
??DataTable4 EQU 0
??DataTable41 EQU 0
??DataTable42 EQU 0
??DataTable43 EQU 0
??DataTable44 EQU 0
??DataTable45 EQU 0
??DataTable46 EQU 0
??DataTable47 EQU 0
??DataTable48 EQU 0
??DataTable49 EQU 0
??DataTable5 EQU 0
??DataTable50 EQU 0
??DataTable51 EQU 0
??DataTable52 EQU 0
??DataTable53 EQU 0
??DataTable54 EQU 0
??DataTable55 EQU 0
??DataTable56 EQU 0
??DataTable57 EQU 0
??DataTable58 EQU 0
??DataTable59 EQU 0
??DataTable6 EQU 0
??DataTable60 EQU 0
??DataTable61 EQU 0
??DataTable62 EQU 0
??DataTable63 EQU 0
??DataTable64 EQU 0
??DataTable65 EQU 0
??DataTable66 EQU 0
??DataTable67 EQU 0
??DataTable68 EQU 0
??DataTable69 EQU 0
??DataTable7 EQU 0
??DataTable70 EQU 0
??DataTable72 EQU 0
??DataTable73 EQU 0
??DataTable74 EQU 0
??DataTable76 EQU 0
??DataTable77 EQU 0
??DataTable78 EQU 0
??DataTable79 EQU 0
??DataTable8 EQU 0
??DataTable80 EQU 0
??DataTable81 EQU 0
??DataTable82 EQU 0
??DataTable83 EQU 0
??DataTable84 EQU 0
??DataTable85 EQU 0
??DataTable86 EQU 0
??DataTable87 EQU 0
??DataTable88 EQU 0
??DataTable89 EQU 0
??DataTable9 EQU 0
??DataTable90 EQU 0
??DataTable91 EQU 0
??DataTable92 EQU 0
??DataTable93 EQU 0
??DataTable94 EQU 0
??DataTable95 EQU 0
??DataTable96 EQU 0
??DataTable97 EQU 0
??DataTable98 EQU 0
??DataTable99 EQU 0
        MULTWEAK ??RCC_APB1PeriphResetCmd??rT
        MULTWEAK ??assert_failed??rT
        PUBLIC CAN_CancelTransmit
        PUBLIC CAN_ClearFlag
        PUBLIC CAN_ClearITPendingBit
        PUBLIC CAN_DeInit
        PUBLIC CAN_FIFORelease
        PUBLIC CAN_FilterInit
        PUBLIC CAN_GetFlagStatus
        PUBLIC CAN_GetITStatus
        PUBLIC CAN_ITConfig
        PUBLIC CAN_Init
        PUBLIC CAN_MessagePending
        PUBLIC CAN_Receive
        PUBLIC CAN_Sleep
        PUBLIC CAN_StructInit
        PUBLIC CAN_Transmit
        PUBLIC CAN_TransmitStatus
        PUBLIC CAN_WakeUp

RCC_APB1PeriphResetCmd SYMBOL "RCC_APB1PeriphResetCmd"
assert_failed       SYMBOL "assert_failed"
??RCC_APB1PeriphResetCmd??rT SYMBOL "??rT", RCC_APB1PeriphResetCmd
??assert_failed??rT SYMBOL "??rT", assert_failed

        EXTERN CAN
        EXTERN RCC_APB1PeriphResetCmd
        EXTERN assert_failed


        RSEG CODE:CODE:NOROOT(2)
        THUMB
CAN_DeInit:
        PUSH     {LR}
        MOVS     R1,#+1
        MOVS     R0,#[phone]
        _BLF     RCC_APB1PeriphResetCmd,??RCC_APB1PeriphResetCmd??rT
        MOVS     R1,#+0
        MOVS     R0,#[phone]
        _BLF     RCC_APB1PeriphResetCmd,??RCC_APB1PeriphResetCmd??rT
        POP      {PC}             ;; return

        RSEG CODE:CODE:NOROOT(2)
        THUMB
CAN_Init:
        PUSH     {R4,LR}
        MOVS     R4,R0
        MOVS     R0,#+0
        LDRB     R1,[R4, #+0]
        CMP      R1,#+0
        BEQ.N    ??CAN_Init_0
        LDRB     R0,[R4, #+0]
        CMP      R0,#+1
        BEQ.N    ??CAN_Init_0
        MOVS     R1,#+116
        LDR.N    R0,??DataTable10  ;; `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`
        _BLF     assert_failed,??assert_failed??rT
??CAN_Init_0:
        LDRB     R0,[R4, #+1]
        CMP      R0,#+0
        BEQ.N    ??CAN_Init_1
        LDRB     R0,[R4, #+1]
        CMP      R0,#+1
        BEQ.N    ??CAN_Init_1
        MOVS     R1,#+117
        LDR.N    R0,??DataTable10  ;; `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`
        _BLF     assert_failed,??assert_failed??rT
??CAN_Init_1:
        LDRB     R0,[R4, #+2]
        CMP      R0,#+0
        BEQ.N    ??CAN_Init_2
        LDRB     R0,[R4, #+2]
        CMP      R0,#+1
        BEQ.N    ??CAN_Init_2
        MOVS     R1,#+118
        LDR.N    R0,??DataTable10  ;; `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`
        _BLF     assert_failed,??assert_failed??rT
??CAN_Init_2:
        LDRB     R0,[R4, #+3]
        CMP      R0,#+0
        BEQ.N    ??CAN_Init_3
        LDRB     R0,[R4, #+3]
        CMP      R0,#+1
        BEQ.N    ??CAN_Init_3
        MOVS     R1,#+119
        LDR.N    R0,??DataTable10  ;; `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`
        _BLF     assert_failed,??assert_failed??rT
??CAN_Init_3:
        LDRB     R0,[R4, #+4]
        CMP      R0,#+0
        BEQ.N    ??CAN_Init_4
        LDRB     R0,[R4, #+4]
        CMP      R0,#+1
        BEQ.N    ??CAN_Init_4
        MOVS     R1,#+120
        LDR.N    R0,??DataTable10  ;; `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`
        _BLF     assert_failed,??assert_failed??rT
??CAN_Init_4:
        LDRB     R0,[R4, #+5]
        CMP      R0,#+0
        BEQ.N    ??CAN_Init_5
        LDRB     R0,[R4, #+5]
        CMP      R0,#+1
        BEQ.N    ??CAN_Init_5
        MOVS     R1,#+121
        LDR.N    R0,??DataTable10  ;; `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`
        _BLF     assert_failed,??assert_failed??rT
??CAN_Init_5:
        LDRB     R0,[R4, #+6]
        CMP      R0,#+0
        BEQ.N    ??CAN_Init_6
        LDRB     R0,[R4, #+6]
        CMP      R0,#+1
        BEQ.N    ??CAN_Init_6
        LDRB     R0,[R4, #+6]
        CMP      R0,#+2
        BEQ.N    ??CAN_Init_6
        LDRB     R0,[R4, #+6]
        CMP      R0,#+3
        BEQ.N    ??CAN_Init_6
        MOVS     R1,#+122
        LDR.N    R0,??DataTable10  ;; `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`
        _BLF     assert_failed,??assert_failed??rT
??CAN_Init_6:
        LDRB     R0,[R4, #+7]
        CMP      R0,#+0
        BEQ.N    ??CAN_Init_7
        LDRB     R0,[R4, #+7]
        CMP      R0,#+1
        BEQ.N    ??CAN_Init_7
        LDRB     R0,[R4, #+7]
        CMP      R0,#+2
        BEQ.N    ??CAN_Init_7
        LDRB     R0,[R4, #+7]
        CMP      R0,#+3
        BEQ.N    ??CAN_Init_7
        MOVS     R1,#+123
        LDR.N    R0,??DataTable10  ;; `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`
        _BLF     assert_failed,??assert_failed??rT
??CAN_Init_7:
        LDRB     R0,[R4, #+8]
        CMP      R0,#+16
        BCC.N    ??CAN_Init_8
        MOVS     R1,#+124
        LDR.N    R0,??DataTable10  ;; `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`
        _BLF     assert_failed,??assert_failed??rT
??CAN_Init_8:
        LDRB     R0,[R4, #+9]
        CMP      R0,#+8
        BCC.N    ??CAN_Init_9
        MOVS     R1,#+125
        LDR.N    R0,??DataTable10  ;; `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`
        _BLF     assert_failed,??assert_failed??rT
??CAN_Init_9:
        LDRH     R0,[R4, #+10]
        CMP      R0,#+1
        BCC.N    ??CAN_Init_10
        LDRH     R0,[R4, #+10]
        LDR.N    R1,??CAN_Init_11  ;; 0x401
        CMP      R0,R1
        BCC.N    ??CAN_Init_12
??CAN_Init_10:
        MOVS     R1,#+126
        LDR.N    R0,??DataTable10  ;; `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`
        _BLF     assert_failed,??assert_failed??rT
??CAN_Init_12:
        LDR.N    R0,??DataTable40  ;; CAN
        LDR      R0,[R0, #+0]
        MOVS     R1,#+1
        STR      R1,[R0, #+0]
        LDR.N    R0,??DataTable40  ;; CAN
        LDR      R0,[R0, #+0]
        LDR      R0,[R0, #+4]
        LSLS     R0,R0,#+31
        BMI.N    ??CAN_Init_13
        MOVS     R0,#+0
        B.N      ??CAN_Init_14
??CAN_Init_13:
        LDRB     R0,[R4, #+0]
        CMP      R0,#+1
        BNE.N    ??CAN_Init_15
        LDR.N    R0,??DataTable40  ;; CAN
        LDR      R0,[R0, #+0]
        LDR.N    R1,??DataTable40  ;; CAN
        LDR      R1,[R1, #+0]