stm32f10x_rcc.s79

STM32利用正交编码器实现电机的控制

        MVNS     R0,#+49152
        ANDS     R0,R0,R1
        ORRS     R4,R4,R0
        MOVS     R0,R4
        LDR.N    R1,??DataTable66  ;; RCC
        LDR      R1,[R1, #+0]
        STR      R0,[R1, #+4]
        POP      {R4,PC}          ;; return

        RSEG CODE:CODE:NOROOT(2)
        THUMB
RCC_LSEConfig:
        PUSH     {R4,LR}
        MOVS     R4,R0
        CMP      R4,#+0
        BEQ.N    ??RCC_LSEConfig_0
        CMP      R4,#+1
        BEQ.N    ??RCC_LSEConfig_0
        CMP      R4,#+4
        BEQ.N    ??RCC_LSEConfig_0
        LDR.N    R1,??RCC_LSEConfig_1  ;; 0x249
        LDR.N    R0,??DataTable75  ;; `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`
        _BLF     assert_failed,??assert_failed??rT
??RCC_LSEConfig_0:
        LDR.N    R0,??RCC_LSEConfig_1+0x4  ;; 0x40021020
        MOVS     R1,#+0
        STRB     R1,[R0, #+0]
        LDR.N    R0,??RCC_LSEConfig_1+0x4  ;; 0x40021020
        MOVS     R1,#+0
        STRB     R1,[R0, #+0]
        CMP      R4,#+1
        BEQ.N    ??RCC_LSEConfig_2
        CMP      R4,#+4
        BEQ.N    ??RCC_LSEConfig_3
        B.N      ??RCC_LSEConfig_4
??RCC_LSEConfig_2:
        LDR.N    R0,??RCC_LSEConfig_1+0x4  ;; 0x40021020
        MOVS     R1,#+1
        STRB     R1,[R0, #+0]
        B.N      ??RCC_LSEConfig_4
??RCC_LSEConfig_3:
        LDR.N    R0,??RCC_LSEConfig_1+0x4  ;; 0x40021020
        MOVS     R1,#+5
        STRB     R1,[R0, #+0]
??RCC_LSEConfig_4:
        POP      {R4,PC}          ;; return
        Nop      
        DATA
??RCC_LSEConfig_1:
        DC32     0x249
        DC32     0x40021020

        RSEG CODE:CODE:NOROOT(2)
        THUMB
RCC_LSICmd:
        PUSH     {R4,LR}
        MOVS     R4,R0
        CMP      R4,#+0
        BEQ.N    ??RCC_LSICmd_0
        CMP      R4,#+1
        BEQ.N    ??RCC_LSICmd_0
        MOVS     R1,#+624
        LDR.N    R0,??DataTable75  ;; `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`
        _BLF     assert_failed,??assert_failed??rT
??RCC_LSICmd_0:
        LDR.N    R0,??RCC_LSICmd_1  ;; 0x42420480
        STR      R4,[R0, #+0]
        POP      {R4,PC}          ;; return
        DATA
??RCC_LSICmd_1:
        DC32     0x42420480

        RSEG CODE:CODE:NOROOT(2)
        THUMB
RCC_RTCCLKConfig:
        PUSH     {R4,LR}
        MOVS     R4,R0
        CMP      R4,#+256
        BEQ.N    ??RCC_RTCCLKConfig_0
        CMP      R4,#+512
        BEQ.N    ??RCC_RTCCLKConfig_0
        CMP      R4,#+768
        BEQ.N    ??RCC_RTCCLKConfig_0
        LDR.N    R1,??RCC_RTCCLKConfig_1  ;; 0x286
        LDR.N    R0,??DataTable75  ;; `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`
        _BLF     assert_failed,??assert_failed??rT
??RCC_RTCCLKConfig_0:
        LDR.N    R0,??DataTable66  ;; RCC
        LDR      R0,[R0, #+0]
        LDR.N    R1,??DataTable66  ;; RCC
        LDR      R1,[R1, #+0]
        LDR      R1,[R1, #+32]
        ORRS     R4,R4,R1
        STR      R4,[R0, #+32]
        POP      {R4,PC}          ;; return
        Nop      
        DATA
??RCC_RTCCLKConfig_1:
        DC32     0x286

        RSEG CODE:CODE:NOROOT(2)
        THUMB
RCC_RTCCLKCmd:
        PUSH     {R4,LR}
        MOVS     R4,R0
        CMP      R4,#+0
        BEQ.N    ??RCC_RTCCLKCmd_0
        CMP      R4,#+1
        BEQ.N    ??RCC_RTCCLKCmd_0
        LDR.N    R1,??RCC_RTCCLKCmd_1  ;; 0x299
        LDR.N    R0,??DataTable75  ;; `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`
        _BLF     assert_failed,??assert_failed??rT
??RCC_RTCCLKCmd_0:
        LDR.N    R0,??RCC_RTCCLKCmd_1+0x4  ;; 0x4242043c
        STR      R4,[R0, #+0]
        POP      {R4,PC}          ;; return
        Nop      
        DATA
??RCC_RTCCLKCmd_1:
        DC32     0x299
        DC32     0x4242043c

        RSEG CODE:CODE:NOROOT(2)
        THUMB
RCC_GetClocksFreq:
        PUSH     {R4,R5,LR}
        MOVS     R4,#+0
        MOVS     R1,#+0
        MOVS     R2,#+0
        MOVS     R3,#+0
        LDR.N    R5,??DataTable66  ;; RCC
        LDR      R5,[R5, #+0]
        LDR      R5,[R5, #+4]
        ANDS     R4,R5,#0xC
        CMP      R4,#+0
        BEQ.N    ??RCC_GetClocksFreq_0
        CMP      R4,#+4
        BEQ.N    ??RCC_GetClocksFreq_1
        CMP      R4,#+8
        BEQ.N    ??RCC_GetClocksFreq_2
        B.N      ??RCC_GetClocksFreq_3
??RCC_GetClocksFreq_0:
        LDR.N    R1,??RCC_GetClocksFreq_4  ;; 0x7a1200
        STR      R1,[R0, #+0]
        B.N      ??RCC_GetClocksFreq_5
??RCC_GetClocksFreq_1:
        LDR.N    R1,??RCC_GetClocksFreq_4  ;; 0x7a1200
        STR      R1,[R0, #+0]
        B.N      ??RCC_GetClocksFreq_5
??RCC_GetClocksFreq_2:
        LDR.N    R1,??DataTable66  ;; RCC
        LDR      R1,[R1, #+0]
        LDR      R1,[R1, #+4]
        ANDS     R1,R1,#0x3C0000
        LSRS     R1,R1,#+18
        ADDS     R1,R1,#+2
        LDR.N    R2,??DataTable66  ;; RCC
        LDR      R2,[R2, #+0]
        LDR      R3,[R2, #+4]
        MOVS     R2,#+65536
        ANDS     R2,R2,R3
        CMP      R2,#+0
        BNE.N    ??RCC_GetClocksFreq_6
        LDR.N    R2,??RCC_GetClocksFreq_4+0x4  ;; 0x3d0900
        MULS     R1,R2,R1
        STR      R1,[R0, #+0]
        B.N      ??RCC_GetClocksFreq_5
??RCC_GetClocksFreq_6:
        LDR.N    R2,??DataTable66  ;; RCC
        LDR      R2,[R2, #+0]
        LDR      R2,[R2, #+4]
        LSLS     R2,R2,#+14
        BPL.N    ??RCC_GetClocksFreq_7
        LDR.N    R2,??RCC_GetClocksFreq_4+0x4  ;; 0x3d0900
        MULS     R1,R2,R1
        STR      R1,[R0, #+0]
        B.N      ??RCC_GetClocksFreq_5
??RCC_GetClocksFreq_7:
        LDR.N    R2,??RCC_GetClocksFreq_4  ;; 0x7a1200
        MULS     R1,R2,R1
        STR      R1,[R0, #+0]
        B.N      ??RCC_GetClocksFreq_5
??RCC_GetClocksFreq_3:
        LDR.N    R1,??RCC_GetClocksFreq_4  ;; 0x7a1200
        STR      R1,[R0, #+0]
??RCC_GetClocksFreq_5:
        LDR.N    R1,??DataTable66  ;; RCC
        LDR      R1,[R1, #+0]
        LDR      R1,[R1, #+4]
        ANDS     R4,R1,#0xF0
        LSRS     R4,R4,#+4
        LDR.N    R1,??RCC_GetClocksFreq_4+0x8  ;; APBAHBPrescTable
        LDRB     R3,[R1, R4]
        LDR      R1,[R0, #+0]
        LSRS     R1,R1,R3
        STR      R1,[R0, #+4]
        LDR.N    R1,??DataTable66  ;; RCC
        LDR      R1,[R1, #+0]
        LDR      R1,[R1, #+4]
        ANDS     R4,R1,#0x700
        LSRS     R4,R4,#+8
        LDR.N    R1,??RCC_GetClocksFreq_4+0x8  ;; APBAHBPrescTable
        LDRB     R3,[R1, R4]
        LDR      R1,[R0, #+4]
        LSRS     R1,R1,R3
        STR      R1,[R0, #+8]
        LDR.N    R1,??DataTable66  ;; RCC
        LDR      R1,[R1, #+0]
        LDR      R1,[R1, #+4]
        ANDS     R4,R1,#0x3800
        LSRS     R4,R4,#+11
        LDR.N    R1,??RCC_GetClocksFreq_4+0x8  ;; APBAHBPrescTable
        LDRB     R3,[R1, R4]
        LDR      R1,[R0, #+4]
        LSRS     R1,R1,R3
        STR      R1,[R0, #+12]
        LDR.N    R1,??DataTable66  ;; RCC
        LDR      R1,[R1, #+0]
        LDR      R1,[R1, #+4]
        ANDS     R4,R1,#0xC000
        LSRS     R4,R4,#+14
        LDR.N    R1,??RCC_GetClocksFreq_4+0xC  ;; ADCPrescTable
        LDRB     R3,[R1, R4]
        LDR      R1,[R0, #+12]
        UDIV     R1,R1,R3
        STR      R1,[R0, #+16]
        POP      {R4,R5,PC}       ;; return
        Nop      
        DATA
??RCC_GetClocksFreq_4:
        DC32     0x7a1200
        DC32     0x3d0900
        DC32     APBAHBPrescTable
        DC32     ADCPrescTable

        RSEG CODE:CODE:NOROOT(2)
        DATA
??DataTable66:
        DC32     RCC

        RSEG CODE:CODE:NOROOT(2)
        THUMB
RCC_AHBPeriphClockCmd:
        PUSH     {R4,R5,LR}
        MOVS     R4,R0
        MOVS     R5,R1
        MOVS     R0,R4
        MOVS     R1,#+21
        BICS     R0,R0,R1
        CMP      R0,#+0
        BNE.N    ??RCC_AHBPeriphClockCmd_0
        CMP      R4,#+0
        BNE.N    ??RCC_AHBPeriphClockCmd_1
??RCC_AHBPeriphClockCmd_0:
        LDR.N    R1,??RCC_AHBPeriphClockCmd_2  ;; 0x309
        LDR.N    R0,??DataTable75  ;; `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`
        _BLF     assert_failed,??assert_failed??rT
??RCC_AHBPeriphClockCmd_1:
        CMP      R5,#+0
        BEQ.N    ??RCC_AHBPeriphClockCmd_3
        CMP      R5,#+1
        BEQ.N    ??RCC_AHBPeriphClockCmd_3
        LDR.N    R1,??RCC_AHBPeriphClockCmd_2+0x4  ;; 0x30a
        LDR.N    R0,??DataTable75  ;; `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`
        _BLF     assert_failed,??assert_failed??rT
??RCC_AHBPeriphClockCmd_3:
        CMP      R5,#+0
        BEQ.N    ??RCC_AHBPeriphClockCmd_4
        LDR.N    R0,??DataTable109  ;; RCC
        LDR      R0,[R0, #+0]
        LDR.N    R1,??DataTable109  ;; RCC
        LDR      R1,[R1, #+0]
        LDR      R1,[R1, #+20]
        ORRS     R4,R4,R1
        STR      R4,[R0, #+20]
        B.N      ??RCC_AHBPeriphClockCmd_5
??RCC_AHBPeriphClockCmd_4:
        LDR.N    R0,??DataTable109  ;; RCC
        LDR      R0,[R0, #+0]
        LDR.N    R1,??DataTable109  ;; RCC
        LDR      R1,[R1, #+0]
        LDR      R1,[R1, #+20]
        BICS     R1,R1,R4
        STR      R1,[R0, #+20]
??RCC_AHBPeriphClockCmd_5:
        POP      {R4,R5,PC}       ;; return
        DATA
??RCC_AHBPeriphClockCmd_2:
        DC32     0x309
        DC32     0x30a

        RSEG CODE:CODE:NOROOT(2)
        THUMB
RCC_APB2PeriphClockCmd:
        PUSH     {R4,R5,LR}
        MOVS     R4,R0
        MOVS     R5,R1
        LDR.N    R0,??DataTable87  ;; 0xffffffffffffa182
        ANDS     R0,R0,R4
        CMP      R0,#+0
        BNE.N    ??RCC_APB2PeriphClockCmd_0
        CMP      R4,#+0
        BNE.N    ??RCC_APB2PeriphClockCmd_1
??RCC_APB2PeriphClockCmd_0:
        MOVS     R1,#+808
        LDR.N    R0,??DataTable75  ;; `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`
        _BLF     assert_failed,??assert_failed??rT
??RCC_APB2PeriphClockCmd_1:
        CMP      R5,#+0
        BEQ.N    ??RCC_APB2PeriphClockCmd_2
        CMP      R5,#+1
        BEQ.N    ??RCC_APB2PeriphClockCmd_2
        LDR.N    R1,??RCC_APB2PeriphClockCmd_3  ;; 0x329
        LDR.N    R0,??DataTable75  ;; `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`
        _BLF     assert_failed,??assert_failed??rT
??RCC_APB2PeriphClockCmd_2:
        CMP      R5,#+0
        BEQ.N    ??RCC_APB2PeriphClockCmd_4
        LDR.N    R0,??DataTable109  ;; RCC
        LDR      R0,[R0, #+0]
        LDR.N    R1,??DataTable109  ;; RCC
        LDR      R1,[R1, #+0]
        LDR      R1,[R1, #+24]
        ORRS     R4,R4,R1
        STR      R4,[R0, #+24]
        B.N      ??RCC_APB2PeriphClockCmd_5
??RCC_APB2PeriphClockCmd_4:
        LDR.N    R0,??DataTable109  ;; RCC
        LDR      R0,[R0, #+0]
        LDR.N    R1,??DataTable109  ;; RCC
        LDR      R1,[R1, #+0]
        LDR      R1,[R1, #+24]
        BICS     R1,R1,R4
        STR      R1,[R0, #+24]
??RCC_APB2PeriphClockCmd_5:
        POP      {R4,R5,PC}       ;; return
        DATA
??RCC_APB2PeriphClockCmd_3:
        DC32     0x329

        RSEG CODE:CODE:NOROOT(2)
        DATA
??DataTable75:
        DC32     `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`

        RSEG CODE:CODE:NOROOT(2)
        THUMB
RCC_APB1PeriphClockCmd:
        PUSH     {R4,R5,LR}
        MOVS     R4,R0
        MOVS     R5,R1
        LDR.N    R0,??DataTable94  ;; 0xffffffffe519b7f8
        ANDS     R0,R0,R4
        CMP      R0,#+0
        BNE.N    ??RCC_APB1PeriphClockCmd_0
        CMP      R4,#+0
        BNE.N    ??RCC_APB1PeriphClockCmd_1
??RCC_APB1PeriphClockCmd_0:
        MOVS     R1,#+840
        LDR.N    R0,??DataTable112  ;; `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`
        _BLF     assert_failed,??assert_failed??rT
??RCC_APB1PeriphClockCmd_1:
        CMP      R5,#+0
        BEQ.N    ??RCC_APB1PeriphClockCmd_2
        CMP      R5,#+1
        BEQ.N    ??RCC_APB1PeriphClockCmd_2
        LDR.N    R1,??RCC_APB1PeriphClockCmd_3  ;; 0x349
        LDR.N    R0,??DataTable112  ;; `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`
        _BLF     assert_failed,??assert_failed??rT
??RCC_APB1PeriphClockCmd_2:
        CMP      R5,#+0
        BEQ.N    ??RCC_APB1PeriphClockCmd_4
        LDR.N    R0,??DataTable109  ;; RCC
        LDR      R0,[R0, #+0]
        LDR.N    R1,??DataTable109  ;; RCC
        LDR      R1,[R1, #+0]
        LDR      R1,[R1, #+28]
        ORRS     R4,R4,R1
        STR      R4,[R0, #+28]
        B.N      ??RCC_APB1PeriphClockCmd_5
??RCC_APB1PeriphClockCmd_4: