📄 stm32f10x_rcc.lst
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884 * Function Name : RCC_APB1PeriphResetCmd
885 * Description : Forces or releases Low Speed APB (APB1) peripheral reset.
886 * Input : - RCC_APB1Periph: specifies the APB1 peripheral to reset.
887 * This parameter can be any combination of the following values:
888 * - RCC_APB1Periph_TIM2, RCC_APB1Periph_TIM3, RCC_APB1Periph_TIM4
889 * RCC_APB1Periph_WWDG, RCC_APB1Periph_SPI2, RCC_APB1Periph_USART2
890 * RCC_APB1Periph_USART3, RCC_APB1Periph_I2C1, RCC_APB1Periph_I2C2
891 * RCC_APB1Periph_USB, RCC_APB1Periph_CAN, RCC_APB1Periph_BKP
892 * RCC_APB1Periph_PWR, RCC_APB1Periph_ALL
893 * - NewState: new state of the specified peripheral clock.
894 * This parameter can be: ENABLE or DISABLE.
895 * Output : None
896 * Return : None
897 *******************************************************************************/
898 void RCC_APB1PeriphResetCmd(u32 RCC_APB1Periph, FunctionalState NewState)
899 {
900 /* Check the parameters */
901 assert(IS_RCC_APB1_PERIPH(RCC_APB1Periph));
902 assert(IS_FUNCTIONAL_STATE(NewState));
903
904 if (NewState != DISABLE)
905 {
906 RCC->APB1RSTR |= RCC_APB1Periph;
907 }
908 else
909 {
910 RCC->APB1RSTR &= ~RCC_APB1Periph;
911 }
912 }
913
914 /*******************************************************************************
915 * Function Name : RCC_BackupResetCmd
916 * Description : Forces or releases the Backup domain reset.
917 * Input : - NewState: new state of the Backup domain reset.
918 * This parameter can be: ENABLE or DISABLE.
919 * Output : None
920 * Return : None
921 *******************************************************************************/
922 void RCC_BackupResetCmd(FunctionalState NewState)
923 {
924 /* Check the parameters */
925 assert(IS_FUNCTIONAL_STATE(NewState));
926
927 *(vu32 *) BDCR_BDRST_BB = (u32)NewState;
928 }
929
930 /*******************************************************************************
931 * Function Name : RCC_ClockSecuritySystemCmd
932 * Description : Enables or disables the Clock Security System.
933 * Input : - NewState: new state of the Clock Security System..
934 * This parameter can be: ENABLE or DISABLE.
935 * Output : None
936 * Return : None
937 *******************************************************************************/
938 void RCC_ClockSecuritySystemCmd(FunctionalState NewState)
939 {
940 /* Check the parameters */
941 assert(IS_FUNCTIONAL_STATE(NewState));
942
943 *(vu32 *) CR_CSSON_BB = (u32)NewState;
944 }
945
946 /*******************************************************************************
947 * Function Name : RCC_MCOConfig
948 * Description : Selects the clock source to output on MCO pin.
949 * Input : - RCC_MCO: specifies the clock source to output.
950 * This parameter can be one of the following values:
951 * - RCC_MCO_NoClock: No clock selected
952 * - RCC_MCO_SYSCLK: System clock selected
953 * - RCC_MCO_HSI: HSI oscillator clock selected
954 * - RCC_MCO_HSE: HSE oscillator clock selected
955 * - RCC_MCO_PLLCLK_Div2: PLL clock divided by 2 selected
956 * Output : None
957 * Return : None
958 *******************************************************************************/
959 void RCC_MCOConfig(u8 RCC_MCO)
960 {
961 /* Check the parameters */
962 assert(IS_RCC_MCO(RCC_MCO));
963
964 /* Perform Byte access to MCO[26:24] bits to select the MCO source */
965 *(vu8 *) 0x40021007 = RCC_MCO;
966 }
967
968 /*******************************************************************************
969 * Function Name : RCC_GetFlagStatus
970 * Description : Checks whether the specified RCC flag is set or not.
971 * Input : - RCC_FLAG: specifies the flag to check.
972 * This parameter can be one of the following values:
973 * - RCC_FLAG_HSIRDY: HSI oscillator clock ready
974 * - RCC_FLAG_HSERDY: HSE oscillator clock ready
975 * - RCC_FLAG_PLLRDY: PLL clock ready
976 * - RCC_FLAG_LSERDY: LSE oscillator clock ready
977 * - RCC_FLAG_LSIRDY: LSI oscillator clock ready
978 * - RCC_FLAG_PINRST: Pin reset
979 * - RCC_FLAG_PORRST: POR/PDR reset
980 * - RCC_FLAG_SFTRST: Software reset
981 * - RCC_FLAG_IWDGRST: Independent Watchdog reset
982 * - RCC_FLAG_WWDGRST: Window Watchdog reset
983 * - RCC_FLAG_LPWRRST: Low Power reset
984 * Output : None
985 * Return : The new state of RCC_FLAG (SET or RESET).
986 *******************************************************************************/
987 FlagStatus RCC_GetFlagStatus(u8 RCC_FLAG)
988 {
989 u32 tmp = 0;
990 u32 statusreg = 0;
991 FlagStatus bitstatus = RESET;
992
993 /* Check the parameters */
994 assert(IS_RCC_FLAG(RCC_FLAG));
995
996 /* Get the RCC register index */
997 tmp = RCC_FLAG >> 5;
998
999 if (tmp == 1) /* The flag to check is in CR register */
1000 {
1001 statusreg = RCC->CR;
1002 }
1003 else if (tmp == 2) /* The flag to check is in BDCR register */
1004 {
1005 statusreg = RCC->BDCR;
1006 }
1007 else /* The flag to check is in CSR register */
1008 {
1009 statusreg = RCC->CSR;
1010 }
1011
1012 /* Get the flag position */
1013 tmp = RCC_FLAG & FLAG_Mask;
1014
1015 if ((statusreg & ((u32)1 << tmp)) != (u32)RESET)
1016 {
1017 bitstatus = SET;
1018 }
1019 else
1020 {
1021 bitstatus = RESET;
1022 }
1023
1024 /* Return the flag status */
1025 return bitstatus;
1026 }
1027
1028 /*******************************************************************************
1029 * Function Name : RCC_ClearFlag
1030 * Description : Clears the RCC reset flags.
1031 * The reset flags are: RCC_FLAG_PINRST, RCC_FLAG_PORRST,
1032 * RCC_FLAG_SFTRST, RCC_FLAG_IWDGRST, RCC_FLAG_WWDGRST,
1033 * RCC_FLAG_LPWRRST
1034 * Input : None
1035 * Output : None
1036 * Return : None
1037 *******************************************************************************/
1038 void RCC_ClearFlag(void)
1039 {
1040 /* Set RMVF bit to clear the reset flags */
1041 RCC->CSR |= CSR_RMVF_Set;
1042 }
1043
1044 /*******************************************************************************
1045 * Function Name : RCC_GetITStatus
1046 * Description : Checks whether the specified RCC interrupt has occurred or not.
1047 * Input : - RCC_IT: specifies the RCC interrupt source to check.
1048 * This parameter can be one of the following values:
1049 * - RCC_IT_LSIRDY: LSI ready interrupt
1050 * - RCC_IT_LSERDY: LSE ready interrupt
1051 * - RCC_IT_HSIRDY: HSI ready interrupt
1052 * - RCC_IT_HSERDY: HSE ready interrupt
1053 * - RCC_IT_PLLRDY: PLL ready interrupt
1054 * - RCC_IT_CSS: Clock Security System interrupt
1055 * Output : None
1056 * Return : The new state of RCC_IT (SET or RESET).
1057 *******************************************************************************/
1058 ITStatus RCC_GetITStatus(u8 RCC_IT)
1059 {
1060 ITStatus bitstatus = RESET;
1061
1062 /* Check the parameters */
1063 assert(IS_RCC_GET_IT(RCC_IT));
1064
1065 /* Check the status of the specified RCC interrupt */
1066 if ((RCC->CIR & RCC_IT) != (u32)RESET)
1067 {
1068 bitstatus = SET;
1069 }
1070 else
1071 {
1072 bitstatus = RESET;
1073 }
1074
1075 /* Return the RCC_IT status */
1076 return bitstatus;
1077 }
1078
1079 /*******************************************************************************
1080 * Function Name : RCC_ClearITPendingBit
1081 * Description : Clears the RCC抯 interrupt pending bits.
1082 * Input : - RCC_IT: specifies the interrupt pending bit to clear.
1083 * This parameter can be any combination of the following values:
1084 * - RCC_IT_LSIRDY: LSI ready interrupt
1085 * - RCC_IT_LSERDY: LSE ready interrupt
1086 * - RCC_IT_HSIRDY: HSI ready interrupt
1087 * - RCC_IT_HSERDY: HSE ready interrupt
1088 * - RCC_IT_PLLRDY: PLL ready interrupt
1089 * - RCC_IT_CSS: Clock Security System interrupt
1090 * Output : None
1091 * Return : None
1092 *******************************************************************************/
1093 void RCC_ClearITPendingBit(u8 RCC_IT)
1094 {
1095 /* Check the parameters */
1096 assert(IS_RCC_CLEAR_IT(RCC_IT));
1097
1098 /* Perform Byte access to RCC_CIR[23:16] bits to clear the selected interrupt
1099 pending bits */
1100 *(vu8 *) 0x4002100A = RCC_IT;
1101 }
1102
1103 /******************* (C) COPYRIGHT 2007 STMicroelectronics *****END OF FILE****/
Maximum stack usage in bytes:
Function CSTACK
-------- ------
RCC_ADCCLKConfig 8
RCC_AHBPeriphClockCmd 12
RCC_APB1PeriphClockCmd 12
RCC_APB1PeriphResetCmd
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