📄 stm32f10x_dma.lst
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156 /* Set the MEM2MEM bit according to DMA_M2M value */
157 tmpreg |= DMA_InitStruct->DMA_DIR | DMA_InitStruct->DMA_Mode |
158 DMA_InitStruct->DMA_PeripheralInc | DMA_InitStruct->DMA_MemoryInc |
159 DMA_InitStruct->DMA_PeripheralDataSize | DMA_InitStruct->DMA_MemoryDataSize |
160 DMA_InitStruct->DMA_Priority | DMA_InitStruct->DMA_M2M;
161 /* Write to DMA Channelx CCR */
162 DMA_Channelx->CCR = tmpreg;
163
164 /*--------------------------- DMA Channelx CNBTR Configuration ---------------*/
165 /* Write to DMA Channelx CNBTR */
166 DMA_Channelx->CNDTR = DMA_InitStruct->DMA_BufferSize;
167
168 /*--------------------------- DMA Channelx CPAR Configuration ----------------*/
169 /* Write to DMA Channelx CPAR */
170 DMA_Channelx->CPAR = DMA_InitStruct->DMA_PeripheralBaseAddr;
171
172 /*--------------------------- DMA Channelx CMAR Configuration ----------------*/
173 /* Write to DMA Channelx CMAR */
174 DMA_Channelx->CMAR = DMA_InitStruct->DMA_MemoryBaseAddr;
175 }
176
177 /*******************************************************************************
178 * Function Name : DMA_StructInit
179 * Description : Fills each DMA_InitStruct member with its default value.
180 * Input : - DMA_InitStruct : pointer to a DMA_InitTypeDef structure
181 * which will be initialized.
182 * Output : None
183 * Return : None
184 *******************************************************************************/
185 void DMA_StructInit(DMA_InitTypeDef* DMA_InitStruct)
186 {
187 /*-------------- Reset DMA init structure parameters values ------------------*/
188 /* Initialize the DMA_PeripheralBaseAddr member */
189 DMA_InitStruct->DMA_PeripheralBaseAddr = 0;
190
191 /* Initialize the DMA_MemoryBaseAddr member */
192 DMA_InitStruct->DMA_MemoryBaseAddr = 0;
193
194 /* Initialize the DMA_DIR member */
195 DMA_InitStruct->DMA_DIR = DMA_DIR_PeripheralSRC;
196
197 /* Initialize the DMA_BufferSize member */
198 DMA_InitStruct->DMA_BufferSize = 0;
199
200 /* Initialize the DMA_PeripheralInc member */
201 DMA_InitStruct->DMA_PeripheralInc = DMA_PeripheralInc_Disable;
202
203 /* Initialize the DMA_MemoryInc member */
204 DMA_InitStruct->DMA_MemoryInc = DMA_MemoryInc_Disable;
205
206 /* Initialize the DMA_PeripheralDataSize member */
207 DMA_InitStruct->DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
208
209 /* Initialize the DMA_MemoryDataSize member */
210 DMA_InitStruct->DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
211
212 /* Initialize the DMA_Mode member */
213 DMA_InitStruct->DMA_Mode = DMA_Mode_Normal;
214
215 /* Initialize the DMA_Priority member */
216 DMA_InitStruct->DMA_Priority = DMA_Priority_Low;
217
218 /* Initialize the DMA_M2M member */
219 DMA_InitStruct->DMA_M2M = DMA_M2M_Disable;
220 }
221
222 /*******************************************************************************
223 * Function Name : DMA_Cmd
224 * Description : Enables or disables the specified DMA Channelx.
225 * Input : - DMA_Channelx: where x can be 1, 2 to 7 to select the DMA
226 * Channel.
227 * - NewState: new state of the DMA Channelx.
228 * This parameter can be: ENABLE or DISABLE.
229 * Output : None
230 * Return : None
231 *******************************************************************************/
232 void DMA_Cmd(DMA_Channel_TypeDef* DMA_Channelx, FunctionalState NewState)
233 {
234 /* Check the parameters */
235 assert(IS_FUNCTIONAL_STATE(NewState));
236
237 if (NewState != DISABLE)
238 {
239 /* Enable the selected DMA Channelx */
240 DMA_Channelx->CCR |= CCR_ENABLE_Set;
241 }
242 else
243 {
244 /* Disable the selected DMA Channelx */
245 DMA_Channelx->CCR &= CCR_ENABLE_Reset;
246 }
247 }
248
249 /*******************************************************************************
250 * Function Name : DMA_ITConfig
251 * Description : Enables or disables the specified DMA Channelx interrupts.
252 * Input : - DMA_IT: specifies the DMA interrupts sources to be enabled
253 * or disabled.
254 * This parameter can be any combination of the following values:
255 * - DMA_IT_TC: Transfer complete interrupt mask
256 * - DMA_IT_HT: Half transfer interrupt mask
257 * - DMA_IT_TE: Transfer error interrupt mask
258 * - NewState: new state of the specified DMA interrupts.
259 * This parameter can be: ENABLE or DISABLE.
260 * Output : None
261 * Return : None
262 *******************************************************************************/
263 void DMA_ITConfig(DMA_Channel_TypeDef* DMA_Channelx, u32 DMA_IT, FunctionalState NewState)
264 {
265 /* Check the parameters */
266 assert(IS_DMA_CONFIG_IT(DMA_IT));
267 assert(IS_FUNCTIONAL_STATE(NewState));
268
269 if (NewState != DISABLE)
270 {
271 /* Enable the selected DMA interrupts */
272 DMA_Channelx->CCR |= DMA_IT;
273 }
274 else
275 {
276 /* Disable the selected DMA interrupts */
277 DMA_Channelx->CCR &= ~DMA_IT;
278 }
279 }
280
281 /*******************************************************************************
282 * Function Name : DMA_GetCurrDataCounter
283 * Description : Returns the number of remaining data units in the current
284 * DMA Channelx transfer.
285 * Input : - DMA_Channelx: where x can be 1, 2 to 7 to select the DMA
286 * Channel.
287 * Output : None
288 * Return : The number of remaining data units in the current DMA Channel
289 * transfer..
290 *******************************************************************************/
291 u16 DMA_GetCurrDataCounter(DMA_Channel_TypeDef* DMA_Channelx)
292 {
293 /* Return the current memory address value for Channelx */
294 return ((u16)(DMA_Channelx->CNDTR));
295 }
296
297 /*******************************************************************************
298 * Function Name : DMA_GetFlagStatus
299 * Description : Checks whether the specified DMA Channelx flag is set or not.
300 * Input : - DMA_FLAG: specifies the flag to check.
301 * This parameter can be one of the following values:
302 * - DMA_FLAG_GL1: Channel1 global flag.
303 * - DMA_FLAG_TC1: Channel1 transfer complete flag.
304 * - DMA_FLAG_HT1: Channel1 half transfer flag.
305 * - DMA_FLAG_TE1: Channel1 transfer error flag.
306 * - DMA_FLAG_GL2: Channel2 global flag.
307 * - DMA_FLAG_TC2: Channel2 transfer complete flag.
308 * - DMA_FLAG_HT2: Channel2 half transfer flag.
309 * - DMA_FLAG_TE2: Channel2 transfer error flag.
310 * - DMA_FLAG_GL3: Channel3 global flag.
311 * - DMA_FLAG_TC3: Channel3 transfer complete flag.
312 * - DMA_FLAG_HT3: Channel3 half transfer flag.
313 * - DMA_FLAG_TE3: Channel3 transfer error flag.
314 * - DMA_FLAG_GL4: Channel4 global flag.
315 * - DMA_FLAG_TC4: Channel4 transfer complete flag.
316 * - DMA_FLAG_HT4: Channel4 half transfer flag.
317 * - DMA_FLAG_TE4: Channel4 transfer error flag.
318 * - DMA_FLAG_GL5: Channel5 global flag.
319 * - DMA_FLAG_TC5: Channel5 transfer complete flag.
320 * - DMA_FLAG_HT5: Channel5 half transfer flag.
321 * - DMA_FLAG_TE5: Channel5 transfer error flag.
322 * - DMA_FLAG_GL6: Channel6 global flag.
323 * - DMA_FLAG_TC6: Channel6 transfer complete flag.
324 * - DMA_FLAG_HT6: Channel6 half transfer flag.
325 * - DMA_FLAG_TE6: Channel6 transfer error flag.
326 * - DMA_FLAG_GL7: Channel7 global flag.
327 * - DMA_FLAG_TC7: Channel7 transfer complete flag.
328 * - DMA_FLAG_HT7: Channel7 half transfer flag.
329 * - DMA_FLAG_TE7: Channel7 transfer error flag.
330 * Output : None
331 * Return : The new state of DMA_FLAG (SET or RESET).
332 *******************************************************************************/
333 FlagStatus DMA_GetFlagStatus(u32 DMA_FLAG)
334 {
335 FlagStatus bitstatus = RESET;
336
337 /* Check the parameters */
338 assert(IS_DMA_GET_FLAG(DMA_FLAG));
339
340 /* Check the status of the specified DMA flag */
341 if ((DMA->ISR & DMA_FLAG) != (u32)RESET)
342 {
343 /* DMA_FLAG is set */
344 bitstatus = SET;
345 }
346 else
347 {
348 /* DMA_FLAG is reset */
349 bitstatus = RESET;
350 }
351 /* Return the DMA_FLAG status */
352 return bitstatus;
353 }
354
355 /*******************************************************************************
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